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Searched refs:mmIA_UTCL1_STATUS_2 (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h2297 #define mmIA_UTCL1_STATUS_2 … macro
H A Dgc_10_3_0_offset.h2390 #define mmIA_UTCL1_STATUS_2 … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v10_0.c330 SOC15_REG_ENTRY_STR(GC, 0, mmIA_UTCL1_STATUS_2),