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Searched refs:mmCP_PFP_IC_OP_CNTL (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v10_0.c5855 tmp = RREG32_SOC15(GC, 0, mmCP_PFP_IC_OP_CNTL); in gfx_v10_0_rlc_backdoor_autoload_config_pfp_cache()
5857 WREG32_SOC15(GC, 0, mmCP_PFP_IC_OP_CNTL, tmp); in gfx_v10_0_rlc_backdoor_autoload_config_pfp_cache()
5861 tmp = RREG32_SOC15(GC, 0, mmCP_PFP_IC_OP_CNTL); in gfx_v10_0_rlc_backdoor_autoload_config_pfp_cache()
6028 tmp = RREG32_SOC15(GC, 0, mmCP_PFP_IC_OP_CNTL); in gfx_v10_0_cp_gfx_load_pfp_microcode()
6030 WREG32_SOC15(GC, 0, mmCP_PFP_IC_OP_CNTL, tmp); in gfx_v10_0_cp_gfx_load_pfp_microcode()
6034 tmp = RREG32_SOC15(GC, 0, mmCP_PFP_IC_OP_CNTL); in gfx_v10_0_cp_gfx_load_pfp_microcode()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h10271 #define mmCP_PFP_IC_OP_CNTL … macro
H A Dgc_10_3_0_offset.h9981 #define mmCP_PFP_IC_OP_CNTL … macro