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Searched refs:mmCH_VC5_ENABLE (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v10_0.c464 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_VC5_ENABLE, 0x00000002, 0x00000000),
1567 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_VC5_ENABLE, 0x00000002, 0x00000000),
1608 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_VC5_ENABLE, 0x00000003, 0x00000000),
3562 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCH_VC5_ENABLE, 0x00000003, 0x00000003),
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h8117 #define mmCH_VC5_ENABLE macro
H A Dgc_10_3_0_offset.h7710 #define mmCH_VC5_ENABLE macro