Searched refs:memclk_mhz (Results 1 – 11 of 11) sorted by relevance
687 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[min_pstate].MemClk; in dcn314_clk_mgr_helper_populate_bw_params()703 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[max_pstate].MemClk; in dcn314_clk_mgr_helper_populate_bw_params()731 bw_params->clk_table.entries[entry_idx].memclk_mhz = def_max.memclk_mhz; in dcn314_clk_mgr_helper_populate_bw_params()
506 dc_limit->memclk_mhz = dcn60_get_dc_mode_limit_mhz(&init_table->PPClocks[PPCLK_UCLK]); in dcn60_populate_dc_mode_limit()561 clk_table->entries[i].memclk_mhz = dpm_clk->Clocks[i]; in dcn60_populate_clk_table()564 clk_table->entries[num_entries->num_memclk_levels - 1].memclk_mhz; in dcn60_populate_clk_table()605 bw_params->dc_mode_softmax_memclk = bw_params->dc_mode_limit.memclk_mhz; in dcn60_override_bw_params()1415 new_clocks.dramclk_khz = clk_mgr_base->bw_params->clk_table.entries[0].memclk_mhz * 1000; in dcn60_set_hard_min_memclk()
2287 if (bw_params->clk_table.entries[0].memclk_mhz) { in dcn30_update_bw_bounding_box()2325 dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk(bw_params->clk_table.entries[i].memclk_mhz * 16, in dcn30_update_bw_bounding_box()2338 bw_params->clk_table.entries[j].memclk_mhz * 16; in dcn30_update_bw_bounding_box()2349 bw_params->clk_table.entries[j].memclk_mhz * 16; in dcn30_update_bw_bounding_box()2365 dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16; in dcn30_update_bw_bounding_box()2380 dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16; in dcn30_update_bw_bounding_box()
1114 …bw_params->clk_table.entries[entry_idx].memclk_mhz = clock_table->MemPstateTable[min_pstate].MemCl… in dcn35_clk_mgr_helper_populate_bw_params()1134 bw_params->clk_table.entries[i].memclk_mhz = clock_table->MemPstateTable[max_pstate].MemClk; in dcn35_clk_mgr_helper_populate_bw_params()1175 bw_params->clk_table.entries[entry_idx].memclk_mhz = def_max.memclk_mhz; in dcn35_clk_mgr_helper_populate_bw_params()
1904 if (context->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz == 0 || in dcn60_get_power_profile()1905 uclk_mhz < context->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz) in dcn60_get_power_profile()1907 if (uclk_mhz > context->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz) in dcn60_get_power_profile()
1947 if (context->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz == 0 || in dcn401_get_power_profile()1948 uclk_mhz < context->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz) in dcn401_get_power_profile()1950 if (uclk_mhz > context->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz) in dcn401_get_power_profile()
604 bw_params->clk_table.entries[entry_idx].memclk_mhz = clock_table->DfPstateTable[j].MemClk; in dcn31_clk_mgr_helper_populate_bw_params()
60 clocks->dramclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].memclk_mhz * 1000; in dcn50_initialize_min_clocks()
1265 …k_mgr->bw_params->clk_table.entries[dc->clk_mgr->bw_params->clk_table.num_entries - 1].memclk_mhz); in dcn30_prepare_bandwidth()
6742 static void blank_and_force_memclk(struct dc *dc, bool apply, unsigned int memclk_mhz) in blank_and_force_memclk() argument6766 dc->clk_mgr->funcs->set_max_memclk(dc->clk_mgr, memclk_mhz); in blank_and_force_memclk()6768 dc->clk_mgr->funcs->set_min_memclk(dc->clk_mgr, memclk_mhz); in blank_and_force_memclk()6809 if (dc->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz > maxDPM) in dc_enable_dcmode_clk_limit()6810 maxDPM = dc->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz; in dc_enable_dcmode_clk_limit()
544 dml2->config.bbox_overrides.clks_table.clk_entries[i].memclk_mhz * transactions_per_mem_clock; in dml2_init_soc_states()