1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 /* 3 * Copyright (C) 2022 MediaTek Inc. 4 */ 5 6 #include <linux/firmware.h> 7 #include <linux/fs.h> 8 #include "mt7996.h" 9 #include "mcu.h" 10 #include "mac.h" 11 #include "eeprom.h" 12 13 #define fw_name(_dev, name, ...) ({ \ 14 char *_fw; \ 15 switch (mt76_chip(&(_dev)->mt76)) { \ 16 case MT7992_DEVICE_ID: \ 17 switch ((_dev)->var.type) { \ 18 case MT7992_VAR_TYPE_23: \ 19 _fw = MT7992_##name##_23; \ 20 break; \ 21 case MT7992_VAR_TYPE_24: \ 22 _fw = MT7992_##name##_24; \ 23 break; \ 24 default: \ 25 _fw = MT7992_##name; \ 26 } \ 27 break; \ 28 case MT7990_DEVICE_ID: \ 29 _fw = MT7990_##name; \ 30 break; \ 31 case MT7996_DEVICE_ID: \ 32 default: \ 33 switch ((_dev)->var.type) { \ 34 case MT7996_VAR_TYPE_233: \ 35 _fw = MT7996_##name##_233; \ 36 break; \ 37 default: \ 38 _fw = MT7996_##name; \ 39 } \ 40 break; \ 41 } \ 42 _fw; \ 43 }) 44 45 struct mt7996_patch_hdr { 46 char build_date[16]; 47 char platform[4]; 48 __be32 hw_sw_ver; 49 __be32 patch_ver; 50 __be16 checksum; 51 u16 reserved; 52 struct { 53 __be32 patch_ver; 54 __be32 subsys; 55 __be32 feature; 56 __be32 n_region; 57 __be32 crc; 58 u32 reserved[11]; 59 } desc; 60 } __packed; 61 62 struct mt7996_patch_sec { 63 __be32 type; 64 __be32 offs; 65 __be32 size; 66 union { 67 __be32 spec[13]; 68 struct { 69 __be32 addr; 70 __be32 len; 71 __be32 sec_key_idx; 72 __be32 align_len; 73 u32 reserved[9]; 74 } info; 75 }; 76 } __packed; 77 78 struct mt7996_fw_trailer { 79 u8 chip_id; 80 u8 eco_code; 81 u8 n_region; 82 u8 format_ver; 83 u8 format_flag; 84 u8 reserved[2]; 85 char fw_ver[10]; 86 char build_date[15]; 87 u32 crc; 88 } __packed; 89 90 struct mt7996_fw_region { 91 __le32 decomp_crc; 92 __le32 decomp_len; 93 __le32 decomp_blk_sz; 94 u8 reserved[4]; 95 __le32 addr; 96 __le32 len; 97 u8 feature_set; 98 u8 reserved1[15]; 99 } __packed; 100 101 #define MCU_PATCH_ADDRESS 0x200000 102 103 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p) 104 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m) 105 #define EHT_PHY(p, c) u8_get_bits(c, IEEE80211_EHT_PHY_##p) 106 107 static bool sr_scene_detect = true; 108 module_param(sr_scene_detect, bool, 0644); 109 MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm"); 110 111 static u8 112 mt7996_mcu_get_sta_nss(u16 mcs_map) 113 { 114 u8 nss; 115 116 for (nss = 8; nss > 0; nss--) { 117 u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3; 118 119 if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED) 120 break; 121 } 122 123 return nss - 1; 124 } 125 126 static void 127 mt7996_mcu_set_sta_he_mcs(struct ieee80211_link_sta *link_sta, 128 struct mt7996_vif_link *link, 129 __le16 *he_mcs, u16 mcs_map) 130 { 131 struct mt76_phy *mphy = mt76_vif_link_phy(&link->mt76); 132 int nss, max_nss = link_sta->rx_nss > 3 ? 4 : link_sta->rx_nss; 133 enum nl80211_band band; 134 const u16 *mask; 135 136 if (!mphy) 137 return; 138 139 band = mphy->chandef.chan->band; 140 mask = link->bitrate_mask.control[band].he_mcs; 141 142 for (nss = 0; nss < max_nss; nss++) { 143 int mcs; 144 145 switch ((mcs_map >> (2 * nss)) & 0x3) { 146 case IEEE80211_HE_MCS_SUPPORT_0_11: 147 mcs = GENMASK(11, 0); 148 break; 149 case IEEE80211_HE_MCS_SUPPORT_0_9: 150 mcs = GENMASK(9, 0); 151 break; 152 case IEEE80211_HE_MCS_SUPPORT_0_7: 153 mcs = GENMASK(7, 0); 154 break; 155 default: 156 mcs = 0; 157 } 158 159 mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1; 160 161 switch (mcs) { 162 case 0 ... 7: 163 mcs = IEEE80211_HE_MCS_SUPPORT_0_7; 164 break; 165 case 8 ... 9: 166 mcs = IEEE80211_HE_MCS_SUPPORT_0_9; 167 break; 168 case 10 ... 11: 169 mcs = IEEE80211_HE_MCS_SUPPORT_0_11; 170 break; 171 default: 172 mcs = IEEE80211_HE_MCS_NOT_SUPPORTED; 173 break; 174 } 175 mcs_map &= ~(0x3 << (nss * 2)); 176 mcs_map |= mcs << (nss * 2); 177 } 178 179 *he_mcs = cpu_to_le16(mcs_map); 180 } 181 182 static void 183 mt7996_mcu_set_sta_vht_mcs(struct ieee80211_link_sta *link_sta, 184 __le16 *vht_mcs, const u16 *mask) 185 { 186 u16 mcs, mcs_map = le16_to_cpu(link_sta->vht_cap.vht_mcs.rx_mcs_map); 187 int nss, max_nss = link_sta->rx_nss > 3 ? 4 : link_sta->rx_nss; 188 189 for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) { 190 switch (mcs_map & 0x3) { 191 case IEEE80211_VHT_MCS_SUPPORT_0_9: 192 mcs = GENMASK(9, 0); 193 break; 194 case IEEE80211_VHT_MCS_SUPPORT_0_8: 195 mcs = GENMASK(8, 0); 196 break; 197 case IEEE80211_VHT_MCS_SUPPORT_0_7: 198 mcs = GENMASK(7, 0); 199 break; 200 default: 201 mcs = 0; 202 } 203 204 vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]); 205 } 206 } 207 208 static void 209 mt7996_mcu_set_sta_ht_mcs(struct ieee80211_link_sta *link_sta, 210 u8 *ht_mcs, const u8 *mask) 211 { 212 int nss, max_nss = link_sta->rx_nss > 3 ? 4 : link_sta->rx_nss; 213 214 for (nss = 0; nss < max_nss; nss++) 215 ht_mcs[nss] = link_sta->ht_cap.mcs.rx_mask[nss] & mask[nss]; 216 } 217 218 static int 219 mt7996_mcu_parse_response(struct mt76_dev *mdev, int cmd, 220 struct sk_buff *skb, int seq) 221 { 222 struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76); 223 struct mt7996_mcu_rxd *rxd; 224 struct mt7996_mcu_uni_event *event; 225 int mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 226 int ret = 0; 227 228 if (!skb) { 229 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n", 230 cmd, seq); 231 232 if (!test_and_set_bit(MT76_MCU_RESET, &dev->mphy.state)) { 233 dev->recovery.restart = true; 234 wake_up(&dev->mt76.mcu.wait); 235 queue_work(dev->mt76.wq, &dev->reset_work); 236 wake_up(&dev->reset_wait); 237 } 238 239 return -ETIMEDOUT; 240 } 241 242 rxd = (struct mt7996_mcu_rxd *)skb->data; 243 if (seq != rxd->seq) 244 return -EAGAIN; 245 246 if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) { 247 skb_pull(skb, sizeof(*rxd) - 4); 248 ret = *skb->data; 249 } else if ((rxd->option & MCU_UNI_CMD_EVENT) && 250 rxd->eid == MCU_UNI_EVENT_RESULT) { 251 skb_pull(skb, sizeof(*rxd)); 252 event = (struct mt7996_mcu_uni_event *)skb->data; 253 ret = le32_to_cpu(event->status); 254 /* skip invalid event */ 255 if (mcu_cmd != le16_to_cpu(event->cid)) 256 ret = -EAGAIN; 257 } else { 258 skb_pull(skb, sizeof(struct mt7996_mcu_rxd)); 259 } 260 261 return ret; 262 } 263 264 static void 265 mt7996_mcu_set_timeout(struct mt76_dev *mdev, int cmd) 266 { 267 mdev->mcu.timeout = 5 * HZ; 268 269 if (!(cmd & __MCU_CMD_FIELD_UNI)) 270 return; 271 272 switch (FIELD_GET(__MCU_CMD_FIELD_ID, cmd)) { 273 case MCU_UNI_CMD_THERMAL: 274 case MCU_UNI_CMD_TWT: 275 case MCU_UNI_CMD_GET_MIB_INFO: 276 case MCU_UNI_CMD_STA_REC_UPDATE: 277 case MCU_UNI_CMD_BSS_INFO_UPDATE: 278 mdev->mcu.timeout = 2 * HZ; 279 return; 280 case MCU_UNI_CMD_EFUSE_CTRL: 281 case MCU_UNI_CMD_EXT_EEPROM_CTRL: 282 mdev->mcu.timeout = 30 * HZ; 283 return; 284 default: 285 break; 286 } 287 } 288 289 static int 290 mt7996_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, 291 int cmd, int *wait_seq) 292 { 293 struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76); 294 int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 295 struct mt76_connac2_mcu_uni_txd *uni_txd; 296 struct mt76_connac2_mcu_txd *mcu_txd; 297 enum mt76_mcuq_id qid; 298 __le32 *txd; 299 u32 val; 300 u8 seq; 301 302 mt7996_mcu_set_timeout(mdev, cmd); 303 304 seq = ++dev->mt76.mcu.msg_seq & 0xf; 305 if (!seq) 306 seq = ++dev->mt76.mcu.msg_seq & 0xf; 307 308 if (cmd == MCU_CMD(FW_SCATTER)) { 309 qid = MT_MCUQ_FWDL; 310 goto exit; 311 } 312 313 txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd); 314 txd = (__le32 *)skb_push(skb, txd_len); 315 if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state) && mt7996_has_wa(dev)) 316 qid = MT_MCUQ_WA; 317 else 318 qid = MT_MCUQ_WM; 319 320 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) | 321 FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) | 322 FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0); 323 txd[0] = cpu_to_le32(val); 324 325 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD); 326 txd[1] = cpu_to_le32(val); 327 328 if (cmd & __MCU_CMD_FIELD_UNI) { 329 uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd; 330 uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd)); 331 uni_txd->cid = cpu_to_le16(mcu_cmd); 332 uni_txd->s2d_index = MCU_S2D_H2CN; 333 uni_txd->pkt_type = MCU_PKT_ID; 334 uni_txd->seq = seq; 335 336 uni_txd->option = MCU_CMD_UNI; 337 if (!(cmd & __MCU_CMD_FIELD_QUERY)) 338 uni_txd->option |= MCU_CMD_SET; 339 340 if (wait_seq) 341 uni_txd->option |= MCU_CMD_ACK; 342 343 if ((cmd & __MCU_CMD_FIELD_WA) && (cmd & __MCU_CMD_FIELD_WM)) 344 uni_txd->s2d_index = MCU_S2D_H2CN; 345 else if (cmd & __MCU_CMD_FIELD_WA) 346 uni_txd->s2d_index = MCU_S2D_H2C; 347 else if (cmd & __MCU_CMD_FIELD_WM) 348 uni_txd->s2d_index = MCU_S2D_H2N; 349 350 goto exit; 351 } 352 353 mcu_txd = (struct mt76_connac2_mcu_txd *)txd; 354 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd)); 355 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU, 356 MT_TX_MCU_PORT_RX_Q0)); 357 mcu_txd->pkt_type = MCU_PKT_ID; 358 mcu_txd->seq = seq; 359 360 mcu_txd->cid = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 361 mcu_txd->set_query = MCU_Q_NA; 362 mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd); 363 if (mcu_txd->ext_cid) { 364 mcu_txd->ext_cid_ack = 1; 365 366 if (cmd & __MCU_CMD_FIELD_QUERY) 367 mcu_txd->set_query = MCU_Q_QUERY; 368 else 369 mcu_txd->set_query = MCU_Q_SET; 370 } 371 372 if (cmd & __MCU_CMD_FIELD_WA) 373 mcu_txd->s2d_index = MCU_S2D_H2C; 374 else 375 mcu_txd->s2d_index = MCU_S2D_H2N; 376 377 exit: 378 if (wait_seq) 379 *wait_seq = seq; 380 381 return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0); 382 } 383 384 int mt7996_mcu_wa_cmd(struct mt7996_dev *dev, int cmd, u32 a1, u32 a2, u32 a3) 385 { 386 struct { 387 u8 _rsv[4]; 388 389 __le16 tag; 390 __le16 len; 391 __le32 args[3]; 392 } __packed req = { 393 .args = { 394 cpu_to_le32(a1), 395 cpu_to_le32(a2), 396 cpu_to_le32(a3), 397 }, 398 }; 399 400 if (mt7996_has_wa(dev)) 401 return mt76_mcu_send_msg(&dev->mt76, cmd, &req.args, 402 sizeof(req.args), false); 403 404 req.tag = cpu_to_le16(cmd == MCU_WA_PARAM_CMD(QUERY) ? UNI_CMD_SDO_QUERY : 405 UNI_CMD_SDO_SET); 406 req.len = cpu_to_le16(sizeof(req) - 4); 407 408 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_UNI_CMD(SDO), &req, 409 sizeof(req), false); 410 } 411 412 struct mt7996_mcu_countdown_data { 413 struct mt76_phy *mphy; 414 u8 omac_idx; 415 }; 416 417 static void 418 mt7996_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 419 { 420 struct mt7996_mcu_countdown_data *cdata = (void *)priv; 421 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 422 struct ieee80211_bss_conf *link_conf = NULL; 423 unsigned long valid_links = vif->valid_links ?: BIT(0); 424 unsigned int link_id; 425 426 if (vif->type == NL80211_IFTYPE_STATION) 427 return; 428 429 for_each_set_bit(link_id, &valid_links, IEEE80211_MLD_MAX_NUM_LINKS) { 430 struct mt76_vif_link *mlink = 431 rcu_dereference(mvif->mt76.link[link_id]); 432 433 if (mlink && mlink->band_idx == cdata->mphy->band_idx && 434 mlink->omac_idx == cdata->omac_idx) { 435 link_conf = rcu_dereference(vif->link_conf[link_id]); 436 break; 437 } 438 } 439 440 if (!link_conf || !link_conf->csa_active) 441 return; 442 443 ieee80211_csa_finish(vif, link_conf->link_id); 444 } 445 446 static void 447 mt7996_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) 448 { 449 struct mt7996_mcu_countdown_data *cdata = (void *)priv; 450 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 451 struct ieee80211_bss_conf *link_conf = NULL; 452 unsigned long valid_links = vif->valid_links ?: BIT(0); 453 unsigned int link_id; 454 455 if (vif->type == NL80211_IFTYPE_STATION) 456 return; 457 458 for_each_set_bit(link_id, &valid_links, IEEE80211_MLD_MAX_NUM_LINKS) { 459 struct mt76_vif_link *mlink = 460 rcu_dereference(mvif->mt76.link[link_id]); 461 462 if (mlink && mlink->band_idx == cdata->mphy->band_idx && 463 mlink->omac_idx == cdata->omac_idx) { 464 link_conf = rcu_dereference(vif->link_conf[link_id]); 465 break; 466 } 467 } 468 469 if (!link_conf || !link_conf->color_change_active) 470 return; 471 472 ieee80211_color_change_finish(vif, link_conf->link_id); 473 } 474 475 static void 476 mt7996_mcu_ie_countdown(struct mt7996_dev *dev, struct sk_buff *skb) 477 { 478 #define UNI_EVENT_IE_COUNTDOWN_CSA 0 479 #define UNI_EVENT_IE_COUNTDOWN_BCC 1 480 struct header { 481 u8 band; 482 u8 rsv[3]; 483 }; 484 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 485 const char *data = (char *)&rxd[1], *tail; 486 struct header *hdr = (struct header *)data; 487 struct tlv *tlv = (struct tlv *)(data + 4); 488 struct mt7996_mcu_countdown_notify *event; 489 struct mt7996_mcu_countdown_data cdata; 490 491 if (hdr->band >= ARRAY_SIZE(dev->mt76.phys)) 492 return; 493 494 cdata.mphy = dev->mt76.phys[hdr->band]; 495 if (!cdata.mphy) 496 return; 497 498 tail = skb->data + skb->len; 499 data += sizeof(*hdr); 500 while (data + sizeof(*tlv) < tail && le16_to_cpu(tlv->len)) { 501 event = (struct mt7996_mcu_countdown_notify *)tlv->data; 502 503 cdata.omac_idx = event->omac_idx; 504 505 switch (le16_to_cpu(tlv->tag)) { 506 case UNI_EVENT_IE_COUNTDOWN_CSA: 507 ieee80211_iterate_active_interfaces_atomic(mt76_hw(dev), 508 IEEE80211_IFACE_ITER_RESUME_ALL, 509 mt7996_mcu_csa_finish, &cdata); 510 break; 511 case UNI_EVENT_IE_COUNTDOWN_BCC: 512 ieee80211_iterate_active_interfaces_atomic(mt76_hw(dev), 513 IEEE80211_IFACE_ITER_RESUME_ALL, 514 mt7996_mcu_cca_finish, &cdata); 515 break; 516 default: 517 break; 518 } 519 520 data += le16_to_cpu(tlv->len); 521 tlv = (struct tlv *)data; 522 } 523 } 524 525 static void 526 mt7996_mcu_rx_radar_detected(struct mt7996_dev *dev, struct sk_buff *skb) 527 { 528 struct mt76_phy *mphy = &dev->mt76.phy; 529 struct mt7996_mcu_rdd_report *r; 530 531 r = (struct mt7996_mcu_rdd_report *)skb->data; 532 533 switch (r->rdd_idx) { 534 case MT_RDD_IDX_BAND2: 535 mphy = dev->mt76.phys[MT_BAND2]; 536 break; 537 case MT_RDD_IDX_BAND1: 538 mphy = dev->mt76.phys[MT_BAND1]; 539 break; 540 case MT_RDD_IDX_BACKGROUND: 541 if (!dev->rdd2_phy) 542 goto err; 543 mphy = dev->rdd2_phy->mt76; 544 break; 545 default: 546 goto err; 547 } 548 549 if (!mphy) 550 goto err; 551 552 if (r->rdd_idx == MT_RDD_IDX_BACKGROUND) { 553 cfg80211_background_radar_event(mphy->hw->wiphy, 554 &dev->rdd2_chandef, 555 GFP_ATOMIC); 556 } else { 557 struct mt7996_phy *phy = mphy->priv; 558 559 phy->rdd_tx_paused = true; 560 ieee80211_radar_detected(mphy->hw, NULL); 561 } 562 dev->hw_pattern++; 563 564 return; 565 566 err: 567 dev_err(dev->mt76.dev, "Invalid RDD idx %d\n", r->rdd_idx); 568 } 569 570 static void 571 mt7996_mcu_rx_log_message(struct mt7996_dev *dev, struct sk_buff *skb) 572 { 573 #define UNI_EVENT_FW_LOG_FORMAT 0 574 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 575 const char *data = (char *)&rxd[1] + 4, *type; 576 struct tlv *tlv = (struct tlv *)data; 577 int len; 578 579 if (!(rxd->option & MCU_UNI_CMD_EVENT)) { 580 len = skb->len - sizeof(*rxd); 581 data = (char *)&rxd[1]; 582 goto out; 583 } 584 585 if (le16_to_cpu(tlv->tag) != UNI_EVENT_FW_LOG_FORMAT) 586 return; 587 588 data += sizeof(*tlv) + 4; 589 len = le16_to_cpu(tlv->len) - sizeof(*tlv) - 4; 590 591 out: 592 switch (rxd->s2d_index) { 593 case 0: 594 if (mt7996_debugfs_rx_log(dev, data, len)) 595 return; 596 597 type = "WM"; 598 break; 599 case 2: 600 type = "WA"; 601 break; 602 default: 603 type = "unknown"; 604 break; 605 } 606 607 wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data); 608 } 609 610 static int 611 mt7996_mcu_update_tx_gi(struct rate_info *rate, struct all_sta_trx_rate *mcu_rate) 612 { 613 switch (mcu_rate->tx_mode) { 614 case MT_PHY_TYPE_CCK: 615 case MT_PHY_TYPE_OFDM: 616 break; 617 case MT_PHY_TYPE_HT: 618 case MT_PHY_TYPE_HT_GF: 619 case MT_PHY_TYPE_VHT: 620 if (mcu_rate->tx_gi) 621 rate->flags |= RATE_INFO_FLAGS_SHORT_GI; 622 else 623 rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI; 624 break; 625 case MT_PHY_TYPE_HE_SU: 626 case MT_PHY_TYPE_HE_EXT_SU: 627 case MT_PHY_TYPE_HE_TB: 628 case MT_PHY_TYPE_HE_MU: 629 if (mcu_rate->tx_gi > NL80211_RATE_INFO_HE_GI_3_2) 630 return -EINVAL; 631 rate->he_gi = mcu_rate->tx_gi; 632 break; 633 case MT_PHY_TYPE_EHT_SU: 634 case MT_PHY_TYPE_EHT_TRIG: 635 case MT_PHY_TYPE_EHT_MU: 636 if (mcu_rate->tx_gi > NL80211_RATE_INFO_EHT_GI_3_2) 637 return -EINVAL; 638 rate->eht_gi = mcu_rate->tx_gi; 639 break; 640 default: 641 return -EINVAL; 642 } 643 644 return 0; 645 } 646 647 static void 648 mt7996_mcu_rx_all_sta_info_event(struct mt7996_dev *dev, struct sk_buff *skb) 649 { 650 struct mt7996_mcu_all_sta_info_event *res; 651 u16 i; 652 653 skb_pull(skb, sizeof(struct mt7996_mcu_rxd)); 654 655 res = (struct mt7996_mcu_all_sta_info_event *)skb->data; 656 657 for (i = 0; i < le16_to_cpu(res->sta_num); i++) { 658 u8 ac; 659 u16 wlan_idx; 660 struct mt76_wcid *wcid; 661 662 switch (le16_to_cpu(res->tag)) { 663 case UNI_ALL_STA_TXRX_RATE: 664 wlan_idx = le16_to_cpu(res->rate[i].wlan_idx); 665 wcid = mt76_wcid_ptr(dev, wlan_idx); 666 667 if (!wcid) 668 break; 669 670 if (mt7996_mcu_update_tx_gi(&wcid->rate, &res->rate[i])) 671 dev_err(dev->mt76.dev, "Failed to update TX GI\n"); 672 break; 673 case UNI_ALL_STA_TXRX_ADM_STAT: 674 wlan_idx = le16_to_cpu(res->adm_stat[i].wlan_idx); 675 wcid = mt76_wcid_ptr(dev, wlan_idx); 676 677 if (!wcid) 678 break; 679 680 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { 681 wcid->stats.tx_bytes += 682 le32_to_cpu(res->adm_stat[i].tx_bytes[ac]); 683 wcid->stats.rx_bytes += 684 le32_to_cpu(res->adm_stat[i].rx_bytes[ac]); 685 } 686 break; 687 case UNI_ALL_STA_TXRX_MSDU_COUNT: 688 wlan_idx = le16_to_cpu(res->msdu_cnt[i].wlan_idx); 689 wcid = mt76_wcid_ptr(dev, wlan_idx); 690 691 if (!wcid) 692 break; 693 694 wcid->stats.tx_packets += 695 le32_to_cpu(res->msdu_cnt[i].tx_msdu_cnt); 696 wcid->stats.rx_packets += 697 le32_to_cpu(res->msdu_cnt[i].rx_msdu_cnt); 698 break; 699 default: 700 break; 701 } 702 } 703 } 704 705 static void 706 mt7996_mcu_rx_thermal_notify(struct mt7996_dev *dev, struct sk_buff *skb) 707 { 708 #define THERMAL_NOTIFY_TAG 0x4 709 #define THERMAL_NOTIFY 0x2 710 struct mt76_phy *mphy = &dev->mt76.phy; 711 struct mt7996_mcu_thermal_notify *n; 712 struct mt7996_phy *phy; 713 714 n = (struct mt7996_mcu_thermal_notify *)skb->data; 715 716 if (le16_to_cpu(n->tag) != THERMAL_NOTIFY_TAG) 717 return; 718 719 if (n->event_id != THERMAL_NOTIFY) 720 return; 721 722 if (n->band_idx > MT_BAND2) 723 return; 724 725 mphy = dev->mt76.phys[n->band_idx]; 726 if (!mphy) 727 return; 728 729 phy = (struct mt7996_phy *)mphy->priv; 730 phy->throttle_state = n->duty_percent; 731 } 732 733 static void 734 mt7996_mcu_rx_ext_event(struct mt7996_dev *dev, struct sk_buff *skb) 735 { 736 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 737 738 switch (rxd->ext_eid) { 739 case MCU_EXT_EVENT_FW_LOG_2_HOST: 740 mt7996_mcu_rx_log_message(dev, skb); 741 break; 742 default: 743 break; 744 } 745 } 746 747 static void 748 mt7996_mcu_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb) 749 { 750 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 751 752 switch (rxd->eid) { 753 case MCU_EVENT_EXT: 754 mt7996_mcu_rx_ext_event(dev, skb); 755 break; 756 case MCU_UNI_EVENT_THERMAL: 757 mt7996_mcu_rx_thermal_notify(dev, skb); 758 break; 759 default: 760 break; 761 } 762 dev_kfree_skb(skb); 763 } 764 765 static void 766 mt7996_mcu_wed_rro_event(struct mt7996_dev *dev, struct sk_buff *skb) 767 { 768 struct mt7996_mcu_wed_rro_event *event = (void *)skb->data; 769 770 if (!mt7996_has_hwrro(dev)) 771 return; 772 773 skb_pull(skb, sizeof(struct mt7996_mcu_rxd) + 4); 774 775 switch (le16_to_cpu(event->tag)) { 776 case UNI_WED_RRO_BA_SESSION_STATUS: { 777 struct mt7996_mcu_wed_rro_ba_event *e; 778 779 while (skb->len >= sizeof(*e)) { 780 struct mt76_rx_tid *tid; 781 struct mt76_wcid *wcid; 782 u16 idx; 783 784 e = (void *)skb->data; 785 idx = le16_to_cpu(e->wlan_id); 786 wcid = mt76_wcid_ptr(dev, idx); 787 if (!wcid || !wcid->sta) 788 break; 789 790 if (e->tid >= ARRAY_SIZE(wcid->aggr)) 791 break; 792 793 tid = rcu_dereference(wcid->aggr[e->tid]); 794 if (!tid) 795 break; 796 797 tid->id = le16_to_cpu(e->id); 798 skb_pull(skb, sizeof(*e)); 799 } 800 break; 801 } 802 case UNI_WED_RRO_BA_SESSION_DELETE: { 803 struct mt7996_mcu_wed_rro_ba_delete_event *e; 804 805 while (skb->len >= sizeof(*e)) { 806 struct mt7996_wed_rro_session_id *session; 807 808 e = (void *)skb->data; 809 session = kzalloc_obj(*session, GFP_ATOMIC); 810 if (!session) 811 break; 812 813 session->id = le16_to_cpu(e->session_id); 814 815 spin_lock_bh(&dev->wed_rro.lock); 816 list_add_tail(&session->list, &dev->wed_rro.poll_list); 817 spin_unlock_bh(&dev->wed_rro.lock); 818 819 ieee80211_queue_work(mt76_hw(dev), &dev->wed_rro.work); 820 skb_pull(skb, sizeof(*e)); 821 } 822 break; 823 } 824 default: 825 break; 826 } 827 } 828 829 static void 830 mt7996_mcu_uni_rx_unsolicited_event(struct mt7996_dev *dev, struct sk_buff *skb) 831 { 832 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 833 834 switch (rxd->eid) { 835 case MCU_UNI_EVENT_FW_LOG_2_HOST: 836 mt7996_mcu_rx_log_message(dev, skb); 837 break; 838 case MCU_UNI_EVENT_IE_COUNTDOWN: 839 mt7996_mcu_ie_countdown(dev, skb); 840 break; 841 case MCU_UNI_EVENT_RDD_REPORT: 842 mt7996_mcu_rx_radar_detected(dev, skb); 843 break; 844 case MCU_UNI_EVENT_ALL_STA_INFO: 845 mt7996_mcu_rx_all_sta_info_event(dev, skb); 846 break; 847 case MCU_UNI_EVENT_WED_RRO: 848 mt7996_mcu_wed_rro_event(dev, skb); 849 break; 850 default: 851 break; 852 } 853 dev_kfree_skb(skb); 854 } 855 856 void mt7996_mcu_rx_event(struct mt7996_dev *dev, struct sk_buff *skb) 857 { 858 struct mt7996_mcu_rxd *rxd = (struct mt7996_mcu_rxd *)skb->data; 859 860 if (rxd->option & MCU_UNI_CMD_UNSOLICITED_EVENT) { 861 mt7996_mcu_uni_rx_unsolicited_event(dev, skb); 862 return; 863 } 864 865 /* WA still uses legacy event*/ 866 if (rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST || 867 !rxd->seq) 868 mt7996_mcu_rx_unsolicited_event(dev, skb); 869 else 870 mt76_mcu_rx_event(&dev->mt76, skb); 871 } 872 873 static struct tlv * 874 mt7996_mcu_add_uni_tlv(struct sk_buff *skb, u16 tag, u16 len) 875 { 876 struct tlv *ptlv = skb_put_zero(skb, len); 877 878 ptlv->tag = cpu_to_le16(tag); 879 ptlv->len = cpu_to_le16(len); 880 881 return ptlv; 882 } 883 884 static void 885 mt7996_mcu_bss_rfch_tlv(struct sk_buff *skb, struct mt7996_phy *phy) 886 { 887 static const u8 rlm_ch_band[] = { 888 [NL80211_BAND_2GHZ] = 1, 889 [NL80211_BAND_5GHZ] = 2, 890 [NL80211_BAND_6GHZ] = 3, 891 }; 892 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 893 struct bss_rlm_tlv *ch; 894 struct tlv *tlv; 895 int freq1 = chandef->center_freq1; 896 897 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RLM, sizeof(*ch)); 898 899 ch = (struct bss_rlm_tlv *)tlv; 900 ch->control_channel = chandef->chan->hw_value; 901 ch->center_chan = ieee80211_frequency_to_channel(freq1); 902 ch->bw = mt76_connac_chan_bw(chandef); 903 ch->tx_streams = hweight8(phy->mt76->antenna_mask); 904 ch->rx_streams = hweight8(phy->mt76->antenna_mask); 905 ch->band = rlm_ch_band[chandef->chan->band]; 906 907 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 908 int freq2 = chandef->center_freq2; 909 910 ch->center_chan2 = ieee80211_frequency_to_channel(freq2); 911 } 912 } 913 914 static void 915 mt7996_mcu_bss_ra_tlv(struct sk_buff *skb, struct mt7996_phy *phy) 916 { 917 struct bss_ra_tlv *ra; 918 struct tlv *tlv; 919 920 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RA, sizeof(*ra)); 921 922 ra = (struct bss_ra_tlv *)tlv; 923 ra->short_preamble = true; 924 } 925 926 static void 927 mt7996_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 928 struct ieee80211_bss_conf *link_conf, 929 struct mt7996_phy *phy) 930 { 931 #define DEFAULT_HE_PE_DURATION 4 932 #define DEFAULT_HE_DURATION_RTS_THRES 1023 933 const struct ieee80211_sta_he_cap *cap; 934 struct bss_info_uni_he *he; 935 struct tlv *tlv; 936 937 cap = mt76_connac_get_he_phy_cap(phy->mt76, vif); 938 939 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_HE_BASIC, sizeof(*he)); 940 941 he = (struct bss_info_uni_he *)tlv; 942 he->he_pe_duration = link_conf->htc_trig_based_pkt_ext; 943 if (!he->he_pe_duration) 944 he->he_pe_duration = DEFAULT_HE_PE_DURATION; 945 946 he->he_rts_thres = cpu_to_le16(link_conf->frame_time_rts_th); 947 if (!he->he_rts_thres) 948 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES); 949 950 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80; 951 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160; 952 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80; 953 } 954 955 static void 956 mt7996_mcu_bss_mbssid_tlv(struct sk_buff *skb, struct ieee80211_bss_conf *link_conf, 957 bool enable) 958 { 959 struct bss_info_uni_mbssid *mbssid; 960 struct tlv *tlv; 961 962 if (!link_conf->bssid_indicator && enable) 963 return; 964 965 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_11V_MBSSID, sizeof(*mbssid)); 966 967 mbssid = (struct bss_info_uni_mbssid *)tlv; 968 969 if (enable) { 970 mbssid->max_indicator = link_conf->bssid_indicator; 971 mbssid->mbss_idx = link_conf->bssid_index; 972 mbssid->tx_bss_omac_idx = 0; 973 } 974 } 975 976 static void 977 mt7996_mcu_bss_bmc_tlv(struct sk_buff *skb, struct mt76_vif_link *mlink, 978 struct mt7996_phy *phy) 979 { 980 struct bss_rate_tlv *bmc; 981 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 982 enum nl80211_band band = chandef->chan->band; 983 struct tlv *tlv; 984 u8 idx = mlink->mcast_rates_idx ? 985 mlink->mcast_rates_idx : mlink->basic_rates_idx; 986 987 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_RATE, sizeof(*bmc)); 988 989 bmc = (struct bss_rate_tlv *)tlv; 990 991 bmc->short_preamble = (band == NL80211_BAND_2GHZ); 992 bmc->bc_fixed_rate = idx; 993 bmc->mc_fixed_rate = idx; 994 } 995 996 static void 997 mt7996_mcu_bss_txcmd_tlv(struct sk_buff *skb, bool en) 998 { 999 struct bss_txcmd_tlv *txcmd; 1000 struct tlv *tlv; 1001 1002 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_TXCMD, sizeof(*txcmd)); 1003 1004 txcmd = (struct bss_txcmd_tlv *)tlv; 1005 txcmd->txcmd_mode = en; 1006 } 1007 1008 static void 1009 mt7996_mcu_bss_mld_tlv(struct sk_buff *skb, 1010 struct ieee80211_bss_conf *link_conf, 1011 struct mt7996_vif_link *link) 1012 { 1013 struct ieee80211_vif *vif = link_conf->vif; 1014 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 1015 struct bss_mld_tlv *mld; 1016 struct tlv *tlv; 1017 1018 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_MLD, sizeof(*mld)); 1019 mld = (struct bss_mld_tlv *)tlv; 1020 mld->own_mld_id = link->mld_idx; 1021 mld->link_id = link_conf->link_id; 1022 1023 if (ieee80211_vif_is_mld(vif)) { 1024 mld->group_mld_id = mvif->mld_group_idx; 1025 mld->remap_idx = mvif->mld_remap_idx; 1026 memcpy(mld->mac_addr, vif->addr, ETH_ALEN); 1027 } else { 1028 mld->group_mld_id = 0xff; 1029 mld->remap_idx = 0xff; 1030 } 1031 } 1032 1033 static void 1034 mt7996_mcu_bss_sec_tlv(struct sk_buff *skb, struct mt76_vif_link *mlink) 1035 { 1036 struct bss_sec_tlv *sec; 1037 struct tlv *tlv; 1038 1039 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_SEC, sizeof(*sec)); 1040 1041 sec = (struct bss_sec_tlv *)tlv; 1042 sec->cipher = mlink->cipher; 1043 } 1044 1045 static int 1046 mt7996_mcu_muar_config(struct mt7996_dev *dev, struct mt76_vif_link *mlink, 1047 const u8 *addr, bool bssid, bool enable) 1048 { 1049 #define UNI_MUAR_ENTRY 2 1050 u32 idx = mlink->omac_idx - REPEATER_BSSID_START; 1051 struct { 1052 struct { 1053 u8 band; 1054 u8 __rsv[3]; 1055 } hdr; 1056 1057 __le16 tag; 1058 __le16 len; 1059 1060 bool smesh; 1061 u8 bssid; 1062 u8 index; 1063 u8 entry_add; 1064 u8 addr[ETH_ALEN]; 1065 u8 __rsv[2]; 1066 } __packed req = { 1067 .hdr.band = mlink->band_idx, 1068 .tag = cpu_to_le16(UNI_MUAR_ENTRY), 1069 .len = cpu_to_le16(sizeof(req) - sizeof(req.hdr)), 1070 .smesh = false, 1071 .index = idx * 2 + bssid, 1072 .entry_add = true, 1073 }; 1074 1075 if (enable) 1076 memcpy(req.addr, addr, ETH_ALEN); 1077 1078 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REPT_MUAR), &req, 1079 sizeof(req), true); 1080 } 1081 1082 static void 1083 mt7996_mcu_bss_ifs_timing_tlv(struct sk_buff *skb, struct mt7996_phy *phy) 1084 { 1085 struct bss_ifs_time_tlv *ifs_time; 1086 struct tlv *tlv; 1087 bool is_2ghz = phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ; 1088 1089 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_IFS_TIME, sizeof(*ifs_time)); 1090 1091 ifs_time = (struct bss_ifs_time_tlv *)tlv; 1092 ifs_time->slot_valid = true; 1093 ifs_time->sifs_valid = true; 1094 ifs_time->rifs_valid = true; 1095 ifs_time->eifs_valid = true; 1096 1097 ifs_time->slot_time = cpu_to_le16(phy->slottime); 1098 ifs_time->sifs_time = cpu_to_le16(10); 1099 ifs_time->rifs_time = cpu_to_le16(2); 1100 ifs_time->eifs_time = cpu_to_le16(is_2ghz ? 78 : 84); 1101 1102 if (is_2ghz) { 1103 ifs_time->eifs_cck_valid = true; 1104 ifs_time->eifs_cck_time = cpu_to_le16(314); 1105 } 1106 } 1107 1108 static int 1109 mt7996_mcu_bss_basic_tlv(struct sk_buff *skb, 1110 struct ieee80211_vif *vif, 1111 struct ieee80211_bss_conf *link_conf, 1112 struct mt76_vif_link *mvif, 1113 struct mt76_phy *phy, u16 wlan_idx, 1114 bool enable) 1115 { 1116 struct cfg80211_chan_def *chandef = &phy->chandef; 1117 struct mt76_connac_bss_basic_tlv *bss; 1118 u32 type = CONNECTION_INFRA_AP; 1119 u16 sta_wlan_idx = wlan_idx; 1120 struct tlv *tlv; 1121 int idx; 1122 1123 switch (vif->type) { 1124 case NL80211_IFTYPE_MESH_POINT: 1125 case NL80211_IFTYPE_AP: 1126 case NL80211_IFTYPE_MONITOR: 1127 break; 1128 case NL80211_IFTYPE_STATION: 1129 if (enable) { 1130 struct ieee80211_sta *sta; 1131 1132 rcu_read_lock(); 1133 sta = ieee80211_find_sta(vif, link_conf->bssid); 1134 if (sta) { 1135 struct mt7996_sta *msta = (void *)sta->drv_priv; 1136 struct mt7996_sta_link *msta_link; 1137 int link_id = link_conf->link_id; 1138 1139 msta_link = rcu_dereference(msta->link[link_id]); 1140 if (msta_link) 1141 sta_wlan_idx = msta_link->wcid.idx; 1142 } 1143 rcu_read_unlock(); 1144 } 1145 type = CONNECTION_INFRA_STA; 1146 break; 1147 case NL80211_IFTYPE_ADHOC: 1148 type = CONNECTION_IBSS_ADHOC; 1149 break; 1150 default: 1151 WARN_ON(1); 1152 break; 1153 } 1154 1155 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_BASIC, sizeof(*bss)); 1156 1157 bss = (struct mt76_connac_bss_basic_tlv *)tlv; 1158 bss->bmc_tx_wlan_idx = cpu_to_le16(wlan_idx); 1159 bss->sta_idx = cpu_to_le16(sta_wlan_idx); 1160 bss->conn_type = cpu_to_le32(type); 1161 bss->omac_idx = mvif->omac_idx; 1162 bss->band_idx = mvif->band_idx; 1163 bss->wmm_idx = mvif->wmm_idx; 1164 bss->conn_state = !enable; 1165 bss->active = enable; 1166 1167 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; 1168 bss->hw_bss_idx = idx; 1169 1170 if (vif->type == NL80211_IFTYPE_MONITOR) { 1171 memcpy(bss->bssid, phy->macaddr, ETH_ALEN); 1172 return 0; 1173 } 1174 1175 memcpy(bss->bssid, link_conf->bssid, ETH_ALEN); 1176 bss->bcn_interval = cpu_to_le16(link_conf->beacon_int); 1177 bss->dtim_period = link_conf->dtim_period; 1178 bss->phymode = mt76_connac_get_phy_mode(phy, vif, 1179 chandef->chan->band, NULL); 1180 bss->phymode_ext = mt76_connac_get_phy_mode_ext(phy, link_conf, 1181 chandef->chan->band); 1182 1183 return 0; 1184 } 1185 1186 static struct sk_buff * 1187 __mt7996_mcu_alloc_bss_req(struct mt76_dev *dev, struct mt76_vif_link *mvif, int len) 1188 { 1189 struct bss_req_hdr hdr = { 1190 .bss_idx = mvif->idx, 1191 }; 1192 struct sk_buff *skb; 1193 1194 skb = mt76_mcu_msg_alloc(dev, NULL, len); 1195 if (!skb) 1196 return ERR_PTR(-ENOMEM); 1197 1198 skb_put_data(skb, &hdr, sizeof(hdr)); 1199 1200 return skb; 1201 } 1202 1203 int mt7996_mcu_add_bss_info(struct mt7996_phy *phy, struct ieee80211_vif *vif, 1204 struct ieee80211_bss_conf *link_conf, 1205 struct mt76_vif_link *mlink, 1206 struct mt7996_sta_link *msta_link, int enable) 1207 { 1208 struct mt7996_dev *dev = phy->dev; 1209 struct sk_buff *skb; 1210 1211 if (mlink->omac_idx >= REPEATER_BSSID_START) { 1212 mt7996_mcu_muar_config(dev, mlink, link_conf->addr, false, enable); 1213 mt7996_mcu_muar_config(dev, mlink, link_conf->bssid, true, enable); 1214 } 1215 1216 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, 1217 MT7996_BSS_UPDATE_MAX_SIZE); 1218 if (IS_ERR(skb)) 1219 return PTR_ERR(skb); 1220 1221 /* bss_basic must be first */ 1222 mt7996_mcu_bss_basic_tlv(skb, vif, link_conf, mlink, phy->mt76, 1223 msta_link->wcid.idx, enable); 1224 mt7996_mcu_bss_sec_tlv(skb, mlink); 1225 1226 if (vif->type == NL80211_IFTYPE_MONITOR) 1227 goto out; 1228 1229 if (enable) { 1230 struct mt7996_vif_link *link; 1231 1232 mt7996_mcu_bss_rfch_tlv(skb, phy); 1233 mt7996_mcu_bss_bmc_tlv(skb, mlink, phy); 1234 mt7996_mcu_bss_ra_tlv(skb, phy); 1235 mt7996_mcu_bss_txcmd_tlv(skb, true); 1236 mt7996_mcu_bss_ifs_timing_tlv(skb, phy); 1237 1238 if (vif->bss_conf.he_support) 1239 mt7996_mcu_bss_he_tlv(skb, vif, link_conf, phy); 1240 1241 /* this tag is necessary no matter if the vif is MLD */ 1242 link = container_of(mlink, struct mt7996_vif_link, mt76); 1243 mt7996_mcu_bss_mld_tlv(skb, link_conf, link); 1244 } 1245 1246 mt7996_mcu_bss_mbssid_tlv(skb, link_conf, enable); 1247 1248 out: 1249 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1250 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 1251 } 1252 1253 int mt7996_mcu_update_bss_rfch(struct mt7996_phy *phy, struct mt7996_vif_link *link) 1254 { 1255 struct mt7996_dev *dev = phy->dev; 1256 struct sk_buff *skb; 1257 1258 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &link->mt76, 1259 MT7996_BSS_UPDATE_MAX_SIZE); 1260 if (IS_ERR(skb)) 1261 return PTR_ERR(skb); 1262 1263 mt7996_mcu_bss_rfch_tlv(skb, phy); 1264 1265 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1266 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 1267 } 1268 1269 int mt7996_mcu_set_protection(struct mt7996_phy *phy, struct mt7996_vif_link *link, 1270 u8 ht_mode, bool use_cts_prot) 1271 { 1272 struct mt7996_dev *dev = phy->dev; 1273 struct bss_prot_tlv *prot; 1274 struct sk_buff *skb; 1275 struct tlv *tlv; 1276 enum { 1277 PROT_NONMEMBER = BIT(1), 1278 PROT_20MHZ = BIT(2), 1279 PROT_NONHT_MIXED = BIT(3), 1280 PROT_LEGACY_ERP = BIT(5), 1281 PROT_NONGF_STA = BIT(7), 1282 }; 1283 1284 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &link->mt76, 1285 MT7996_BSS_UPDATE_MAX_SIZE); 1286 if (IS_ERR(skb)) 1287 return PTR_ERR(skb); 1288 1289 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_PROTECT_INFO, 1290 sizeof(*prot)); 1291 prot = (struct bss_prot_tlv *)tlv; 1292 1293 switch (ht_mode & IEEE80211_HT_OP_MODE_PROTECTION) { 1294 case IEEE80211_HT_OP_MODE_PROTECTION_NONMEMBER: 1295 prot->prot_mode = cpu_to_le32(PROT_NONMEMBER); 1296 break; 1297 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ: 1298 prot->prot_mode = cpu_to_le32(PROT_20MHZ); 1299 break; 1300 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED: 1301 prot->prot_mode = cpu_to_le32(PROT_NONHT_MIXED); 1302 break; 1303 } 1304 1305 if (ht_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT) 1306 prot->prot_mode |= cpu_to_le32(PROT_NONGF_STA); 1307 1308 if (use_cts_prot) 1309 prot->prot_mode |= cpu_to_le32(PROT_LEGACY_ERP); 1310 1311 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1312 MCU_WM_UNI_CMD(BSS_INFO_UPDATE), true); 1313 } 1314 1315 int mt7996_mcu_set_emlsr_mode(struct mt7996_dev *dev, 1316 struct ieee80211_vif *vif, 1317 struct ieee80211_sta *sta, 1318 struct ieee80211_eml_params *eml_params) 1319 { 1320 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1321 struct mt7996_sta_link *msta_link; 1322 struct sta_rec_eml_op *eml_op; 1323 struct mt7996_vif_link *link; 1324 struct sk_buff *skb; 1325 struct tlv *tlv; 1326 1327 msta_link = mt76_dereference(msta->link[eml_params->link_id], 1328 &dev->mt76); 1329 if (!msta_link) 1330 return -EINVAL; 1331 1332 link = mt7996_vif_link(dev, vif, eml_params->link_id); 1333 if (!link) 1334 return -EINVAL; 1335 1336 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &link->mt76, 1337 &msta_link->wcid, 1338 MT7996_STA_UPDATE_MAX_SIZE); 1339 if (IS_ERR(skb)) 1340 return PTR_ERR(skb); 1341 1342 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_EML_OP, sizeof(*eml_op)); 1343 eml_op = (struct sta_rec_eml_op *)tlv; 1344 eml_op->link_bitmap = 0; 1345 1346 if (eml_params->control & IEEE80211_EML_CTRL_EMLSR_MODE) { 1347 unsigned long link_bitmap = eml_params->link_bitmap; 1348 unsigned int link_id; 1349 1350 for_each_set_bit(link_id, &link_bitmap, 1351 IEEE80211_MLD_MAX_NUM_LINKS) { 1352 struct mt76_phy *mphy; 1353 1354 link = mt7996_vif_link(dev, vif, link_id); 1355 if (!link) 1356 continue; 1357 1358 mphy = mt76_vif_link_phy(&link->mt76); 1359 if (!mphy) 1360 continue; 1361 1362 eml_op->link_bitmap |= BIT(mphy->band_idx); 1363 } 1364 } 1365 1366 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1367 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 1368 } 1369 1370 int mt7996_mcu_set_timing(struct mt7996_phy *phy, struct ieee80211_vif *vif, 1371 struct ieee80211_bss_conf *link_conf) 1372 { 1373 struct mt7996_dev *dev = phy->dev; 1374 struct mt76_vif_link *mlink = mt76_vif_conf_link(&dev->mt76, vif, link_conf); 1375 struct sk_buff *skb; 1376 1377 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, 1378 MT7996_BSS_UPDATE_MAX_SIZE); 1379 if (IS_ERR(skb)) 1380 return PTR_ERR(skb); 1381 1382 mt7996_mcu_bss_ifs_timing_tlv(skb, phy); 1383 1384 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1385 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 1386 } 1387 1388 static int 1389 mt7996_mcu_sta_ba(struct mt7996_dev *dev, struct mt76_vif_link *mvif, 1390 struct ieee80211_ampdu_params *params, 1391 struct mt76_wcid *wcid, bool enable, bool tx) 1392 { 1393 struct sta_rec_ba_uni *ba; 1394 struct sk_buff *skb; 1395 struct tlv *tlv; 1396 1397 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, mvif, wcid, 1398 MT7996_STA_UPDATE_MAX_SIZE); 1399 if (IS_ERR(skb)) 1400 return PTR_ERR(skb); 1401 1402 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba)); 1403 1404 ba = (struct sta_rec_ba_uni *)tlv; 1405 ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT; 1406 ba->winsize = cpu_to_le16(params->buf_size); 1407 ba->ssn = cpu_to_le16(params->ssn); 1408 ba->ba_en = enable << params->tid; 1409 ba->amsdu = params->amsdu; 1410 ba->tid = params->tid; 1411 ba->ba_rdd_rro = !tx && enable && mt7996_has_hwrro(dev); 1412 1413 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 1414 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 1415 } 1416 1417 /** starec & wtbl **/ 1418 int mt7996_mcu_add_tx_ba(struct mt7996_dev *dev, 1419 struct ieee80211_ampdu_params *params, 1420 struct ieee80211_vif *vif, bool enable) 1421 { 1422 struct ieee80211_sta *sta = params->sta; 1423 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1424 struct ieee80211_link_sta *link_sta; 1425 unsigned int link_id; 1426 int ret = 0; 1427 1428 for_each_sta_active_link(vif, sta, link_sta, link_id) { 1429 struct mt7996_sta_link *msta_link; 1430 struct mt7996_vif_link *link; 1431 1432 msta_link = mt76_dereference(msta->link[link_id], &dev->mt76); 1433 if (!msta_link) 1434 continue; 1435 1436 link = mt7996_vif_link(dev, vif, link_id); 1437 if (!link) 1438 continue; 1439 1440 if (enable && !params->amsdu) 1441 msta_link->wcid.amsdu = false; 1442 1443 ret = mt7996_mcu_sta_ba(dev, &link->mt76, params, 1444 &msta_link->wcid, enable, true); 1445 if (ret) 1446 break; 1447 } 1448 1449 return ret; 1450 } 1451 1452 int mt7996_mcu_add_rx_ba(struct mt7996_dev *dev, 1453 struct ieee80211_ampdu_params *params, 1454 struct ieee80211_vif *vif, bool enable) 1455 { 1456 struct ieee80211_sta *sta = params->sta; 1457 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 1458 struct ieee80211_link_sta *link_sta; 1459 unsigned int link_id; 1460 int ret = 0; 1461 1462 for_each_sta_active_link(vif, sta, link_sta, link_id) { 1463 struct mt7996_sta_link *msta_link; 1464 struct mt7996_vif_link *link; 1465 1466 msta_link = mt76_dereference(msta->link[link_id], &dev->mt76); 1467 if (!msta_link) 1468 continue; 1469 1470 link = mt7996_vif_link(dev, vif, link_id); 1471 if (!link) 1472 continue; 1473 1474 ret = mt7996_mcu_sta_ba(dev, &link->mt76, params, 1475 &msta_link->wcid, enable, false); 1476 if (ret) 1477 break; 1478 } 1479 1480 return ret; 1481 } 1482 1483 static void 1484 mt7996_mcu_sta_he_tlv(struct sk_buff *skb, 1485 struct ieee80211_link_sta *link_sta, 1486 struct mt7996_vif_link *link) 1487 { 1488 struct ieee80211_he_cap_elem *elem = &link_sta->he_cap.he_cap_elem; 1489 struct ieee80211_he_mcs_nss_supp mcs_map; 1490 struct sta_rec_he_v2 *he; 1491 struct tlv *tlv; 1492 int i = 0; 1493 1494 if (!link_sta->he_cap.has_he) 1495 return; 1496 1497 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_V2, sizeof(*he)); 1498 1499 he = (struct sta_rec_he_v2 *)tlv; 1500 for (i = 0; i < 11; i++) { 1501 if (i < 6) 1502 he->he_mac_cap[i] = elem->mac_cap_info[i]; 1503 he->he_phy_cap[i] = elem->phy_cap_info[i]; 1504 } 1505 1506 mcs_map = link_sta->he_cap.he_mcs_nss_supp; 1507 switch (link_sta->bandwidth) { 1508 case IEEE80211_STA_RX_BW_160: 1509 if (elem->phy_cap_info[0] & 1510 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) 1511 mt7996_mcu_set_sta_he_mcs(link_sta, link, 1512 &he->max_nss_mcs[CMD_HE_MCS_BW8080], 1513 le16_to_cpu(mcs_map.rx_mcs_80p80)); 1514 1515 mt7996_mcu_set_sta_he_mcs(link_sta, link, 1516 &he->max_nss_mcs[CMD_HE_MCS_BW160], 1517 le16_to_cpu(mcs_map.rx_mcs_160)); 1518 fallthrough; 1519 default: 1520 mt7996_mcu_set_sta_he_mcs(link_sta, link, 1521 &he->max_nss_mcs[CMD_HE_MCS_BW80], 1522 le16_to_cpu(mcs_map.rx_mcs_80)); 1523 break; 1524 } 1525 1526 he->pkt_ext = 2; 1527 } 1528 1529 static void 1530 mt7996_mcu_sta_he_6g_tlv(struct sk_buff *skb, 1531 struct ieee80211_link_sta *link_sta) 1532 { 1533 struct sta_rec_he_6g_capa *he_6g; 1534 struct tlv *tlv; 1535 1536 if (!link_sta->he_6ghz_capa.capa) 1537 return; 1538 1539 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G, sizeof(*he_6g)); 1540 1541 he_6g = (struct sta_rec_he_6g_capa *)tlv; 1542 he_6g->capa = link_sta->he_6ghz_capa.capa; 1543 } 1544 1545 static void 1546 mt7996_mcu_sta_eht_tlv(struct sk_buff *skb, 1547 struct ieee80211_link_sta *link_sta) 1548 { 1549 struct mt7996_sta *msta = (struct mt7996_sta *)link_sta->sta->drv_priv; 1550 struct ieee80211_vif *vif = container_of((void *)msta->vif, 1551 struct ieee80211_vif, drv_priv); 1552 struct ieee80211_eht_mcs_nss_supp *mcs_map; 1553 struct ieee80211_eht_cap_elem_fixed *elem; 1554 struct sta_rec_eht *eht; 1555 struct tlv *tlv; 1556 1557 if (!link_sta->eht_cap.has_eht) 1558 return; 1559 1560 mcs_map = &link_sta->eht_cap.eht_mcs_nss_supp; 1561 elem = &link_sta->eht_cap.eht_cap_elem; 1562 1563 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_EHT, sizeof(*eht)); 1564 1565 eht = (struct sta_rec_eht *)tlv; 1566 eht->tid_bitmap = 0xff; 1567 eht->mac_cap = cpu_to_le16(*(u16 *)elem->mac_cap_info); 1568 eht->phy_cap = cpu_to_le64(*(u64 *)elem->phy_cap_info); 1569 eht->phy_cap_ext = cpu_to_le64(elem->phy_cap_info[8]); 1570 1571 if (vif->type != NL80211_IFTYPE_STATION && 1572 (link_sta->he_cap.he_cap_elem.phy_cap_info[0] & 1573 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G | 1574 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G | 1575 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G | 1576 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)) == 0) { 1577 memcpy(eht->mcs_map_bw20, &mcs_map->only_20mhz, 1578 sizeof(eht->mcs_map_bw20)); 1579 return; 1580 } 1581 1582 memcpy(eht->mcs_map_bw80, &mcs_map->bw._80, sizeof(eht->mcs_map_bw80)); 1583 memcpy(eht->mcs_map_bw160, &mcs_map->bw._160, sizeof(eht->mcs_map_bw160)); 1584 memcpy(eht->mcs_map_bw320, &mcs_map->bw._320, sizeof(eht->mcs_map_bw320)); 1585 } 1586 1587 static void 1588 mt7996_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_link_sta *link_sta) 1589 { 1590 struct sta_rec_ht_uni *ht; 1591 struct tlv *tlv; 1592 1593 if (!link_sta->ht_cap.ht_supported) 1594 return; 1595 1596 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht)); 1597 1598 ht = (struct sta_rec_ht_uni *)tlv; 1599 ht->ht_cap = cpu_to_le16(link_sta->ht_cap.cap); 1600 ht->ampdu_param = u8_encode_bits(link_sta->ht_cap.ampdu_factor, 1601 IEEE80211_HT_AMPDU_PARM_FACTOR) | 1602 u8_encode_bits(link_sta->ht_cap.ampdu_density, 1603 IEEE80211_HT_AMPDU_PARM_DENSITY); 1604 } 1605 1606 static void 1607 mt7996_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_link_sta *link_sta) 1608 { 1609 struct sta_rec_vht *vht; 1610 struct tlv *tlv; 1611 1612 /* For 6G band, this tlv is necessary to let hw work normally */ 1613 if (!link_sta->he_6ghz_capa.capa && !link_sta->vht_cap.vht_supported) 1614 return; 1615 1616 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht)); 1617 1618 vht = (struct sta_rec_vht *)tlv; 1619 vht->vht_cap = cpu_to_le32(link_sta->vht_cap.cap); 1620 vht->vht_rx_mcs_map = link_sta->vht_cap.vht_mcs.rx_mcs_map; 1621 vht->vht_tx_mcs_map = link_sta->vht_cap.vht_mcs.tx_mcs_map; 1622 } 1623 1624 static void 1625 mt7996_mcu_sta_amsdu_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1626 struct ieee80211_vif *vif, 1627 struct ieee80211_link_sta *link_sta, 1628 struct mt7996_sta_link *msta_link) 1629 { 1630 struct sta_rec_amsdu *amsdu; 1631 struct tlv *tlv; 1632 1633 if (vif->type != NL80211_IFTYPE_STATION && 1634 vif->type != NL80211_IFTYPE_MESH_POINT && 1635 vif->type != NL80211_IFTYPE_AP) 1636 return; 1637 1638 if (!link_sta->agg.max_amsdu_len) 1639 return; 1640 1641 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu)); 1642 amsdu = (struct sta_rec_amsdu *)tlv; 1643 amsdu->max_amsdu_num = 8; 1644 amsdu->amsdu_en = true; 1645 msta_link->wcid.amsdu = true; 1646 1647 switch (link_sta->agg.max_amsdu_len) { 1648 case IEEE80211_MAX_MPDU_LEN_VHT_11454: 1649 amsdu->max_mpdu_size = 1650 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; 1651 return; 1652 case IEEE80211_MAX_MPDU_LEN_HT_7935: 1653 case IEEE80211_MAX_MPDU_LEN_VHT_7991: 1654 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991; 1655 return; 1656 default: 1657 amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; 1658 return; 1659 } 1660 } 1661 1662 static void 1663 mt7996_mcu_sta_muru_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1664 struct ieee80211_bss_conf *link_conf, 1665 struct ieee80211_link_sta *link_sta) 1666 { 1667 struct ieee80211_he_cap_elem *elem = &link_sta->he_cap.he_cap_elem; 1668 struct sta_rec_muru *muru; 1669 struct tlv *tlv; 1670 1671 if (link_conf->vif->type != NL80211_IFTYPE_STATION && 1672 link_conf->vif->type != NL80211_IFTYPE_AP) 1673 return; 1674 1675 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru)); 1676 1677 muru = (struct sta_rec_muru *)tlv; 1678 muru->cfg.mimo_dl_en = link_conf->eht_mu_beamformer || 1679 link_conf->he_mu_beamformer || 1680 link_conf->vht_mu_beamformer || 1681 link_conf->vht_mu_beamformee; 1682 muru->cfg.ofdma_dl_en = true; 1683 1684 if (link_sta->vht_cap.vht_supported) 1685 muru->mimo_dl.vht_mu_bfee = 1686 !!(link_sta->vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE); 1687 1688 if (!link_sta->he_cap.has_he) 1689 return; 1690 1691 muru->mimo_dl.partial_bw_dl_mimo = 1692 HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]); 1693 1694 muru->mimo_ul.full_ul_mimo = 1695 HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]); 1696 muru->mimo_ul.partial_ul_mimo = 1697 HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]); 1698 1699 muru->ofdma_dl.punc_pream_rx = 1700 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]); 1701 muru->ofdma_dl.he_20m_in_40m_2g = 1702 HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]); 1703 muru->ofdma_dl.he_20m_in_160m = 1704 HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); 1705 muru->ofdma_dl.he_80m_in_160m = 1706 HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]); 1707 1708 muru->ofdma_ul.t_frame_dur = 1709 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]); 1710 muru->ofdma_ul.mu_cascading = 1711 HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]); 1712 muru->ofdma_ul.uo_ra = 1713 HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]); 1714 muru->ofdma_ul.rx_ctrl_frame_to_mbss = 1715 HE_MAC(CAP3_RX_CTRL_FRAME_TO_MULTIBSS, elem->mac_cap_info[3]); 1716 } 1717 1718 static inline bool 1719 mt7996_is_ebf_supported(struct mt7996_phy *phy, 1720 struct ieee80211_bss_conf *link_conf, 1721 struct ieee80211_link_sta *link_sta, bool bfee) 1722 { 1723 int sts = hweight16(phy->mt76->chainmask); 1724 1725 if (link_conf->vif->type != NL80211_IFTYPE_STATION && 1726 link_conf->vif->type != NL80211_IFTYPE_AP) 1727 return false; 1728 1729 if (!bfee && sts < 2) 1730 return false; 1731 1732 if (link_sta->eht_cap.has_eht) { 1733 struct ieee80211_sta_eht_cap *pc = &link_sta->eht_cap; 1734 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem; 1735 1736 if (bfee) 1737 return link_conf->eht_su_beamformee && 1738 EHT_PHY(CAP0_SU_BEAMFORMER, pe->phy_cap_info[0]); 1739 else 1740 return link_conf->eht_su_beamformer && 1741 EHT_PHY(CAP0_SU_BEAMFORMEE, pe->phy_cap_info[0]); 1742 } 1743 1744 if (link_sta->he_cap.has_he) { 1745 struct ieee80211_he_cap_elem *pe = &link_sta->he_cap.he_cap_elem; 1746 1747 if (bfee) 1748 return link_conf->he_su_beamformee && 1749 HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]); 1750 else 1751 return link_conf->he_su_beamformer && 1752 HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]); 1753 } 1754 1755 if (link_sta->vht_cap.vht_supported) { 1756 u32 cap = link_sta->vht_cap.cap; 1757 1758 if (bfee) 1759 return link_conf->vht_su_beamformee && 1760 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE); 1761 else 1762 return link_conf->vht_su_beamformer && 1763 (cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE); 1764 } 1765 1766 return false; 1767 } 1768 1769 static void 1770 mt7996_mcu_sta_sounding_rate(struct sta_rec_bf *bf, struct mt7996_phy *phy) 1771 { 1772 bf->sounding_phy = MT_PHY_TYPE_OFDM; 1773 bf->ndp_rate = 0; /* mcs0 */ 1774 if (is_mt7996(phy->mt76->dev)) 1775 bf->ndpa_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1776 else 1777 bf->ndpa_rate = MT7992_CFEND_RATE_DEFAULT; /* ofdm 6m */ 1778 1779 bf->rept_poll_rate = MT7996_CFEND_RATE_DEFAULT; /* ofdm 24m */ 1780 } 1781 1782 static void 1783 mt7996_mcu_sta_bfer_ht(struct ieee80211_link_sta *link_sta, 1784 struct mt7996_phy *phy, struct sta_rec_bf *bf, 1785 bool explicit) 1786 { 1787 struct ieee80211_mcs_info *mcs = &link_sta->ht_cap.mcs; 1788 u8 n = 0; 1789 1790 bf->tx_mode = MT_PHY_TYPE_HT; 1791 1792 if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) && 1793 (mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED)) 1794 n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK, 1795 mcs->tx_params); 1796 else if (mcs->rx_mask[3]) 1797 n = 3; 1798 else if (mcs->rx_mask[2]) 1799 n = 2; 1800 else if (mcs->rx_mask[1]) 1801 n = 1; 1802 1803 bf->nrow = hweight8(phy->mt76->antenna_mask) - 1; 1804 bf->ncol = min_t(u8, bf->nrow, n); 1805 bf->ibf_ncol = explicit ? min_t(u8, MT7996_IBF_MAX_NC, bf->ncol) : 1806 min_t(u8, MT7996_IBF_MAX_NC, n); 1807 } 1808 1809 static void 1810 mt7996_mcu_sta_bfer_vht(struct ieee80211_link_sta *link_sta, 1811 struct mt7996_phy *phy, struct sta_rec_bf *bf, 1812 bool explicit) 1813 { 1814 struct ieee80211_sta_vht_cap *pc = &link_sta->vht_cap; 1815 struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap; 1816 u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map); 1817 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1818 u8 tx_ant = hweight8(phy->mt76->antenna_mask) - 1; 1819 1820 bf->tx_mode = MT_PHY_TYPE_VHT; 1821 1822 if (explicit) { 1823 u8 sts, snd_dim; 1824 1825 mt7996_mcu_sta_sounding_rate(bf, phy); 1826 1827 sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK, 1828 pc->cap); 1829 snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 1830 vc->cap); 1831 bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant); 1832 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1833 bf->ibf_ncol = min_t(u8, MT7996_IBF_MAX_NC, bf->ncol); 1834 1835 if (link_sta->bandwidth == IEEE80211_STA_RX_BW_160) 1836 bf->nrow = 1; 1837 } else { 1838 bf->nrow = tx_ant; 1839 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1840 bf->ibf_ncol = min_t(u8, MT7996_IBF_MAX_NC, nss_mcs); 1841 1842 if (link_sta->bandwidth == IEEE80211_STA_RX_BW_160) 1843 bf->ibf_nrow = 1; 1844 } 1845 } 1846 1847 static void 1848 mt7996_mcu_sta_bfer_he(struct ieee80211_link_sta *link_sta, 1849 struct ieee80211_vif *vif, struct mt7996_phy *phy, 1850 struct sta_rec_bf *bf, bool explicit) 1851 { 1852 struct ieee80211_sta_he_cap *pc = &link_sta->he_cap; 1853 struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem; 1854 const struct ieee80211_sta_he_cap *vc = 1855 mt76_connac_get_he_phy_cap(phy->mt76, vif); 1856 const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem; 1857 u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80); 1858 u8 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1859 u8 snd_dim, sts; 1860 1861 if (!vc) 1862 return; 1863 1864 bf->tx_mode = MT_PHY_TYPE_HE_SU; 1865 1866 mt7996_mcu_sta_sounding_rate(bf, phy); 1867 1868 bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB, 1869 pe->phy_cap_info[6]); 1870 bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB, 1871 pe->phy_cap_info[6]); 1872 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 1873 ve->phy_cap_info[5]); 1874 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK, 1875 pe->phy_cap_info[4]); 1876 bf->nrow = min_t(u8, snd_dim, sts); 1877 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1878 bf->ibf_ncol = explicit ? min_t(u8, MT7996_IBF_MAX_NC, bf->ncol) : 1879 min_t(u8, MT7996_IBF_MAX_NC, nss_mcs); 1880 1881 if (link_sta->bandwidth != IEEE80211_STA_RX_BW_160) 1882 return; 1883 1884 /* go over for 160MHz and 80p80 */ 1885 if (pe->phy_cap_info[0] & 1886 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) { 1887 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160); 1888 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1889 1890 bf->ncol_gt_bw80 = nss_mcs; 1891 } 1892 1893 if (pe->phy_cap_info[0] & 1894 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) { 1895 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80); 1896 nss_mcs = mt7996_mcu_get_sta_nss(mcs_map); 1897 1898 if (bf->ncol_gt_bw80) 1899 bf->ncol_gt_bw80 = min_t(u8, bf->ncol_gt_bw80, nss_mcs); 1900 else 1901 bf->ncol_gt_bw80 = nss_mcs; 1902 } 1903 1904 snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK, 1905 ve->phy_cap_info[5]); 1906 sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK, 1907 pe->phy_cap_info[4]); 1908 1909 bf->nrow_gt_bw80 = min_t(int, snd_dim, sts); 1910 } 1911 1912 static void 1913 mt7996_mcu_sta_bfer_eht(struct ieee80211_link_sta *link_sta, 1914 struct ieee80211_vif *vif, struct mt7996_phy *phy, 1915 struct sta_rec_bf *bf, bool explicit) 1916 { 1917 struct ieee80211_sta_eht_cap *pc = &link_sta->eht_cap; 1918 struct ieee80211_eht_cap_elem_fixed *pe = &pc->eht_cap_elem; 1919 struct ieee80211_eht_mcs_nss_supp *eht_nss = &pc->eht_mcs_nss_supp; 1920 const struct ieee80211_sta_eht_cap *vc = 1921 mt76_connac_get_eht_phy_cap(phy->mt76, vif); 1922 const struct ieee80211_eht_cap_elem_fixed *ve = &vc->eht_cap_elem; 1923 u8 nss_mcs = u8_get_bits(eht_nss->bw._80.rx_tx_mcs9_max_nss, 1924 IEEE80211_EHT_MCS_NSS_RX) - 1; 1925 u8 snd_dim, sts; 1926 1927 bf->tx_mode = MT_PHY_TYPE_EHT_MU; 1928 1929 mt7996_mcu_sta_sounding_rate(bf, phy); 1930 1931 bf->trigger_su = EHT_PHY(CAP3_TRIG_SU_BF_FDBK, pe->phy_cap_info[3]); 1932 bf->trigger_mu = EHT_PHY(CAP3_TRIG_MU_BF_PART_BW_FDBK, pe->phy_cap_info[3]); 1933 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_80MHZ_MASK, ve->phy_cap_info[2]); 1934 sts = EHT_PHY(CAP0_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[0]) + 1935 (EHT_PHY(CAP1_BEAMFORMEE_SS_80MHZ_MASK, pe->phy_cap_info[1]) << 1); 1936 bf->nrow = min_t(u8, snd_dim, sts); 1937 bf->ncol = min_t(u8, nss_mcs, bf->nrow); 1938 bf->ibf_ncol = explicit ? min_t(u8, MT7996_IBF_MAX_NC, bf->ncol) : 1939 min_t(u8, MT7996_IBF_MAX_NC, nss_mcs); 1940 1941 if (link_sta->bandwidth < IEEE80211_STA_RX_BW_160) 1942 return; 1943 1944 switch (link_sta->bandwidth) { 1945 case IEEE80211_STA_RX_BW_160: 1946 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_160MHZ_MASK, ve->phy_cap_info[2]); 1947 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_160MHZ_MASK, pe->phy_cap_info[1]); 1948 nss_mcs = u8_get_bits(eht_nss->bw._160.rx_tx_mcs9_max_nss, 1949 IEEE80211_EHT_MCS_NSS_RX) - 1; 1950 1951 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts); 1952 bf->ncol_gt_bw80 = nss_mcs; 1953 break; 1954 case IEEE80211_STA_RX_BW_320: 1955 snd_dim = EHT_PHY(CAP2_SOUNDING_DIM_320MHZ_MASK, ve->phy_cap_info[2]) + 1956 (EHT_PHY(CAP3_SOUNDING_DIM_320MHZ_MASK, 1957 ve->phy_cap_info[3]) << 1); 1958 sts = EHT_PHY(CAP1_BEAMFORMEE_SS_320MHZ_MASK, pe->phy_cap_info[1]); 1959 nss_mcs = u8_get_bits(eht_nss->bw._320.rx_tx_mcs9_max_nss, 1960 IEEE80211_EHT_MCS_NSS_RX) - 1; 1961 1962 bf->nrow_gt_bw80 = min_t(u8, snd_dim, sts) << 4; 1963 bf->ncol_gt_bw80 = nss_mcs << 4; 1964 break; 1965 default: 1966 break; 1967 } 1968 } 1969 1970 static void 1971 mt7996_mcu_sta_bfer_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 1972 struct ieee80211_bss_conf *link_conf, 1973 struct ieee80211_link_sta *link_sta, 1974 struct mt7996_vif_link *link) 1975 { 1976 #define EBF_MODE BIT(0) 1977 #define IBF_MODE BIT(1) 1978 #define BF_MAT_ORDER 4 1979 struct mt7996_phy *phy = mt7996_vif_link_phy(link); 1980 struct ieee80211_vif *vif = link_conf->vif; 1981 struct sta_rec_bf *bf; 1982 struct tlv *tlv; 1983 static const u8 matrix[BF_MAT_ORDER][BF_MAT_ORDER] = { 1984 {0, 0, 0, 0}, 1985 {1, 1, 0, 0}, /* 2x1, 2x2, 2x3, 2x4 */ 1986 {2, 4, 4, 0}, /* 3x1, 3x2, 3x3, 3x4 */ 1987 {3, 5, 6, 0} /* 4x1, 4x2, 4x3, 4x4 */ 1988 }; 1989 int tx_ant; 1990 bool ebf; 1991 1992 if (!phy) 1993 return; 1994 1995 if (!(link_sta->ht_cap.ht_supported || link_sta->he_cap.has_he)) 1996 return; 1997 1998 ebf = mt7996_is_ebf_supported(phy, link_conf, link_sta, false); 1999 if (!ebf && !dev->ibf) 2000 return; 2001 2002 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf)); 2003 bf = (struct sta_rec_bf *)tlv; 2004 2005 /* he/eht: eBF only, except mt7992 that has 5T on 5GHz also supports iBF 2006 * vht: support eBF and iBF 2007 * ht: iBF only, since mac80211 lacks of eBF support 2008 */ 2009 if (link_sta->eht_cap.has_eht) 2010 mt7996_mcu_sta_bfer_eht(link_sta, vif, phy, bf, ebf); 2011 else if (link_sta->he_cap.has_he) 2012 mt7996_mcu_sta_bfer_he(link_sta, vif, phy, bf, ebf); 2013 else if (link_sta->vht_cap.vht_supported) 2014 mt7996_mcu_sta_bfer_vht(link_sta, phy, bf, ebf); 2015 else if (link_sta->ht_cap.ht_supported) 2016 mt7996_mcu_sta_bfer_ht(link_sta, phy, bf, ebf); 2017 else 2018 return; 2019 2020 bf->bf_cap = ebf ? EBF_MODE : (dev->ibf ? IBF_MODE : 0); 2021 tx_ant = hweight16(phy->mt76->chainmask) - 1; 2022 if (is_mt7992(&dev->mt76) && tx_ant == 4) 2023 bf->bf_cap |= IBF_MODE; 2024 2025 bf->bw = link_sta->bandwidth; 2026 bf->ibf_dbw = link_sta->bandwidth; 2027 bf->ibf_nrow = tx_ant; 2028 2029 if (link_sta->eht_cap.has_eht || link_sta->he_cap.has_he) 2030 bf->ibf_timeout = is_mt7992(&dev->mt76) ? MT7992_IBF_TIMEOUT : 2031 MT7996_IBF_TIMEOUT; 2032 else if (!ebf && link_sta->bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol) 2033 bf->ibf_timeout = MT7996_IBF_TIMEOUT_LEGACY; 2034 else 2035 bf->ibf_timeout = MT7996_IBF_TIMEOUT; 2036 2037 if (bf->ncol < BF_MAT_ORDER) { 2038 if (ebf) 2039 bf->mem_20m = tx_ant < BF_MAT_ORDER ? 2040 matrix[tx_ant][bf->ncol] : 0; 2041 else 2042 bf->mem_20m = bf->nrow < BF_MAT_ORDER ? 2043 matrix[bf->nrow][bf->ncol] : 0; 2044 } 2045 } 2046 2047 static void 2048 mt7996_mcu_sta_bfee_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 2049 struct ieee80211_bss_conf *link_conf, 2050 struct ieee80211_link_sta *link_sta, 2051 struct mt7996_vif_link *link) 2052 { 2053 struct mt7996_phy *phy = mt7996_vif_link_phy(link); 2054 struct sta_rec_bfee *bfee; 2055 struct tlv *tlv; 2056 u8 nrow = 0; 2057 int tx_ant; 2058 2059 if (!phy) 2060 return; 2061 2062 if (!(link_sta->vht_cap.vht_supported || link_sta->he_cap.has_he)) 2063 return; 2064 2065 if (!mt7996_is_ebf_supported(phy, link_conf, link_sta, true)) 2066 return; 2067 2068 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee)); 2069 bfee = (struct sta_rec_bfee *)tlv; 2070 2071 if (link_sta->he_cap.has_he) { 2072 struct ieee80211_he_cap_elem *pe = &link_sta->he_cap.he_cap_elem; 2073 2074 nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 2075 pe->phy_cap_info[5]); 2076 } else if (link_sta->vht_cap.vht_supported) { 2077 struct ieee80211_sta_vht_cap *pc = &link_sta->vht_cap; 2078 2079 nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, 2080 pc->cap); 2081 } 2082 2083 /* reply with identity matrix to avoid 2x2 BF negative gain */ 2084 tx_ant = hweight8(phy->mt76->antenna_mask) - 1; 2085 bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2); 2086 } 2087 2088 static void 2089 mt7996_mcu_sta_tx_proc_tlv(struct sk_buff *skb) 2090 { 2091 struct sta_rec_tx_proc *tx_proc; 2092 struct tlv *tlv; 2093 2094 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_TX_PROC, sizeof(*tx_proc)); 2095 2096 tx_proc = (struct sta_rec_tx_proc *)tlv; 2097 tx_proc->flag = cpu_to_le32(0); 2098 } 2099 2100 static void 2101 mt7996_mcu_sta_hdrt_tlv(struct mt7996_dev *dev, struct sk_buff *skb) 2102 { 2103 struct sta_rec_hdrt *hdrt; 2104 struct tlv *tlv; 2105 2106 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDRT, sizeof(*hdrt)); 2107 2108 hdrt = (struct sta_rec_hdrt *)tlv; 2109 hdrt->hdrt_mode = 1; 2110 } 2111 2112 static void 2113 mt7996_mcu_sta_hdr_trans_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 2114 struct ieee80211_vif *vif, struct mt76_wcid *wcid) 2115 { 2116 struct sta_rec_hdr_trans *hdr_trans; 2117 struct tlv *tlv; 2118 2119 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HDR_TRANS, sizeof(*hdr_trans)); 2120 hdr_trans = (struct sta_rec_hdr_trans *)tlv; 2121 hdr_trans->dis_rx_hdr_tran = true; 2122 2123 if (vif->type == NL80211_IFTYPE_STATION) 2124 hdr_trans->to_ds = true; 2125 else 2126 hdr_trans->from_ds = true; 2127 2128 if (!wcid) 2129 return; 2130 2131 hdr_trans->dis_rx_hdr_tran = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags); 2132 if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) { 2133 hdr_trans->to_ds = true; 2134 hdr_trans->from_ds = true; 2135 } 2136 2137 if (vif->type == NL80211_IFTYPE_MESH_POINT) { 2138 hdr_trans->to_ds = true; 2139 hdr_trans->from_ds = true; 2140 hdr_trans->mesh = true; 2141 } 2142 } 2143 2144 static enum mcu_mmps_mode 2145 mt7996_mcu_get_mmps_mode(enum ieee80211_smps_mode smps) 2146 { 2147 switch (smps) { 2148 case IEEE80211_SMPS_OFF: 2149 return MCU_MMPS_DISABLE; 2150 case IEEE80211_SMPS_STATIC: 2151 return MCU_MMPS_STATIC; 2152 case IEEE80211_SMPS_DYNAMIC: 2153 return MCU_MMPS_DYNAMIC; 2154 default: 2155 return MCU_MMPS_DISABLE; 2156 } 2157 } 2158 2159 int mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev *dev, 2160 void *data, u16 version) 2161 { 2162 struct uni_header hdr = {}; 2163 struct ra_fixed_rate *req; 2164 struct sk_buff *skb; 2165 struct tlv *tlv; 2166 int len; 2167 2168 len = sizeof(hdr) + sizeof(*req); 2169 2170 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 2171 if (!skb) 2172 return -ENOMEM; 2173 2174 skb_put_data(skb, &hdr, sizeof(hdr)); 2175 2176 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_RA_FIXED_RATE, sizeof(*req)); 2177 req = (struct ra_fixed_rate *)tlv; 2178 req->version = cpu_to_le16(version); 2179 memcpy(&req->rate, data, sizeof(req->rate)); 2180 2181 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2182 MCU_WM_UNI_CMD(RA), true); 2183 } 2184 2185 int mt7996_mcu_set_fixed_field(struct mt7996_dev *dev, struct mt7996_sta *msta, 2186 void *data, u8 link_id, u32 field) 2187 { 2188 struct mt7996_vif *mvif = msta->vif; 2189 struct mt7996_sta_link *msta_link; 2190 struct sta_rec_ra_fixed_uni *ra; 2191 struct sta_phy_uni *phy = data; 2192 struct mt76_vif_link *mlink; 2193 struct sk_buff *skb; 2194 int err = -ENODEV; 2195 struct tlv *tlv; 2196 2197 rcu_read_lock(); 2198 2199 mlink = rcu_dereference(mvif->mt76.link[link_id]); 2200 if (!mlink) 2201 goto error_unlock; 2202 2203 msta_link = rcu_dereference(msta->link[link_id]); 2204 if (!msta_link) 2205 goto error_unlock; 2206 2207 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, mlink, 2208 &msta_link->wcid, 2209 MT7996_STA_UPDATE_MAX_SIZE); 2210 if (IS_ERR(skb)) { 2211 err = PTR_ERR(skb); 2212 goto error_unlock; 2213 } 2214 2215 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra)); 2216 ra = (struct sta_rec_ra_fixed_uni *)tlv; 2217 2218 switch (field) { 2219 case RATE_PARAM_AUTO: 2220 break; 2221 case RATE_PARAM_FIXED: 2222 case RATE_PARAM_FIXED_MCS: 2223 case RATE_PARAM_FIXED_GI: 2224 case RATE_PARAM_FIXED_HE_LTF: 2225 if (phy) 2226 ra->phy = *phy; 2227 break; 2228 case RATE_PARAM_MMPS_UPDATE: { 2229 struct ieee80211_sta *sta = wcid_to_sta(&msta_link->wcid); 2230 struct ieee80211_link_sta *link_sta; 2231 2232 link_sta = rcu_dereference(sta->link[link_id]); 2233 if (!link_sta) { 2234 dev_kfree_skb(skb); 2235 goto error_unlock; 2236 } 2237 2238 ra->mmps_mode = mt7996_mcu_get_mmps_mode(link_sta->smps_mode); 2239 break; 2240 } 2241 default: 2242 break; 2243 } 2244 ra->field = cpu_to_le32(field); 2245 2246 rcu_read_unlock(); 2247 2248 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2249 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 2250 error_unlock: 2251 rcu_read_unlock(); 2252 2253 return err; 2254 } 2255 2256 static int 2257 mt7996_mcu_add_rate_ctrl_fixed(struct mt7996_dev *dev, struct mt7996_sta *msta, 2258 struct ieee80211_vif *vif, u8 link_id) 2259 { 2260 struct ieee80211_link_sta *link_sta; 2261 struct cfg80211_bitrate_mask mask; 2262 struct mt7996_sta_link *msta_link; 2263 struct mt7996_vif_link *link; 2264 struct sta_phy_uni phy = {}; 2265 struct ieee80211_sta *sta; 2266 int ret, nrates = 0, idx; 2267 enum nl80211_band band; 2268 struct mt76_phy *mphy; 2269 bool has_he; 2270 2271 #define __sta_phy_bitrate_mask_check(_mcs, _gi, _ht, _he) \ 2272 do { \ 2273 u8 i, gi = mask.control[band]._gi; \ 2274 gi = (_he) ? gi : gi == NL80211_TXRATE_FORCE_SGI; \ 2275 phy.sgi = gi; \ 2276 phy.he_ltf = mask.control[band].he_ltf; \ 2277 for (i = 0; i < ARRAY_SIZE(mask.control[band]._mcs); i++) { \ 2278 if (!mask.control[band]._mcs[i]) \ 2279 continue; \ 2280 nrates += hweight16(mask.control[band]._mcs[i]); \ 2281 phy.mcs = ffs(mask.control[band]._mcs[i]) - 1; \ 2282 if (_ht) \ 2283 phy.mcs += 8 * i; \ 2284 } \ 2285 } while (0) 2286 2287 rcu_read_lock(); 2288 2289 link = mt7996_vif_link(dev, vif, link_id); 2290 if (!link) 2291 goto error_unlock; 2292 2293 msta_link = rcu_dereference(msta->link[link_id]); 2294 if (!msta_link) 2295 goto error_unlock; 2296 2297 sta = wcid_to_sta(&msta_link->wcid); 2298 link_sta = rcu_dereference(sta->link[link_id]); 2299 if (!link_sta) 2300 goto error_unlock; 2301 2302 mphy = mt76_vif_link_phy(&link->mt76); 2303 if (!mphy) 2304 goto error_unlock; 2305 2306 band = mphy->chandef.chan->band; 2307 has_he = link_sta->he_cap.has_he; 2308 mask = link->bitrate_mask; 2309 idx = msta_link->wcid.idx; 2310 2311 if (has_he) { 2312 __sta_phy_bitrate_mask_check(he_mcs, he_gi, 0, 1); 2313 } else if (link_sta->vht_cap.vht_supported) { 2314 __sta_phy_bitrate_mask_check(vht_mcs, gi, 0, 0); 2315 } else if (link_sta->ht_cap.ht_supported) { 2316 __sta_phy_bitrate_mask_check(ht_mcs, gi, 1, 0); 2317 } else { 2318 nrates = hweight32(mask.control[band].legacy); 2319 phy.mcs = ffs(mask.control[band].legacy) - 1; 2320 } 2321 2322 rcu_read_unlock(); 2323 2324 #undef __sta_phy_bitrate_mask_check 2325 2326 /* fall back to auto rate control */ 2327 if (mask.control[band].gi == NL80211_TXRATE_DEFAULT_GI && 2328 mask.control[band].he_gi == GENMASK(7, 0) && 2329 mask.control[band].he_ltf == GENMASK(7, 0) && 2330 nrates != 1) 2331 return 0; 2332 2333 /* fixed single rate */ 2334 if (nrates == 1) { 2335 ret = mt7996_mcu_set_fixed_field(dev, msta, &phy, link_id, 2336 RATE_PARAM_FIXED_MCS); 2337 if (ret) 2338 return ret; 2339 } 2340 2341 /* fixed GI */ 2342 if (mask.control[band].gi != NL80211_TXRATE_DEFAULT_GI || 2343 mask.control[band].he_gi != GENMASK(7, 0)) { 2344 u32 addr; 2345 2346 /* firmware updates only TXCMD but doesn't take WTBL into 2347 * account, so driver should update here to reflect the 2348 * actual txrate hardware sends out. 2349 */ 2350 addr = mt7996_mac_wtbl_lmac_addr(dev, idx, 7); 2351 if (has_he) 2352 mt76_rmw_field(dev, addr, GENMASK(31, 24), phy.sgi); 2353 else 2354 mt76_rmw_field(dev, addr, GENMASK(15, 12), phy.sgi); 2355 2356 ret = mt7996_mcu_set_fixed_field(dev, msta, &phy, link_id, 2357 RATE_PARAM_FIXED_GI); 2358 if (ret) 2359 return ret; 2360 } 2361 2362 /* fixed HE_LTF */ 2363 if (mask.control[band].he_ltf != GENMASK(7, 0)) { 2364 ret = mt7996_mcu_set_fixed_field(dev, msta, &phy, link_id, 2365 RATE_PARAM_FIXED_HE_LTF); 2366 if (ret) 2367 return ret; 2368 } 2369 2370 return 0; 2371 2372 error_unlock: 2373 rcu_read_unlock(); 2374 2375 return -ENODEV; 2376 } 2377 2378 static void 2379 mt7996_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7996_dev *dev, 2380 struct ieee80211_vif *vif, 2381 struct ieee80211_bss_conf *link_conf, 2382 struct ieee80211_link_sta *link_sta, 2383 struct mt7996_vif_link *link) 2384 { 2385 #define INIT_RCPI 180 2386 struct mt76_phy *mphy = mt76_vif_link_phy(&link->mt76); 2387 struct cfg80211_bitrate_mask *mask = &link->bitrate_mask; 2388 u32 cap = link_sta->sta->wme ? STA_CAP_WMM : 0; 2389 struct cfg80211_chan_def *chandef; 2390 struct sta_rec_ra_uni *ra; 2391 enum nl80211_band band; 2392 struct tlv *tlv; 2393 u32 supp_rate; 2394 2395 if (!mphy) 2396 return; 2397 2398 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra)); 2399 ra = (struct sta_rec_ra_uni *)tlv; 2400 2401 chandef = &mphy->chandef; 2402 band = chandef->chan->band; 2403 supp_rate = link_sta->supp_rates[band]; 2404 2405 ra->valid = true; 2406 ra->auto_rate = true; 2407 ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, link_sta); 2408 ra->channel = chandef->chan->hw_value; 2409 ra->bw = (link_sta->bandwidth == IEEE80211_STA_RX_BW_320) ? 2410 CMD_CBW_320MHZ : link_sta->bandwidth; 2411 ra->phy.bw = ra->bw; 2412 ra->mmps_mode = mt7996_mcu_get_mmps_mode(link_sta->smps_mode); 2413 2414 if (supp_rate) { 2415 supp_rate &= mask->control[band].legacy; 2416 ra->rate_len = hweight32(supp_rate); 2417 2418 if (band == NL80211_BAND_2GHZ) { 2419 ra->supp_mode = MODE_CCK; 2420 ra->supp_cck_rate = supp_rate & GENMASK(3, 0); 2421 2422 if (ra->rate_len > 4) { 2423 ra->supp_mode |= MODE_OFDM; 2424 ra->supp_ofdm_rate = supp_rate >> 4; 2425 } 2426 } else { 2427 ra->supp_mode = MODE_OFDM; 2428 ra->supp_ofdm_rate = supp_rate; 2429 } 2430 } 2431 2432 if (link_sta->ht_cap.ht_supported) { 2433 ra->supp_mode |= MODE_HT; 2434 ra->af = link_sta->ht_cap.ampdu_factor; 2435 ra->ht_gf = !!(link_sta->ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD); 2436 2437 cap |= STA_CAP_HT; 2438 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20) 2439 cap |= STA_CAP_SGI_20; 2440 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) 2441 cap |= STA_CAP_SGI_40; 2442 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_TX_STBC) 2443 cap |= STA_CAP_TX_STBC; 2444 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) 2445 cap |= STA_CAP_RX_STBC; 2446 if (link_conf->ht_ldpc && 2447 (link_sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)) 2448 cap |= STA_CAP_LDPC; 2449 2450 mt7996_mcu_set_sta_ht_mcs(link_sta, ra->ht_mcs, 2451 mask->control[band].ht_mcs); 2452 ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs; 2453 } 2454 2455 if (link_sta->vht_cap.vht_supported) { 2456 u8 af; 2457 2458 ra->supp_mode |= MODE_VHT; 2459 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK, 2460 link_sta->vht_cap.cap); 2461 ra->af = max_t(u8, ra->af, af); 2462 2463 cap |= STA_CAP_VHT; 2464 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) 2465 cap |= STA_CAP_VHT_SGI_80; 2466 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160) 2467 cap |= STA_CAP_VHT_SGI_160; 2468 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC) 2469 cap |= STA_CAP_VHT_TX_STBC; 2470 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1) 2471 cap |= STA_CAP_VHT_RX_STBC; 2472 if ((vif->type != NL80211_IFTYPE_AP || link_conf->vht_ldpc) && 2473 (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)) 2474 cap |= STA_CAP_VHT_LDPC; 2475 2476 mt7996_mcu_set_sta_vht_mcs(link_sta, ra->supp_vht_mcs, 2477 mask->control[band].vht_mcs); 2478 } 2479 2480 if (link_sta->he_cap.has_he) { 2481 ra->supp_mode |= MODE_HE; 2482 cap |= STA_CAP_HE; 2483 2484 if (link_sta->he_6ghz_capa.capa) 2485 ra->af = le16_get_bits(link_sta->he_6ghz_capa.capa, 2486 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); 2487 } 2488 ra->sta_cap = cpu_to_le32(cap); 2489 2490 memset(ra->rx_rcpi, INIT_RCPI, sizeof(ra->rx_rcpi)); 2491 } 2492 2493 int mt7996_mcu_add_rate_ctrl(struct mt7996_dev *dev, struct mt7996_sta *msta, 2494 struct ieee80211_vif *vif, u8 link_id, 2495 bool changed) 2496 { 2497 struct ieee80211_bss_conf *link_conf; 2498 struct ieee80211_link_sta *link_sta; 2499 struct mt7996_sta_link *msta_link; 2500 struct mt7996_vif_link *link; 2501 struct ieee80211_sta *sta; 2502 struct sk_buff *skb; 2503 int ret = -ENODEV; 2504 2505 rcu_read_lock(); 2506 2507 link = mt7996_vif_link(dev, vif, link_id); 2508 if (!link) 2509 goto error_unlock; 2510 2511 msta_link = rcu_dereference(msta->link[link_id]); 2512 if (!msta_link) 2513 goto error_unlock; 2514 2515 sta = wcid_to_sta(&msta_link->wcid); 2516 link_sta = rcu_dereference(sta->link[link_id]); 2517 if (!link_sta) 2518 goto error_unlock; 2519 2520 link_conf = rcu_dereference(vif->link_conf[link_id]); 2521 if (!link_conf) 2522 goto error_unlock; 2523 2524 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &link->mt76, 2525 &msta_link->wcid, 2526 MT7996_STA_UPDATE_MAX_SIZE); 2527 if (IS_ERR(skb)) { 2528 ret = PTR_ERR(skb); 2529 goto error_unlock; 2530 } 2531 2532 /* firmware rc algorithm refers to sta_rec_he for HE control. 2533 * once dev->rc_work changes the settings driver should also 2534 * update sta_rec_he here. 2535 */ 2536 if (changed) 2537 mt7996_mcu_sta_he_tlv(skb, link_sta, link); 2538 2539 /* sta_rec_ra accommodates BW, NSS and only MCS range format 2540 * i.e 0-{7,8,9} for VHT. 2541 */ 2542 mt7996_mcu_sta_rate_ctrl_tlv(skb, dev, vif, link_conf, link_sta, link); 2543 2544 rcu_read_unlock(); 2545 2546 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 2547 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 2548 if (ret) 2549 return ret; 2550 2551 return mt7996_mcu_add_rate_ctrl_fixed(dev, msta, vif, link_id); 2552 2553 error_unlock: 2554 rcu_read_unlock(); 2555 2556 return ret; 2557 } 2558 2559 static int 2560 mt7996_mcu_add_group(struct mt7996_dev *dev, struct mt7996_vif_link *link, 2561 struct mt76_wcid *wcid) 2562 { 2563 #define MT_STA_BSS_GROUP 1 2564 struct { 2565 u8 __rsv1[4]; 2566 2567 __le16 tag; 2568 __le16 len; 2569 __le16 wlan_idx; 2570 u8 __rsv2[2]; 2571 __le32 action; 2572 __le32 val; 2573 u8 __rsv3[8]; 2574 } __packed req = { 2575 .tag = cpu_to_le16(UNI_VOW_DRR_CTRL), 2576 .len = cpu_to_le16(sizeof(req) - 4), 2577 .action = cpu_to_le32(MT_STA_BSS_GROUP), 2578 .val = cpu_to_le32(link->mt76.idx % 16), 2579 .wlan_idx = cpu_to_le16(wcid->idx), 2580 }; 2581 2582 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(VOW), &req, 2583 sizeof(req), true); 2584 } 2585 2586 int mt7996_mcu_mld_reconf_stop_link(struct mt7996_dev *dev, 2587 struct ieee80211_vif *vif, 2588 u16 removed_links) 2589 { 2590 unsigned long rem_links = removed_links; 2591 struct mld_reconf_stop_link *sl; 2592 struct mld_req_hdr hdr = {}; 2593 unsigned int link_id; 2594 struct sk_buff *skb; 2595 struct tlv *tlv; 2596 2597 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, sizeof(hdr) + sizeof(*sl)); 2598 if (!skb) 2599 return -ENOMEM; 2600 2601 memcpy(hdr.mld_addr, vif->addr, ETH_ALEN); 2602 skb_put_data(skb, &hdr, sizeof(hdr)); 2603 2604 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_CMD_MLD_RECONF_STOP_LINK, 2605 sizeof(*sl)); 2606 sl = (struct mld_reconf_stop_link *)tlv; 2607 sl->link_bitmap = cpu_to_le16(removed_links); 2608 2609 for_each_set_bit(link_id, &rem_links, IEEE80211_MLD_MAX_NUM_LINKS) { 2610 struct mt7996_vif_link *link; 2611 2612 link = mt7996_vif_link(dev, vif, link_id); 2613 if (!link) 2614 continue; 2615 2616 sl->bss_idx[link_id] = link->mt76.idx; 2617 } 2618 2619 return mt76_mcu_skb_send_msg(&dev->mt76, skb, MCU_WM_UNI_CMD(MLD), 2620 true); 2621 } 2622 2623 int mt7996_mcu_mld_link_oper(struct mt7996_dev *dev, 2624 struct ieee80211_bss_conf *link_conf, 2625 struct mt7996_vif_link *link, bool add) 2626 { 2627 struct ieee80211_vif *vif = link_conf->vif; 2628 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 2629 struct bss_mld_link_op_tlv *mld_op; 2630 struct sk_buff *skb; 2631 struct tlv *tlv; 2632 2633 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &link->mt76, 2634 MT7996_BSS_UPDATE_MAX_SIZE); 2635 if (IS_ERR(skb)) 2636 return PTR_ERR(skb); 2637 2638 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_BSS_INFO_MLD_LINK_OP, 2639 sizeof(*mld_op)); 2640 mld_op = (struct bss_mld_link_op_tlv *)tlv; 2641 mld_op->link_operation = add; 2642 mld_op->own_mld_id = link->mld_idx; 2643 mld_op->link_id = link_conf->link_id; 2644 mld_op->group_mld_id = add ? mvif->mld_group_idx : 0xff; 2645 mld_op->remap_idx = add ? mvif->mld_remap_idx : 0xff; 2646 memcpy(mld_op->mac_addr, vif->addr, ETH_ALEN); 2647 2648 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2649 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 2650 } 2651 2652 static void 2653 mt7996_mcu_sta_mld_setup_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 2654 struct ieee80211_vif *vif, 2655 struct ieee80211_sta *sta) 2656 { 2657 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 2658 unsigned int nlinks = hweight16(sta->valid_links); 2659 struct mld_setup_link *mld_setup_link; 2660 struct ieee80211_link_sta *link_sta; 2661 struct sta_rec_mld_setup *mld_setup; 2662 struct mt7996_sta_link *msta_link; 2663 unsigned int link_id; 2664 struct tlv *tlv; 2665 2666 msta_link = mt76_dereference(msta->link[msta->deflink_id], &dev->mt76); 2667 if (!msta_link) 2668 return; 2669 2670 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MLD, 2671 sizeof(struct sta_rec_mld_setup) + 2672 sizeof(struct mld_setup_link) * nlinks); 2673 2674 mld_setup = (struct sta_rec_mld_setup *)tlv; 2675 memcpy(mld_setup->mld_addr, sta->addr, ETH_ALEN); 2676 mld_setup->setup_wcid = cpu_to_le16(msta_link->wcid.idx); 2677 mld_setup->primary_id = cpu_to_le16(msta_link->wcid.idx); 2678 2679 if (nlinks > 1) { 2680 msta_link = mt76_dereference(msta->link[msta->seclink_id], 2681 &dev->mt76); 2682 if (!msta_link) 2683 return; 2684 } 2685 mld_setup->seconed_id = cpu_to_le16(msta_link->wcid.idx); 2686 mld_setup->link_num = nlinks; 2687 2688 mld_setup_link = (struct mld_setup_link *)mld_setup->link_info; 2689 for_each_sta_active_link(vif, sta, link_sta, link_id) { 2690 struct mt7996_vif_link *link; 2691 2692 msta_link = mt76_dereference(msta->link[link_id], &dev->mt76); 2693 if (!msta_link) 2694 continue; 2695 2696 link = mt7996_vif_link(dev, vif, link_id); 2697 if (!link) 2698 continue; 2699 2700 mld_setup_link->wcid = cpu_to_le16(msta_link->wcid.idx); 2701 mld_setup_link->bss_idx = link->mt76.idx; 2702 mld_setup_link++; 2703 } 2704 } 2705 2706 static void 2707 mt7996_mcu_sta_eht_mld_tlv(struct mt7996_dev *dev, struct sk_buff *skb, 2708 struct ieee80211_sta *sta) 2709 { 2710 struct sta_rec_eht_mld *eht_mld; 2711 struct tlv *tlv; 2712 int i; 2713 2714 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_EHT_MLD, sizeof(*eht_mld)); 2715 eht_mld = (struct sta_rec_eht_mld *)tlv; 2716 2717 for (i = 0; i < ARRAY_SIZE(eht_mld->str_cap); i++) 2718 eht_mld->str_cap[i] = 0x7; 2719 } 2720 2721 int mt7996_mcu_add_sta(struct mt7996_dev *dev, 2722 struct ieee80211_bss_conf *link_conf, 2723 struct ieee80211_link_sta *link_sta, 2724 struct mt7996_vif_link *link, 2725 struct mt7996_sta_link *msta_link, 2726 int conn_state, bool newly) 2727 { 2728 struct mt76_wcid *wcid = msta_link ? &msta_link->wcid : link->mt76.wcid; 2729 struct ieee80211_sta *sta = link_sta ? link_sta->sta : NULL; 2730 struct sk_buff *skb; 2731 int ret; 2732 2733 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &link->mt76, wcid, 2734 MT7996_STA_UPDATE_MAX_SIZE); 2735 if (IS_ERR(skb)) 2736 return PTR_ERR(skb); 2737 2738 /* starec basic */ 2739 mt76_connac_mcu_sta_basic_tlv(&dev->mt76, skb, link_conf, link_sta, 2740 conn_state, newly); 2741 2742 if (conn_state == CONN_STATE_DISCONNECT) 2743 goto out; 2744 2745 /* starec hdr trans */ 2746 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, link_conf->vif, wcid); 2747 /* starec tx proc */ 2748 mt7996_mcu_sta_tx_proc_tlv(skb); 2749 2750 /* tag order is in accordance with firmware dependency. */ 2751 if (link_sta) { 2752 /* starec hdrt mode */ 2753 mt7996_mcu_sta_hdrt_tlv(dev, skb); 2754 if (conn_state == CONN_STATE_CONNECT) { 2755 /* starec bfer */ 2756 mt7996_mcu_sta_bfer_tlv(dev, skb, link_conf, link_sta, 2757 link); 2758 /* starec bfee */ 2759 mt7996_mcu_sta_bfee_tlv(dev, skb, link_conf, link_sta, 2760 link); 2761 } 2762 /* starec ht */ 2763 mt7996_mcu_sta_ht_tlv(skb, link_sta); 2764 /* starec vht */ 2765 mt7996_mcu_sta_vht_tlv(skb, link_sta); 2766 /* starec uapsd */ 2767 mt76_connac_mcu_sta_uapsd(skb, link_conf->vif, sta); 2768 /* starec amsdu */ 2769 mt7996_mcu_sta_amsdu_tlv(dev, skb, link_conf->vif, link_sta, 2770 msta_link); 2771 /* starec he */ 2772 mt7996_mcu_sta_he_tlv(skb, link_sta, link); 2773 /* starec he 6g*/ 2774 mt7996_mcu_sta_he_6g_tlv(skb, link_sta); 2775 /* starec eht */ 2776 mt7996_mcu_sta_eht_tlv(skb, link_sta); 2777 /* starec muru */ 2778 mt7996_mcu_sta_muru_tlv(dev, skb, link_conf, link_sta); 2779 2780 if (sta->mlo) { 2781 mt7996_mcu_sta_mld_setup_tlv(dev, skb, link_conf->vif, 2782 sta); 2783 mt7996_mcu_sta_eht_mld_tlv(dev, skb, sta); 2784 } 2785 } 2786 2787 ret = mt7996_mcu_add_group(dev, link, wcid); 2788 if (ret) { 2789 dev_kfree_skb(skb); 2790 return ret; 2791 } 2792 out: 2793 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2794 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 2795 } 2796 2797 int mt7996_mcu_teardown_mld_sta(struct mt7996_dev *dev, 2798 struct mt7996_vif_link *link, 2799 struct mt7996_sta_link *msta_link) 2800 { 2801 struct sk_buff *skb; 2802 2803 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &link->mt76, 2804 &msta_link->wcid, 2805 MT7996_STA_UPDATE_MAX_SIZE); 2806 if (IS_ERR(skb)) 2807 return PTR_ERR(skb); 2808 2809 mt76_connac_mcu_add_tlv(skb, STA_REC_MLD_OFF, sizeof(struct tlv)); 2810 2811 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 2812 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 2813 } 2814 2815 void mt7996_mcu_update_sta_rec_bw(void *data, struct ieee80211_sta *sta) 2816 { 2817 struct mt7996_vif_link *link = (struct mt7996_vif_link *)data; 2818 struct mt7996_sta *msta = (struct mt7996_sta *)sta->drv_priv; 2819 struct mt7996_phy *phy = mt7996_vif_link_phy(link); 2820 struct mt7996_sta_link *msta_link; 2821 struct mt7996_dev *dev; 2822 struct ieee80211_bss_conf *link_conf; 2823 struct ieee80211_link_sta *link_sta; 2824 struct ieee80211_vif *vif; 2825 struct sk_buff *skb; 2826 int link_id; 2827 2828 if (!phy) 2829 return; 2830 2831 if (link->mt76.mvif != &msta->vif->mt76) 2832 return; 2833 2834 dev = phy->dev; 2835 link_id = link->msta_link.wcid.link_id; 2836 link_sta = link_sta_dereference_protected(sta, link_id); 2837 if (!link_sta) 2838 return; 2839 2840 msta_link = mt76_dereference(msta->link[link_id], &dev->mt76); 2841 if (!msta_link) 2842 return; 2843 2844 vif = container_of((void *)msta->vif, struct ieee80211_vif, drv_priv); 2845 link_conf = link_conf_dereference_protected(vif, link_id); 2846 if (!link_conf) 2847 return; 2848 2849 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &link->mt76, 2850 &msta_link->wcid, 2851 MT7996_STA_UPDATE_MAX_SIZE); 2852 if (IS_ERR(skb)) 2853 return; 2854 2855 mt7996_mcu_sta_bfer_tlv(dev, skb, link_conf, link_sta, link); 2856 mt7996_mcu_sta_rate_ctrl_tlv(skb, dev, vif, link_conf, link_sta, link); 2857 2858 mt76_mcu_skb_send_msg(&dev->mt76, skb, 2859 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 2860 } 2861 2862 static int 2863 mt7996_mcu_sta_key_tlv(struct mt76_dev *dev, struct mt76_wcid *wcid, 2864 struct sk_buff *skb, 2865 struct ieee80211_key_conf *key, 2866 enum set_key_cmd cmd) 2867 { 2868 struct sta_rec_sec_uni *sec; 2869 struct sec_key_uni *sec_key; 2870 struct tlv *tlv; 2871 u8 cipher; 2872 2873 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec)); 2874 sec = (struct sta_rec_sec_uni *)tlv; 2875 /* due to connac3 FW design, we only do remove key for BIGTK; even for 2876 * removal, the field should be filled with SET_KEY 2877 */ 2878 sec->add = SET_KEY; 2879 sec->n_cipher = 1; 2880 sec_key = &sec->key[0]; 2881 sec_key->wlan_idx = cpu_to_le16(wcid->idx); 2882 sec_key->key_id = key->keyidx; 2883 2884 if (cmd != SET_KEY) 2885 return 0; 2886 2887 cipher = mt76_connac_mcu_get_cipher(key->cipher); 2888 if (cipher == MCU_CIPHER_NONE) 2889 return -EOPNOTSUPP; 2890 2891 sec_key->mgmt_prot = 0; 2892 sec_key->cipher_id = cipher; 2893 sec_key->cipher_len = sizeof(*sec_key); 2894 sec_key->key_len = key->keylen; 2895 sec_key->need_resp = 0; 2896 memcpy(sec_key->key, key->key, key->keylen); 2897 2898 if (cipher == MCU_CIPHER_TKIP) { 2899 /* Rx/Tx MIC keys are swapped */ 2900 memcpy(sec_key->key + 16, key->key + 24, 8); 2901 memcpy(sec_key->key + 24, key->key + 16, 8); 2902 return 0; 2903 } 2904 2905 if (sec_key->key_id != 6 && sec_key->key_id != 7) 2906 return 0; 2907 2908 switch (key->cipher) { 2909 case WLAN_CIPHER_SUITE_AES_CMAC: 2910 sec_key->cipher_id = MCU_CIPHER_BCN_PROT_CMAC_128; 2911 break; 2912 case WLAN_CIPHER_SUITE_BIP_GMAC_128: 2913 sec_key->cipher_id = MCU_CIPHER_BCN_PROT_GMAC_128; 2914 break; 2915 case WLAN_CIPHER_SUITE_BIP_GMAC_256: 2916 sec_key->cipher_id = MCU_CIPHER_BCN_PROT_GMAC_256; 2917 break; 2918 case WLAN_CIPHER_SUITE_BIP_CMAC_256: 2919 if (!is_mt7990(dev)) 2920 return -EOPNOTSUPP; 2921 sec_key->cipher_id = MCU_CIPHER_BCN_PROT_CMAC_256; 2922 break; 2923 default: 2924 return -EOPNOTSUPP; 2925 } 2926 2927 sec_key->bcn_mode = is_mt7990(dev) ? BP_HW_MODE : BP_SW_MODE; 2928 2929 return 0; 2930 } 2931 2932 int mt7996_mcu_add_key(struct mt76_dev *dev, struct mt7996_vif_link *link, 2933 struct ieee80211_key_conf *key, int mcu_cmd, 2934 struct mt76_wcid *wcid, enum set_key_cmd cmd) 2935 { 2936 struct sk_buff *skb; 2937 int ret; 2938 2939 skb = __mt76_connac_mcu_alloc_sta_req(dev, (struct mt76_vif_link *)link, 2940 wcid, MT7996_STA_UPDATE_MAX_SIZE); 2941 if (IS_ERR(skb)) 2942 return PTR_ERR(skb); 2943 2944 ret = mt7996_mcu_sta_key_tlv(dev, wcid, skb, key, cmd); 2945 if (ret) { 2946 dev_kfree_skb(skb); 2947 return ret; 2948 } 2949 2950 return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true); 2951 } 2952 2953 int mt7996_mcu_add_dev_info(struct mt7996_phy *phy, struct ieee80211_vif *vif, 2954 struct ieee80211_bss_conf *link_conf, 2955 struct mt76_vif_link *mlink, bool enable) 2956 { 2957 struct mt7996_dev *dev = phy->dev; 2958 struct { 2959 struct req_hdr { 2960 u8 omac_idx; 2961 u8 band_idx; 2962 u8 __rsv[2]; 2963 } __packed hdr; 2964 struct req_tlv { 2965 __le16 tag; 2966 __le16 len; 2967 u8 active; 2968 u8 __rsv; 2969 u8 omac_addr[ETH_ALEN]; 2970 } __packed tlv; 2971 } data = { 2972 .hdr = { 2973 .omac_idx = mlink->omac_idx, 2974 .band_idx = mlink->band_idx, 2975 }, 2976 .tlv = { 2977 .tag = cpu_to_le16(DEV_INFO_ACTIVE), 2978 .len = cpu_to_le16(sizeof(struct req_tlv)), 2979 .active = enable, 2980 }, 2981 }; 2982 2983 if (mlink->omac_idx >= REPEATER_BSSID_START) 2984 return mt7996_mcu_muar_config(dev, mlink, link_conf->addr, false, enable); 2985 2986 memcpy(data.tlv.omac_addr, link_conf->addr, ETH_ALEN); 2987 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(DEV_INFO_UPDATE), 2988 &data, sizeof(data), true); 2989 } 2990 2991 static void 2992 mt7996_mcu_beacon_cntdwn(struct sk_buff *rskb, struct sk_buff *skb, 2993 struct ieee80211_mutable_offsets *offs, 2994 bool csa) 2995 { 2996 struct bss_bcn_cntdwn_tlv *info; 2997 struct tlv *tlv; 2998 u16 tag; 2999 3000 if (!offs->cntdwn_counter_offs[0]) 3001 return; 3002 3003 tag = csa ? UNI_BSS_INFO_BCN_CSA : UNI_BSS_INFO_BCN_BCC; 3004 3005 tlv = mt7996_mcu_add_uni_tlv(rskb, tag, sizeof(*info)); 3006 3007 info = (struct bss_bcn_cntdwn_tlv *)tlv; 3008 info->cnt = skb->data[offs->cntdwn_counter_offs[0]]; 3009 3010 /* abort the CCA countdown when starting CSA countdown */ 3011 if (csa) { 3012 struct bss_bcn_cntdwn_tlv *cca_info; 3013 3014 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_BCC, 3015 sizeof(*cca_info)); 3016 cca_info = (struct bss_bcn_cntdwn_tlv *)tlv; 3017 cca_info->cca.abort = true; 3018 } 3019 } 3020 3021 static void 3022 mt7996_mcu_beacon_mbss(struct sk_buff *rskb, struct sk_buff *skb, 3023 struct bss_bcn_content_tlv *bcn, 3024 struct ieee80211_mutable_offsets *offs) 3025 { 3026 struct bss_bcn_mbss_tlv *mbss; 3027 const struct element *elem; 3028 struct tlv *tlv; 3029 3030 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_MBSSID, sizeof(*mbss)); 3031 3032 mbss = (struct bss_bcn_mbss_tlv *)tlv; 3033 mbss->offset[0] = cpu_to_le16(offs->tim_offset); 3034 mbss->bitmap = cpu_to_le32(1); 3035 3036 for_each_element_id(elem, WLAN_EID_MULTIPLE_BSSID, 3037 &skb->data[offs->mbssid_off], 3038 skb->len - offs->mbssid_off) { 3039 const struct element *sub_elem; 3040 3041 if (elem->datalen < 2) 3042 continue; 3043 3044 for_each_element(sub_elem, elem->data + 1, elem->datalen - 1) { 3045 const struct ieee80211_bssid_index *idx; 3046 const u8 *idx_ie; 3047 3048 /* not a valid BSS profile */ 3049 if (sub_elem->id || sub_elem->datalen < 4) 3050 continue; 3051 3052 /* Find WLAN_EID_MULTI_BSSID_IDX 3053 * in the merged nontransmitted profile 3054 */ 3055 idx_ie = cfg80211_find_ie(WLAN_EID_MULTI_BSSID_IDX, 3056 sub_elem->data, sub_elem->datalen); 3057 if (!idx_ie || idx_ie[1] < sizeof(*idx)) 3058 continue; 3059 3060 idx = (void *)(idx_ie + 2); 3061 if (!idx->bssid_index || idx->bssid_index > 31) 3062 continue; 3063 3064 mbss->offset[idx->bssid_index] = cpu_to_le16(idx_ie - 3065 skb->data); 3066 mbss->bitmap |= cpu_to_le32(BIT(idx->bssid_index)); 3067 } 3068 } 3069 } 3070 3071 static void 3072 mt7996_mcu_beacon_cont(struct mt7996_dev *dev, 3073 struct ieee80211_bss_conf *link_conf, 3074 struct mt7996_vif_link *link, 3075 struct sk_buff *rskb, struct sk_buff *skb, 3076 struct bss_bcn_content_tlv *bcn, 3077 struct ieee80211_mutable_offsets *offs) 3078 { 3079 u8 *buf, keyidx = link->msta_link.wcid.hw_key_idx2; 3080 struct mt76_wcid *wcid; 3081 3082 if (is_mt7990(&dev->mt76) && (keyidx == 6 || keyidx == 7)) 3083 wcid = &link->msta_link.wcid; 3084 else 3085 wcid = &dev->mt76.global_wcid; 3086 3087 bcn->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 3088 bcn->tim_ie_pos = cpu_to_le16(offs->tim_offset); 3089 3090 if (offs->cntdwn_counter_offs[0]) { 3091 u16 offset = offs->cntdwn_counter_offs[0]; 3092 3093 if (link_conf->csa_active) 3094 bcn->csa_ie_pos = cpu_to_le16(offset - 4); 3095 if (link_conf->color_change_active) 3096 bcn->bcc_ie_pos = cpu_to_le16(offset - 3); 3097 } 3098 3099 buf = (u8 *)bcn + sizeof(*bcn); 3100 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, 3101 BSS_CHANGED_BEACON); 3102 3103 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 3104 } 3105 3106 int mt7996_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 3107 struct ieee80211_bss_conf *link_conf, bool enabled) 3108 { 3109 struct mt7996_dev *dev = mt7996_hw_dev(hw); 3110 struct mt7996_vif_link *link = mt7996_vif_conf_link(dev, vif, link_conf); 3111 struct mt76_phy *mphy = link ? mt76_vif_link_phy(&link->mt76) : NULL; 3112 struct mt76_vif_link *mlink = link ? &link->mt76 : NULL; 3113 struct ieee80211_mutable_offsets offs; 3114 struct ieee80211_tx_info *info; 3115 struct sk_buff *skb, *rskb; 3116 struct tlv *tlv; 3117 struct bss_bcn_content_tlv *bcn; 3118 int len, extra_len = 0; 3119 3120 if (link_conf->nontransmitted) 3121 return 0; 3122 3123 if (!mlink) 3124 return -EINVAL; 3125 3126 if (mphy && mphy->offchannel) 3127 enabled = false; 3128 3129 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, 3130 MT7996_MAX_BSS_OFFLOAD_SIZE); 3131 if (IS_ERR(rskb)) 3132 return PTR_ERR(rskb); 3133 3134 skb = ieee80211_beacon_get_template(hw, vif, &offs, link_conf->link_id); 3135 if (enabled && !skb) { 3136 dev_kfree_skb(rskb); 3137 return -EINVAL; 3138 } 3139 3140 if (skb) { 3141 if (skb->len > MT7996_MAX_BEACON_SIZE) { 3142 dev_err(dev->mt76.dev, "Bcn size limit exceed\n"); 3143 dev_kfree_skb(rskb); 3144 dev_kfree_skb(skb); 3145 return -EINVAL; 3146 } 3147 3148 extra_len = skb->len; 3149 } 3150 3151 len = ALIGN(sizeof(*bcn) + MT_TXD_SIZE + extra_len, 4); 3152 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_BCN_CONTENT, len); 3153 bcn = (struct bss_bcn_content_tlv *)tlv; 3154 bcn->enable = enabled; 3155 if (!bcn->enable) 3156 goto out; 3157 3158 info = IEEE80211_SKB_CB(skb); 3159 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, mlink->band_idx); 3160 3161 mt7996_mcu_beacon_cont(dev, link_conf, link, rskb, skb, bcn, &offs); 3162 if (link_conf->bssid_indicator) 3163 mt7996_mcu_beacon_mbss(rskb, skb, bcn, &offs); 3164 mt7996_mcu_beacon_cntdwn(rskb, skb, &offs, link_conf->csa_active); 3165 out: 3166 dev_kfree_skb(skb); 3167 return mt76_mcu_skb_send_msg(&dev->mt76, rskb, 3168 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 3169 } 3170 3171 int mt7996_mcu_beacon_inband_discov(struct mt7996_dev *dev, 3172 struct ieee80211_bss_conf *link_conf, 3173 struct mt7996_vif_link *link, u32 changed) 3174 { 3175 #define OFFLOAD_TX_MODE_SU BIT(0) 3176 #define OFFLOAD_TX_MODE_MU BIT(1) 3177 struct mt76_phy *mphy = mt76_vif_link_phy(&link->mt76); 3178 struct ieee80211_vif *vif = link_conf->vif; 3179 struct ieee80211_hw *hw = mt76_hw(dev); 3180 struct mt76_wcid *wcid = &dev->mt76.global_wcid; 3181 struct bss_inband_discovery_tlv *discov; 3182 struct ieee80211_tx_info *info; 3183 struct sk_buff *rskb, *skb = NULL; 3184 struct cfg80211_chan_def *chandef; 3185 enum nl80211_band band; 3186 struct tlv *tlv; 3187 u8 *buf, interval; 3188 int len; 3189 3190 if (!mphy) 3191 return -EINVAL; 3192 3193 chandef = &mphy->chandef; 3194 band = chandef->chan->band; 3195 3196 if (link_conf->nontransmitted) 3197 return 0; 3198 3199 rskb = __mt7996_mcu_alloc_bss_req(&dev->mt76, &link->mt76, 3200 MT7996_MAX_BSS_OFFLOAD_SIZE); 3201 if (IS_ERR(rskb)) 3202 return PTR_ERR(rskb); 3203 3204 if (changed & BSS_CHANGED_FILS_DISCOVERY && 3205 link_conf->fils_discovery.max_interval) { 3206 interval = link_conf->fils_discovery.max_interval; 3207 skb = ieee80211_get_fils_discovery_tmpl(hw, vif, 3208 link_conf->link_id); 3209 } else if (changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP && 3210 link_conf->unsol_bcast_probe_resp_interval) { 3211 interval = link_conf->unsol_bcast_probe_resp_interval; 3212 skb = ieee80211_get_unsol_bcast_probe_resp_tmpl(hw, vif, 3213 link_conf->link_id); 3214 } 3215 3216 if (!skb) { 3217 dev_kfree_skb(rskb); 3218 return -EINVAL; 3219 } 3220 3221 if (skb->len > MT7996_MAX_BEACON_SIZE) { 3222 dev_err(dev->mt76.dev, "inband discovery size limit exceed\n"); 3223 dev_kfree_skb(rskb); 3224 dev_kfree_skb(skb); 3225 return -EINVAL; 3226 } 3227 3228 info = IEEE80211_SKB_CB(skb); 3229 info->control.vif = vif; 3230 info->band = band; 3231 info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, mphy->band_idx); 3232 3233 len = ALIGN(sizeof(*discov) + MT_TXD_SIZE + skb->len, 4); 3234 tlv = mt7996_mcu_add_uni_tlv(rskb, UNI_BSS_INFO_OFFLOAD, len); 3235 3236 discov = (struct bss_inband_discovery_tlv *)tlv; 3237 discov->tx_mode = OFFLOAD_TX_MODE_SU; 3238 /* 0: UNSOL PROBE RESP, 1: FILS DISCOV */ 3239 discov->tx_type = !!(changed & BSS_CHANGED_FILS_DISCOVERY); 3240 discov->tx_interval = interval; 3241 discov->prob_rsp_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 3242 discov->enable = true; 3243 discov->wcid = cpu_to_le16(MT7996_WTBL_RESERVED); 3244 3245 buf = (u8 *)tlv + sizeof(*discov); 3246 3247 mt7996_mac_write_txwi(dev, (__le32 *)buf, skb, wcid, NULL, 0, 0, changed); 3248 3249 memcpy(buf + MT_TXD_SIZE, skb->data, skb->len); 3250 3251 dev_kfree_skb(skb); 3252 3253 return mt76_mcu_skb_send_msg(&dev->mt76, rskb, 3254 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 3255 } 3256 3257 static int mt7996_driver_own(struct mt7996_dev *dev, u8 band) 3258 { 3259 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN); 3260 if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band), 3261 MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) { 3262 dev_err(dev->mt76.dev, "Timeout for driver own\n"); 3263 return -EIO; 3264 } 3265 3266 /* clear irq when the driver own success */ 3267 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band), 3268 MT_TOP_LPCR_HOST_BAND_STAT); 3269 3270 return 0; 3271 } 3272 3273 static u32 mt7996_patch_sec_mode(u32 key_info) 3274 { 3275 u32 sec = u32_get_bits(key_info, MT7996_PATCH_SEC), key = 0; 3276 3277 if (key_info == GENMASK(31, 0) || sec == MT7996_SEC_MODE_PLAIN) 3278 return 0; 3279 3280 if (sec == MT7996_SEC_MODE_AES) 3281 key = u32_get_bits(key_info, MT7996_PATCH_AES_KEY); 3282 else 3283 key = u32_get_bits(key_info, MT7996_PATCH_SCRAMBLE_KEY); 3284 3285 return MT7996_SEC_ENCRYPT | MT7996_SEC_IV | 3286 u32_encode_bits(key, MT7996_SEC_KEY_IDX); 3287 } 3288 3289 static int mt7996_load_patch(struct mt7996_dev *dev) 3290 { 3291 const struct mt7996_patch_hdr *hdr; 3292 const struct firmware *fw = NULL; 3293 int i, ret, sem; 3294 3295 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 1); 3296 switch (sem) { 3297 case PATCH_IS_DL: 3298 return 0; 3299 case PATCH_NOT_DL_SEM_SUCCESS: 3300 break; 3301 default: 3302 dev_err(dev->mt76.dev, "Failed to get patch semaphore\n"); 3303 return -EAGAIN; 3304 } 3305 3306 ret = request_firmware(&fw, fw_name(dev, ROM_PATCH), dev->mt76.dev); 3307 if (ret) 3308 goto out; 3309 3310 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 3311 dev_err(dev->mt76.dev, "Invalid firmware\n"); 3312 ret = -EINVAL; 3313 goto out; 3314 } 3315 3316 hdr = (const struct mt7996_patch_hdr *)(fw->data); 3317 3318 dev_info(dev->mt76.dev, "HW/SW Version: 0x%x, Build Time: %.16s\n", 3319 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date); 3320 3321 for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) { 3322 struct mt7996_patch_sec *sec; 3323 const u8 *dl; 3324 u32 len, addr, sec_key_idx, mode = DL_MODE_NEED_RSP; 3325 3326 sec = (struct mt7996_patch_sec *)(fw->data + sizeof(*hdr) + 3327 i * sizeof(*sec)); 3328 if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) != 3329 PATCH_SEC_TYPE_INFO) { 3330 ret = -EINVAL; 3331 goto out; 3332 } 3333 3334 addr = be32_to_cpu(sec->info.addr); 3335 len = be32_to_cpu(sec->info.len); 3336 sec_key_idx = be32_to_cpu(sec->info.sec_key_idx); 3337 dl = fw->data + be32_to_cpu(sec->offs); 3338 3339 mode |= mt7996_patch_sec_mode(sec_key_idx); 3340 3341 ret = mt76_connac_mcu_init_download(&dev->mt76, addr, len, 3342 mode); 3343 if (ret) { 3344 dev_err(dev->mt76.dev, "Download request failed\n"); 3345 goto out; 3346 } 3347 3348 ret = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER), 3349 dl, len, 4096); 3350 if (ret) { 3351 dev_err(dev->mt76.dev, "Failed to send patch\n"); 3352 goto out; 3353 } 3354 } 3355 3356 ret = mt76_connac_mcu_start_patch(&dev->mt76); 3357 if (ret) 3358 dev_err(dev->mt76.dev, "Failed to start patch\n"); 3359 3360 out: 3361 sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 0); 3362 switch (sem) { 3363 case PATCH_REL_SEM_SUCCESS: 3364 break; 3365 default: 3366 ret = -EAGAIN; 3367 dev_err(dev->mt76.dev, "Failed to release patch semaphore\n"); 3368 break; 3369 } 3370 release_firmware(fw); 3371 3372 return ret; 3373 } 3374 3375 static int 3376 mt7996_mcu_send_ram_firmware(struct mt7996_dev *dev, 3377 const struct mt7996_fw_trailer *hdr, 3378 const u8 *data, enum mt7996_ram_type type) 3379 { 3380 int i, offset = 0; 3381 u32 override = 0, option = 0; 3382 3383 for (i = 0; i < hdr->n_region; i++) { 3384 const struct mt7996_fw_region *region; 3385 int err; 3386 u32 len, addr, mode; 3387 3388 region = (const struct mt7996_fw_region *)((const u8 *)hdr - 3389 (hdr->n_region - i) * sizeof(*region)); 3390 /* DSP and WA use same mode */ 3391 mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76, 3392 region->feature_set, 3393 type != MT7996_RAM_TYPE_WM); 3394 len = le32_to_cpu(region->len); 3395 addr = le32_to_cpu(region->addr); 3396 3397 if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR) 3398 override = addr; 3399 3400 err = mt76_connac_mcu_init_download(&dev->mt76, addr, len, 3401 mode); 3402 if (err) { 3403 dev_err(dev->mt76.dev, "Download request failed\n"); 3404 return err; 3405 } 3406 3407 err = __mt76_mcu_send_firmware(&dev->mt76, MCU_CMD(FW_SCATTER), 3408 data + offset, len, 4096); 3409 if (err) { 3410 dev_err(dev->mt76.dev, "Failed to send firmware.\n"); 3411 return err; 3412 } 3413 3414 offset += len; 3415 } 3416 3417 if (override) 3418 option |= FW_START_OVERRIDE; 3419 3420 if (type == MT7996_RAM_TYPE_WA) 3421 option |= FW_START_WORKING_PDA_CR4; 3422 else if (type == MT7996_RAM_TYPE_DSP) 3423 option |= FW_START_WORKING_PDA_DSP; 3424 3425 return mt76_connac_mcu_start_firmware(&dev->mt76, override, option); 3426 } 3427 3428 static int __mt7996_load_ram(struct mt7996_dev *dev, const char *fw_type, 3429 const char *fw_file, enum mt7996_ram_type ram_type) 3430 { 3431 const struct mt7996_fw_trailer *hdr; 3432 const struct firmware *fw; 3433 int ret; 3434 3435 ret = request_firmware(&fw, fw_file, dev->mt76.dev); 3436 if (ret) 3437 return ret; 3438 3439 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 3440 dev_err(dev->mt76.dev, "Invalid firmware\n"); 3441 ret = -EINVAL; 3442 goto out; 3443 } 3444 3445 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr)); 3446 dev_info(dev->mt76.dev, "%s Firmware Version: %.10s, Build Time: %.15s\n", 3447 fw_type, hdr->fw_ver, hdr->build_date); 3448 3449 ret = mt7996_mcu_send_ram_firmware(dev, hdr, fw->data, ram_type); 3450 if (ret) { 3451 dev_err(dev->mt76.dev, "Failed to start %s firmware\n", fw_type); 3452 goto out; 3453 } 3454 3455 snprintf(dev->mt76.hw->wiphy->fw_version, 3456 sizeof(dev->mt76.hw->wiphy->fw_version), 3457 "%.10s-%.15s", hdr->fw_ver, hdr->build_date); 3458 3459 out: 3460 release_firmware(fw); 3461 3462 return ret; 3463 } 3464 3465 static int mt7996_load_ram(struct mt7996_dev *dev) 3466 { 3467 int ret; 3468 3469 ret = __mt7996_load_ram(dev, "WM", fw_name(dev, FIRMWARE_WM), 3470 MT7996_RAM_TYPE_WM); 3471 if (ret) 3472 return ret; 3473 3474 if (!mt7996_has_wa(dev)) 3475 return 0; 3476 3477 ret = __mt7996_load_ram(dev, "DSP", fw_name(dev, FIRMWARE_DSP), 3478 MT7996_RAM_TYPE_DSP); 3479 if (ret) 3480 return ret; 3481 3482 return __mt7996_load_ram(dev, "WA", fw_name(dev, FIRMWARE_WA), 3483 MT7996_RAM_TYPE_WA); 3484 } 3485 3486 static int 3487 mt7996_firmware_state(struct mt7996_dev *dev, u8 fw_state) 3488 { 3489 u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE, fw_state); 3490 3491 if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE, 3492 state, 1000)) { 3493 dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); 3494 return -EIO; 3495 } 3496 return 0; 3497 } 3498 3499 static int 3500 mt7996_mcu_restart(struct mt76_dev *dev) 3501 { 3502 struct { 3503 u8 __rsv1[4]; 3504 3505 __le16 tag; 3506 __le16 len; 3507 u8 power_mode; 3508 u8 __rsv2[3]; 3509 } __packed req = { 3510 .tag = cpu_to_le16(UNI_POWER_OFF), 3511 .len = cpu_to_le16(sizeof(req) - 4), 3512 .power_mode = 1, 3513 }; 3514 3515 return mt76_mcu_send_msg(dev, MCU_WM_UNI_CMD(POWER_CTRL), &req, 3516 sizeof(req), false); 3517 } 3518 3519 static int mt7996_load_firmware(struct mt7996_dev *dev) 3520 { 3521 u8 fw_state; 3522 int ret; 3523 3524 /* make sure fw is download state */ 3525 if (mt7996_firmware_state(dev, FW_STATE_FW_DOWNLOAD)) { 3526 /* restart firmware once */ 3527 mt7996_mcu_restart(&dev->mt76); 3528 ret = mt7996_firmware_state(dev, FW_STATE_FW_DOWNLOAD); 3529 if (ret) { 3530 dev_err(dev->mt76.dev, 3531 "Firmware is not ready for download\n"); 3532 return ret; 3533 } 3534 } 3535 3536 ret = mt7996_load_patch(dev); 3537 if (ret) 3538 return ret; 3539 3540 ret = mt7996_load_ram(dev); 3541 if (ret) 3542 return ret; 3543 3544 fw_state = mt7996_has_wa(dev) ? FW_STATE_RDY : FW_STATE_NORMAL_TRX; 3545 ret = mt7996_firmware_state(dev, fw_state); 3546 if (ret) 3547 return ret; 3548 3549 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false); 3550 3551 dev_dbg(dev->mt76.dev, "Firmware init done\n"); 3552 3553 return 0; 3554 } 3555 3556 int mt7996_mcu_fw_log_2_host(struct mt7996_dev *dev, u8 type, u8 ctrl) 3557 { 3558 struct { 3559 u8 _rsv[4]; 3560 3561 __le16 tag; 3562 __le16 len; 3563 u8 ctrl; 3564 u8 interval; 3565 u8 _rsv2[2]; 3566 } __packed data = { 3567 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_LOG_CTRL), 3568 .len = cpu_to_le16(sizeof(data) - 4), 3569 .ctrl = ctrl, 3570 }; 3571 3572 if (type == MCU_FW_LOG_WA) 3573 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_UNI_CMD(WSYS_CONFIG), 3574 &data, sizeof(data), true); 3575 3576 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data, 3577 sizeof(data), true); 3578 } 3579 3580 int mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev *dev, u32 module, u8 level) 3581 { 3582 struct { 3583 u8 _rsv[4]; 3584 3585 __le16 tag; 3586 __le16 len; 3587 __le32 module_idx; 3588 u8 level; 3589 u8 _rsv2[3]; 3590 } data = { 3591 .tag = cpu_to_le16(UNI_WSYS_CONFIG_FW_DBG_CTRL), 3592 .len = cpu_to_le16(sizeof(data) - 4), 3593 .module_idx = cpu_to_le32(module), 3594 .level = level, 3595 }; 3596 3597 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(WSYS_CONFIG), &data, 3598 sizeof(data), false); 3599 } 3600 3601 static int mt7996_mcu_set_mwds(struct mt7996_dev *dev, bool enabled) 3602 { 3603 struct { 3604 u8 enable; 3605 u8 _rsv[3]; 3606 } __packed req = { 3607 .enable = enabled 3608 }; 3609 3610 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req, 3611 sizeof(req), false); 3612 } 3613 3614 static void mt7996_add_rx_airtime_tlv(struct sk_buff *skb, u8 band_idx) 3615 { 3616 struct vow_rx_airtime *req; 3617 struct tlv *tlv; 3618 3619 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_CLR_EN, sizeof(*req)); 3620 req = (struct vow_rx_airtime *)tlv; 3621 req->enable = true; 3622 req->band = band_idx; 3623 3624 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_VOW_RX_AT_AIRTIME_EN, sizeof(*req)); 3625 req = (struct vow_rx_airtime *)tlv; 3626 req->enable = true; 3627 req->band = band_idx; 3628 } 3629 3630 static int 3631 mt7996_mcu_init_rx_airtime(struct mt7996_dev *dev) 3632 { 3633 struct uni_header hdr = {}; 3634 struct sk_buff *skb; 3635 int len, num, i; 3636 3637 num = 2 + 2 * (mt7996_band_valid(dev, MT_BAND1) + 3638 mt7996_band_valid(dev, MT_BAND2)); 3639 len = sizeof(hdr) + num * sizeof(struct vow_rx_airtime); 3640 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3641 if (!skb) 3642 return -ENOMEM; 3643 3644 skb_put_data(skb, &hdr, sizeof(hdr)); 3645 3646 for (i = 0; i < __MT_MAX_BAND; i++) { 3647 if (mt7996_band_valid(dev, i)) 3648 mt7996_add_rx_airtime_tlv(skb, i); 3649 } 3650 3651 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3652 MCU_WM_UNI_CMD(VOW), true); 3653 } 3654 3655 int mt7996_mcu_init_firmware(struct mt7996_dev *dev) 3656 { 3657 int ret; 3658 3659 /* force firmware operation mode into normal state, 3660 * which should be set before firmware download stage. 3661 */ 3662 mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE); 3663 3664 ret = mt7996_driver_own(dev, 0); 3665 if (ret) 3666 return ret; 3667 /* set driver own for band1 when two hif exist */ 3668 if (dev->hif2) { 3669 ret = mt7996_driver_own(dev, 1); 3670 if (ret) 3671 return ret; 3672 } 3673 3674 ret = mt7996_load_firmware(dev); 3675 if (ret) 3676 return ret; 3677 3678 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); 3679 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0); 3680 if (ret) 3681 return ret; 3682 3683 if (mt7996_has_wa(dev)) { 3684 ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0); 3685 if (ret) 3686 return ret; 3687 3688 ret = mt7996_mcu_set_mwds(dev, 1); 3689 if (ret) 3690 return ret; 3691 } 3692 3693 ret = mt7996_mcu_init_rx_airtime(dev); 3694 if (ret) 3695 return ret; 3696 3697 return mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), 3698 MCU_WA_PARAM_RED, 0, 0); 3699 } 3700 3701 int mt7996_mcu_init(struct mt7996_dev *dev) 3702 { 3703 static const struct mt76_mcu_ops mt7996_mcu_ops = { 3704 .headroom = sizeof(struct mt76_connac2_mcu_txd), /* reuse */ 3705 .mcu_skb_send_msg = mt7996_mcu_send_message, 3706 .mcu_parse_response = mt7996_mcu_parse_response, 3707 }; 3708 3709 dev->mt76.mcu_ops = &mt7996_mcu_ops; 3710 3711 return mt7996_mcu_init_firmware(dev); 3712 } 3713 3714 void mt7996_mcu_exit(struct mt7996_dev *dev) 3715 { 3716 mt7996_mcu_restart(&dev->mt76); 3717 if (mt7996_firmware_state(dev, FW_STATE_FW_DOWNLOAD)) { 3718 dev_err(dev->mt76.dev, "Failed to exit mcu\n"); 3719 goto out; 3720 } 3721 3722 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN); 3723 if (dev->hif2) 3724 mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1), 3725 MT_TOP_LPCR_HOST_FW_OWN); 3726 out: 3727 skb_queue_purge(&dev->mt76.mcu.res_q); 3728 } 3729 3730 int mt7996_mcu_set_hdr_trans(struct mt7996_dev *dev, bool hdr_trans) 3731 { 3732 struct { 3733 u8 __rsv[4]; 3734 } __packed hdr = {}; 3735 struct hdr_trans_blacklist *req_blacklist; 3736 struct hdr_trans_en *req_en; 3737 struct sk_buff *skb; 3738 struct tlv *tlv; 3739 int len = MT7996_HDR_TRANS_MAX_SIZE + sizeof(hdr); 3740 3741 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3742 if (!skb) 3743 return -ENOMEM; 3744 3745 skb_put_data(skb, &hdr, sizeof(hdr)); 3746 3747 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_EN, sizeof(*req_en)); 3748 req_en = (struct hdr_trans_en *)tlv; 3749 req_en->enable = hdr_trans; 3750 3751 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_VLAN, 3752 sizeof(struct hdr_trans_vlan)); 3753 3754 if (hdr_trans) { 3755 tlv = mt7996_mcu_add_uni_tlv(skb, UNI_HDR_TRANS_BLACKLIST, 3756 sizeof(*req_blacklist)); 3757 req_blacklist = (struct hdr_trans_blacklist *)tlv; 3758 req_blacklist->enable = 1; 3759 req_blacklist->type = cpu_to_le16(ETH_P_PAE); 3760 } 3761 3762 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3763 MCU_WM_UNI_CMD(RX_HDR_TRANS), true); 3764 } 3765 3766 int mt7996_mcu_set_tx(struct mt7996_dev *dev, struct ieee80211_vif *vif, 3767 struct ieee80211_bss_conf *link_conf) 3768 { 3769 #define MCU_EDCA_AC_PARAM 0 3770 #define WMM_AIFS_SET BIT(0) 3771 #define WMM_CW_MIN_SET BIT(1) 3772 #define WMM_CW_MAX_SET BIT(2) 3773 #define WMM_TXOP_SET BIT(3) 3774 #define WMM_PARAM_SET (WMM_AIFS_SET | WMM_CW_MIN_SET | \ 3775 WMM_CW_MAX_SET | WMM_TXOP_SET) 3776 struct mt7996_vif_link *link = mt7996_vif_conf_link(dev, vif, link_conf); 3777 struct mt7996_vif *mvif = (struct mt7996_vif *)vif->drv_priv; 3778 unsigned int link_id = link_conf->link_id; 3779 struct mt7996_vif_link_info *link_info = &mvif->link_info[link_id]; 3780 struct { 3781 u8 bss_idx; 3782 u8 __rsv[3]; 3783 } __packed hdr = { 3784 .bss_idx = link->mt76.idx, 3785 }; 3786 struct sk_buff *skb; 3787 int len = sizeof(hdr) + IEEE80211_NUM_ACS * sizeof(struct edca); 3788 int ac; 3789 3790 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 3791 if (!skb) 3792 return -ENOMEM; 3793 3794 skb_put_data(skb, &hdr, sizeof(hdr)); 3795 3796 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { 3797 struct ieee80211_tx_queue_params *q = &link_info->queue_params[ac]; 3798 struct edca *e; 3799 struct tlv *tlv; 3800 3801 tlv = mt7996_mcu_add_uni_tlv(skb, MCU_EDCA_AC_PARAM, sizeof(*e)); 3802 3803 e = (struct edca *)tlv; 3804 e->set = WMM_PARAM_SET; 3805 e->queue = ac; 3806 e->aifs = q->aifs; 3807 e->txop = cpu_to_le16(q->txop); 3808 3809 if (q->cw_min) 3810 e->cw_min = fls(q->cw_min); 3811 else 3812 e->cw_min = 5; 3813 3814 if (q->cw_max) 3815 e->cw_max = fls(q->cw_max); 3816 else 3817 e->cw_max = 10; 3818 } 3819 3820 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 3821 MCU_WM_UNI_CMD(EDCA_UPDATE), true); 3822 } 3823 3824 int mt7996_mcu_set_fcc5_lpn(struct mt7996_dev *dev, int val) 3825 { 3826 struct { 3827 u8 _rsv[4]; 3828 3829 __le16 tag; 3830 __le16 len; 3831 3832 __le32 ctrl; 3833 __le16 min_lpn; 3834 u8 rsv[2]; 3835 } __packed req = { 3836 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3837 .len = cpu_to_le16(sizeof(req) - 4), 3838 3839 .ctrl = cpu_to_le32(0x1), 3840 .min_lpn = cpu_to_le16(val), 3841 }; 3842 3843 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3844 &req, sizeof(req), true); 3845 } 3846 3847 int mt7996_mcu_set_pulse_th(struct mt7996_dev *dev, 3848 const struct mt7996_dfs_pulse *pulse) 3849 { 3850 struct { 3851 u8 _rsv[4]; 3852 3853 __le16 tag; 3854 __le16 len; 3855 3856 __le32 ctrl; 3857 3858 __le32 max_width; /* us */ 3859 __le32 max_pwr; /* dbm */ 3860 __le32 min_pwr; /* dbm */ 3861 __le32 min_stgr_pri; /* us */ 3862 __le32 max_stgr_pri; /* us */ 3863 __le32 min_cr_pri; /* us */ 3864 __le32 max_cr_pri; /* us */ 3865 } __packed req = { 3866 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3867 .len = cpu_to_le16(sizeof(req) - 4), 3868 3869 .ctrl = cpu_to_le32(0x3), 3870 3871 #define __req_field(field) .field = cpu_to_le32(pulse->field) 3872 __req_field(max_width), 3873 __req_field(max_pwr), 3874 __req_field(min_pwr), 3875 __req_field(min_stgr_pri), 3876 __req_field(max_stgr_pri), 3877 __req_field(min_cr_pri), 3878 __req_field(max_cr_pri), 3879 #undef __req_field 3880 }; 3881 3882 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3883 &req, sizeof(req), true); 3884 } 3885 3886 int mt7996_mcu_set_radar_th(struct mt7996_dev *dev, int index, 3887 const struct mt7996_dfs_pattern *pattern) 3888 { 3889 struct { 3890 u8 _rsv[4]; 3891 3892 __le16 tag; 3893 __le16 len; 3894 3895 __le32 ctrl; 3896 __le16 radar_type; 3897 3898 u8 enb; 3899 u8 stgr; 3900 u8 min_crpn; 3901 u8 max_crpn; 3902 u8 min_crpr; 3903 u8 min_pw; 3904 __le32 min_pri; 3905 __le32 max_pri; 3906 u8 max_pw; 3907 u8 min_crbn; 3908 u8 max_crbn; 3909 u8 min_stgpn; 3910 u8 max_stgpn; 3911 u8 min_stgpr; 3912 u8 rsv[2]; 3913 __le32 min_stgpr_diff; 3914 } __packed req = { 3915 .tag = cpu_to_le16(UNI_RDD_CTRL_SET_TH), 3916 .len = cpu_to_le16(sizeof(req) - 4), 3917 3918 .ctrl = cpu_to_le32(0x2), 3919 .radar_type = cpu_to_le16(index), 3920 3921 #define __req_field_u8(field) .field = pattern->field 3922 #define __req_field_u32(field) .field = cpu_to_le32(pattern->field) 3923 __req_field_u8(enb), 3924 __req_field_u8(stgr), 3925 __req_field_u8(min_crpn), 3926 __req_field_u8(max_crpn), 3927 __req_field_u8(min_crpr), 3928 __req_field_u8(min_pw), 3929 __req_field_u32(min_pri), 3930 __req_field_u32(max_pri), 3931 __req_field_u8(max_pw), 3932 __req_field_u8(min_crbn), 3933 __req_field_u8(max_crbn), 3934 __req_field_u8(min_stgpn), 3935 __req_field_u8(max_stgpn), 3936 __req_field_u8(min_stgpr), 3937 __req_field_u32(min_stgpr_diff), 3938 #undef __req_field_u8 3939 #undef __req_field_u32 3940 }; 3941 3942 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 3943 &req, sizeof(req), true); 3944 } 3945 3946 static int 3947 mt7996_mcu_background_chain_ctrl(struct mt7996_phy *phy, 3948 struct cfg80211_chan_def *chandef, 3949 int cmd) 3950 { 3951 struct mt7996_dev *dev = phy->dev; 3952 struct mt76_phy *mphy = phy->mt76; 3953 struct ieee80211_channel *chan = mphy->chandef.chan; 3954 int freq = mphy->chandef.center_freq1; 3955 struct mt7996_mcu_background_chain_ctrl req = { 3956 .tag = cpu_to_le16(0), 3957 .len = cpu_to_le16(sizeof(req) - 4), 3958 .monitor_scan_type = 2, /* simple rx */ 3959 }; 3960 3961 if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP) 3962 return -EINVAL; 3963 3964 if (!cfg80211_chandef_valid(&mphy->chandef)) 3965 return -EINVAL; 3966 3967 switch (cmd) { 3968 case CH_SWITCH_BACKGROUND_SCAN_START: { 3969 req.chan = chan->hw_value; 3970 req.central_chan = ieee80211_frequency_to_channel(freq); 3971 req.bw = mt76_connac_chan_bw(&mphy->chandef); 3972 req.monitor_chan = chandef->chan->hw_value; 3973 req.monitor_central_chan = 3974 ieee80211_frequency_to_channel(chandef->center_freq1); 3975 req.monitor_bw = mt76_connac_chan_bw(chandef); 3976 req.band_idx = phy->mt76->band_idx; 3977 req.scan_mode = 1; 3978 break; 3979 } 3980 case CH_SWITCH_BACKGROUND_SCAN_RUNNING: 3981 req.monitor_chan = chandef->chan->hw_value; 3982 req.monitor_central_chan = 3983 ieee80211_frequency_to_channel(chandef->center_freq1); 3984 req.band_idx = phy->mt76->band_idx; 3985 req.scan_mode = 2; 3986 break; 3987 case CH_SWITCH_BACKGROUND_SCAN_STOP: 3988 req.chan = chan->hw_value; 3989 req.central_chan = ieee80211_frequency_to_channel(freq); 3990 req.bw = mt76_connac_chan_bw(&mphy->chandef); 3991 req.tx_stream = hweight8(mphy->antenna_mask); 3992 req.rx_stream = mphy->antenna_mask; 3993 break; 3994 default: 3995 return -EINVAL; 3996 } 3997 req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1; 3998 3999 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(OFFCH_SCAN_CTRL), 4000 &req, sizeof(req), false); 4001 } 4002 4003 int mt7996_mcu_rdd_background_enable(struct mt7996_phy *phy, 4004 struct cfg80211_chan_def *chandef) 4005 { 4006 struct mt7996_dev *dev = phy->dev; 4007 int err, region, rdd_idx = mt7996_get_rdd_idx(phy, true); 4008 4009 if (!chandef) { /* disable offchain */ 4010 err = mt7996_mcu_rdd_cmd(dev, RDD_STOP, rdd_idx, 0); 4011 if (err) 4012 return err; 4013 4014 return mt7996_mcu_background_chain_ctrl(phy, NULL, 4015 CH_SWITCH_BACKGROUND_SCAN_STOP); 4016 } 4017 4018 err = mt7996_mcu_background_chain_ctrl(phy, chandef, 4019 CH_SWITCH_BACKGROUND_SCAN_START); 4020 if (err) 4021 return err; 4022 4023 switch (dev->mt76.region) { 4024 case NL80211_DFS_ETSI: 4025 region = 0; 4026 break; 4027 case NL80211_DFS_JP: 4028 region = 2; 4029 break; 4030 case NL80211_DFS_FCC: 4031 default: 4032 region = 1; 4033 break; 4034 } 4035 4036 return mt7996_mcu_rdd_cmd(dev, RDD_START, rdd_idx, region); 4037 } 4038 4039 int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag) 4040 { 4041 static const u8 ch_band[] = { 4042 [NL80211_BAND_2GHZ] = 0, 4043 [NL80211_BAND_5GHZ] = 1, 4044 [NL80211_BAND_6GHZ] = 2, 4045 }; 4046 struct mt7996_dev *dev = phy->dev; 4047 struct cfg80211_chan_def *chandef = &phy->mt76->chandef; 4048 int freq1 = chandef->center_freq1; 4049 u8 band_idx = phy->mt76->band_idx; 4050 struct { 4051 /* fixed field */ 4052 u8 __rsv[4]; 4053 4054 __le16 tag; 4055 __le16 len; 4056 u8 control_ch; 4057 u8 center_ch; 4058 u8 bw; 4059 u8 tx_path_num; 4060 u8 rx_path; /* mask or num */ 4061 u8 switch_reason; 4062 u8 band_idx; 4063 u8 center_ch2; /* for 80+80 only */ 4064 __le16 cac_case; 4065 u8 channel_band; 4066 u8 rsv0; 4067 __le32 outband_freq; 4068 u8 txpower_drop; 4069 u8 ap_bw; 4070 u8 ap_center_ch; 4071 u8 rsv1[53]; 4072 } __packed req = { 4073 .tag = cpu_to_le16(tag), 4074 .len = cpu_to_le16(sizeof(req) - 4), 4075 .control_ch = chandef->chan->hw_value, 4076 .center_ch = ieee80211_frequency_to_channel(freq1), 4077 .bw = mt76_connac_chan_bw(chandef), 4078 .tx_path_num = hweight16(phy->mt76->chainmask), 4079 .rx_path = mt7996_rx_chainmask(phy) >> dev->chainshift[band_idx], 4080 .band_idx = band_idx, 4081 .channel_band = ch_band[chandef->chan->band], 4082 }; 4083 4084 if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR) 4085 req.switch_reason = CH_SWITCH_NORMAL; 4086 else if (phy->mt76->offchannel || !phy->mt76->chanctx) 4087 req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD; 4088 else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef, 4089 NL80211_IFTYPE_AP)) 4090 req.switch_reason = CH_SWITCH_DFS; 4091 else 4092 req.switch_reason = CH_SWITCH_NORMAL; 4093 4094 if (tag == UNI_CHANNEL_SWITCH) 4095 req.rx_path = hweight8(req.rx_path); 4096 4097 if (chandef->width == NL80211_CHAN_WIDTH_80P80) { 4098 int freq2 = chandef->center_freq2; 4099 4100 req.center_ch2 = ieee80211_frequency_to_channel(freq2); 4101 } 4102 4103 return mt76_mcu_send_msg(&dev->mt76, MCU_WMWA_UNI_CMD(CHANNEL_SWITCH), 4104 &req, sizeof(req), true); 4105 } 4106 4107 static int 4108 mt7996_mcu_get_cal_free_data(struct mt7996_dev *dev) 4109 { 4110 #define MT_EE_7977BN_OFFSET (0x1200 - 0x500) 4111 struct cal_free_data { 4112 u16 adie_offs; 4113 u16 eep_offs; 4114 }; 4115 static const struct cal_free_data cal_7975[] = { 4116 { 0x5cd, 0x451 }, { 0x5cf, 0x453 }, { 0x5d1, 0x455 }, 4117 { 0x5d3, 0x457 }, { 0x6c0, 0x44c }, { 0x6c1, 0x44d }, 4118 { 0x6c2, 0x44e }, { 0x6c3, 0x44f }, { 0x7a1, 0xba1 }, 4119 { 0x7a6, 0xba6 }, { 0x7a8, 0xba8 }, { 0x7aa, 0xbaa }, 4120 }; 4121 static const struct cal_free_data cal_7976[] = { 4122 { 0x4c, 0x44c }, { 0x4d, 0x44d }, { 0x4e, 0x44e }, 4123 { 0x4f, 0x44f }, { 0x50, 0x450 }, { 0x51, 0x451 }, 4124 { 0x53, 0x453 }, { 0x55, 0x455 }, { 0x57, 0x457 }, 4125 { 0x59, 0x459 }, { 0x70, 0x470 }, { 0x71, 0x471 }, 4126 { 0x790, 0xb90 }, { 0x791, 0xb91 }, { 0x794, 0xb94 }, 4127 { 0x795, 0xb95 }, { 0x7a6, 0xba6 }, { 0x7a8, 0xba8 }, 4128 { 0x7aa, 0xbaa }, 4129 }; 4130 static const struct cal_free_data cal_7977[] = { 4131 { 0x4c, 0x124c }, { 0x4d, 0x124d }, { 0x4e, 0x124e }, 4132 { 0x4f, 0x124f }, { 0x50, 0x1250 }, { 0x51, 0x1251 }, 4133 { 0x53, 0x1253 }, { 0x55, 0x1255 }, { 0x57, 0x1257 }, 4134 { 0x59, 0x1259 }, { 0x69, 0x1269 }, { 0x6a, 0x126a }, 4135 { 0x7a, 0x127a }, { 0x7b, 0x127b }, { 0x7c, 0x127c }, 4136 { 0x7d, 0x127d }, { 0x7e, 0x127e }, 4137 }; 4138 static const struct cal_free_data cal_7978[] = { 4139 { 0x91, 0xb91 }, { 0x95, 0xb95 }, { 0x100, 0x480 }, 4140 { 0x102, 0x482 }, { 0x104, 0x484 }, { 0x106, 0x486 }, 4141 { 0x107, 0x487 }, { 0x108, 0x488 }, { 0x109, 0x489 }, 4142 { 0x10a, 0x48a }, { 0x10b, 0x48b }, { 0x10c, 0x48c }, 4143 { 0x10e, 0x48e }, { 0x110, 0x490 }, 4144 }; 4145 static const struct cal_free_data cal_7979[] = { 4146 { 0x4c, 0x124c }, { 0x4d, 0x124d }, { 0x4e, 0x124e }, 4147 { 0x4f, 0x124f }, { 0x50, 0x1250 }, { 0x51, 0x1251 }, 4148 { 0x53, 0x1253 }, { 0x55, 0x1255 }, { 0x57, 0x1257 }, 4149 { 0x59, 0x1259 }, { 0x69, 0x1269 }, { 0x6a, 0x126a }, 4150 { 0x7a, 0x127a }, { 0x7b, 0x127b }, { 0x7c, 0x127c }, 4151 { 0x7e, 0x127e }, { 0x80, 0x1280 }, 4152 }; 4153 const struct cal_free_data *cal_arr[__MT_MAX_BAND]; 4154 u16 cal_arr_len[__MT_MAX_BAND] = {}; 4155 u8 *eeprom = (u8 *)dev->mt76.eeprom.data; 4156 int band, i, ret; 4157 4158 #define CAL_ARR(_band, _adie) do { \ 4159 cal_arr[_band] = cal_##_adie; \ 4160 cal_arr_len[_band] = ARRAY_SIZE(cal_##_adie); \ 4161 } while (0) 4162 4163 switch (mt76_chip(&dev->mt76)) { 4164 case MT7996_DEVICE_ID: 4165 /* adie 0 */ 4166 if (dev->var.fem == MT7996_FEM_INT && 4167 dev->var.type != MT7996_VAR_TYPE_233) 4168 CAL_ARR(0, 7975); 4169 else 4170 CAL_ARR(0, 7976); 4171 4172 /* adie 1 */ 4173 if (dev->var.type == MT7996_VAR_TYPE_444) 4174 CAL_ARR(1, 7977); 4175 4176 /* adie 2 */ 4177 CAL_ARR(2, 7977); 4178 break; 4179 case MT7992_DEVICE_ID: 4180 /* adie 0 */ 4181 if (dev->var.type == MT7992_VAR_TYPE_44 && 4182 dev->var.fem != MT7996_FEM_EXT) 4183 CAL_ARR(0, 7975); 4184 else if (dev->var.type == MT7992_VAR_TYPE_24) 4185 CAL_ARR(0, 7978); 4186 else 4187 CAL_ARR(0, 7976); 4188 4189 /* adie 1 */ 4190 if (dev->var.type == MT7992_VAR_TYPE_44 && 4191 dev->var.fem != MT7996_FEM_INT) 4192 CAL_ARR(1, 7977); 4193 else if (dev->var.type != MT7992_VAR_TYPE_23) 4194 CAL_ARR(1, 7979); 4195 break; 4196 case MT7990_DEVICE_ID: 4197 /* adie 0 */ 4198 CAL_ARR(0, 7976); 4199 break; 4200 default: 4201 return -EINVAL; 4202 } 4203 4204 for (band = 0; band < __MT_MAX_BAND; band++) { 4205 u8 buf[MT7996_EEPROM_BLOCK_SIZE]; 4206 const struct cal_free_data *cal; 4207 u16 prev_block_idx = -1; 4208 u16 adie_base; 4209 4210 if (!cal_arr_len[band]) 4211 continue; 4212 4213 if (band == MT_BAND0) 4214 adie_base = MT7996_EFUSE_BASE_OFFS_ADIE0; 4215 else if (band == MT_BAND1 && is_mt7992(&dev->mt76)) 4216 adie_base = MT7992_EFUSE_BASE_OFFS_ADIE1; 4217 else if (band == MT_BAND1) 4218 adie_base = MT7996_EFUSE_BASE_OFFS_ADIE1; 4219 else 4220 adie_base = MT7996_EFUSE_BASE_OFFS_ADIE2; 4221 4222 cal = cal_arr[band]; 4223 for (i = 0; i < cal_arr_len[band]; i++) { 4224 u16 adie_offset = cal[i].adie_offs + adie_base; 4225 u16 eep_offset = cal[i].eep_offs; 4226 u16 block_idx = adie_offset / MT7996_EEPROM_BLOCK_SIZE; 4227 u16 offset = adie_offset % MT7996_EEPROM_BLOCK_SIZE; 4228 4229 if (is_mt7996(&dev->mt76) && band == MT_BAND1 && 4230 dev->var.type == MT7996_VAR_TYPE_444) 4231 eep_offset -= MT_EE_7977BN_OFFSET; 4232 4233 if (prev_block_idx != block_idx) { 4234 memset(buf, 0, sizeof(buf)); 4235 ret = mt7996_mcu_get_eeprom(dev, adie_offset, buf, 4236 MT7996_EEPROM_BLOCK_SIZE, 4237 EEPROM_MODE_EFUSE); 4238 if (ret) { 4239 if (ret != -EINVAL) 4240 return ret; 4241 prev_block_idx = -1; 4242 continue; 4243 } 4244 } 4245 eeprom[eep_offset] = buf[offset]; 4246 prev_block_idx = block_idx; 4247 } 4248 } 4249 4250 return 0; 4251 } 4252 4253 int mt7996_mcu_set_eeprom(struct mt7996_dev *dev) 4254 { 4255 #define MAX_PAGE_IDX_MASK GENMASK(7, 5) 4256 #define PAGE_IDX_MASK GENMASK(4, 2) 4257 #define PER_PAGE_SIZE 0x400 4258 struct mt7996_mcu_eeprom_update req = { 4259 .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE), 4260 .buffer_mode = EE_MODE_BUFFER 4261 }; 4262 u16 eeprom_size = MT7996_EEPROM_SIZE; 4263 u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE); 4264 u8 *eep = (u8 *)dev->mt76.eeprom.data; 4265 int ret, eep_len, i; 4266 4267 ret = mt7996_mcu_get_cal_free_data(dev); 4268 if (ret) 4269 return ret; 4270 4271 for (i = 0; i < total; i++, eep += eep_len) { 4272 struct sk_buff *skb; 4273 int msg_len; 4274 4275 if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE)) 4276 eep_len = eeprom_size % PER_PAGE_SIZE; 4277 else 4278 eep_len = PER_PAGE_SIZE; 4279 4280 msg_len = sizeof(req) + eep_len; 4281 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, msg_len); 4282 if (!skb) 4283 return -ENOMEM; 4284 4285 req.len = cpu_to_le16(msg_len - 4); 4286 req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) | 4287 FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE; 4288 req.buf_len = cpu_to_le16(eep_len); 4289 4290 skb_put_data(skb, &req, sizeof(req)); 4291 skb_put_data(skb, eep, eep_len); 4292 4293 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 4294 MCU_WM_UNI_CMD(EFUSE_CTRL), true); 4295 if (ret) 4296 return ret; 4297 } 4298 4299 return 0; 4300 } 4301 4302 int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset, u8 *buf, u32 buf_len, 4303 enum mt7996_eeprom_mode mode) 4304 { 4305 struct mt7996_mcu_eeprom_access req = { 4306 .info.len = cpu_to_le16(sizeof(req) - 4), 4307 }; 4308 struct mt7996_mcu_eeprom_access_event *event; 4309 struct sk_buff *skb; 4310 int ret, cmd; 4311 u32 addr; 4312 4313 switch (mode) { 4314 case EEPROM_MODE_EFUSE: 4315 addr = round_down(offset, MT7996_EEPROM_BLOCK_SIZE); 4316 cmd = MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL); 4317 req.info.tag = cpu_to_le16(UNI_EFUSE_ACCESS); 4318 break; 4319 case EEPROM_MODE_EXT: 4320 addr = round_down(offset, MT7996_EXT_EEPROM_BLOCK_SIZE); 4321 cmd = MCU_WM_UNI_CMD_QUERY(EXT_EEPROM_CTRL); 4322 req.info.tag = cpu_to_le16(UNI_EXT_EEPROM_ACCESS); 4323 req.eeprom.ext_eeprom.data_len = cpu_to_le32(buf_len); 4324 break; 4325 default: 4326 return -EINVAL; 4327 } 4328 4329 req.info.addr = cpu_to_le32(addr); 4330 ret = mt76_mcu_send_and_get_msg(&dev->mt76, cmd, &req, sizeof(req), 4331 true, &skb); 4332 if (ret) 4333 return ret; 4334 4335 event = (struct mt7996_mcu_eeprom_access_event *)skb->data; 4336 if (event->valid) { 4337 u32 ret_len = le32_to_cpu(event->eeprom.ext_eeprom.data_len); 4338 4339 addr = le32_to_cpu(event->addr); 4340 4341 if (!buf) 4342 buf = (u8 *)dev->mt76.eeprom.data + addr; 4343 4344 switch (mode) { 4345 case EEPROM_MODE_EFUSE: 4346 if (!buf_len || buf_len > MT7996_EEPROM_BLOCK_SIZE) 4347 buf_len = MT7996_EEPROM_BLOCK_SIZE; 4348 4349 memcpy(buf, event->eeprom.efuse, buf_len); 4350 break; 4351 case EEPROM_MODE_EXT: 4352 if (!buf_len || buf_len > MT7996_EXT_EEPROM_BLOCK_SIZE) 4353 buf_len = MT7996_EXT_EEPROM_BLOCK_SIZE; 4354 4355 memcpy(buf, event->eeprom.ext_eeprom.data, 4356 ret_len < buf_len ? ret_len : buf_len); 4357 break; 4358 default: 4359 ret = -EINVAL; 4360 break; 4361 } 4362 } else { 4363 ret = -EINVAL; 4364 } 4365 4366 dev_kfree_skb(skb); 4367 4368 return ret; 4369 } 4370 4371 int mt7996_mcu_get_efuse_free_block(struct mt7996_dev *dev, u8 *block_num) 4372 { 4373 struct { 4374 u8 _rsv[4]; 4375 4376 __le16 tag; 4377 __le16 len; 4378 u8 num; 4379 u8 version; 4380 u8 die_idx; 4381 u8 _rsv2; 4382 } __packed req = { 4383 .tag = cpu_to_le16(UNI_EFUSE_FREE_BLOCK), 4384 .len = cpu_to_le16(sizeof(req) - 4), 4385 .version = 2, 4386 }; 4387 struct sk_buff *skb; 4388 int ret; 4389 4390 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(EFUSE_CTRL), &req, 4391 sizeof(req), true, &skb); 4392 if (ret) 4393 return ret; 4394 4395 *block_num = *(u8 *)(skb->data + 8); 4396 dev_kfree_skb(skb); 4397 4398 return 0; 4399 } 4400 4401 int mt7996_mcu_get_chip_config(struct mt7996_dev *dev, u32 *cap) 4402 { 4403 #define UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION 0x21 4404 struct { 4405 u8 _rsv[4]; 4406 4407 __le16 tag; 4408 __le16 len; 4409 } __packed req = { 4410 .tag = cpu_to_le16(UNI_CHIP_CONFIG_NIC_CAPA), 4411 .len = cpu_to_le16(sizeof(req) - 4), 4412 }; 4413 struct sk_buff *skb; 4414 u8 *buf; 4415 int ret; 4416 4417 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 4418 MCU_WM_UNI_CMD_QUERY(CHIP_CONFIG), &req, 4419 sizeof(req), true, &skb); 4420 if (ret) 4421 return ret; 4422 4423 /* fixed field */ 4424 skb_pull(skb, 4); 4425 4426 buf = skb->data; 4427 while (buf - skb->data < skb->len) { 4428 struct tlv *tlv = (struct tlv *)buf; 4429 4430 switch (le16_to_cpu(tlv->tag)) { 4431 case UNI_EVENT_CHIP_CONFIG_EFUSE_VERSION: 4432 *cap = le32_to_cpu(*(__le32 *)(buf + sizeof(*tlv))); 4433 break; 4434 default: 4435 break; 4436 } 4437 4438 buf += le16_to_cpu(tlv->len); 4439 } 4440 4441 dev_kfree_skb(skb); 4442 4443 return 0; 4444 } 4445 4446 int mt7996_mcu_get_chan_mib_info(struct mt7996_phy *phy, bool chan_switch) 4447 { 4448 enum { 4449 IDX_TX_TIME, 4450 IDX_RX_TIME, 4451 IDX_OBSS_AIRTIME, 4452 IDX_NON_WIFI_TIME, 4453 IDX_NUM 4454 }; 4455 struct { 4456 struct { 4457 u8 band; 4458 u8 __rsv[3]; 4459 } hdr; 4460 struct { 4461 __le16 tag; 4462 __le16 len; 4463 __le32 offs; 4464 } data[IDX_NUM]; 4465 } __packed req = { 4466 .hdr.band = phy->mt76->band_idx, 4467 }; 4468 static const u32 offs[] = { 4469 [IDX_TX_TIME] = UNI_MIB_TX_TIME, 4470 [IDX_RX_TIME] = UNI_MIB_RX_TIME, 4471 [IDX_OBSS_AIRTIME] = UNI_MIB_OBSS_AIRTIME, 4472 [IDX_NON_WIFI_TIME] = UNI_MIB_NON_WIFI_TIME, 4473 }; 4474 struct mt76_channel_state *state = phy->mt76->chan_state; 4475 struct mt76_channel_state *state_ts = &phy->state_ts; 4476 struct mt7996_dev *dev = phy->dev; 4477 struct mt7996_mcu_mib *res; 4478 struct sk_buff *skb; 4479 int i, ret; 4480 4481 for (i = 0; i < IDX_NUM; i++) { 4482 req.data[i].tag = cpu_to_le16(UNI_CMD_MIB_DATA); 4483 req.data[i].len = cpu_to_le16(sizeof(req.data[i])); 4484 req.data[i].offs = cpu_to_le32(offs[i]); 4485 } 4486 4487 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WM_UNI_CMD_QUERY(GET_MIB_INFO), 4488 &req, sizeof(req), true, &skb); 4489 if (ret) 4490 return ret; 4491 4492 skb_pull(skb, sizeof(req.hdr)); 4493 4494 res = (struct mt7996_mcu_mib *)(skb->data); 4495 4496 if (chan_switch) 4497 goto out; 4498 4499 #define __res_u64(s) le64_to_cpu(res[s].data) 4500 state->cc_tx += __res_u64(IDX_TX_TIME) - state_ts->cc_tx; 4501 state->cc_bss_rx += __res_u64(IDX_RX_TIME) - state_ts->cc_bss_rx; 4502 state->cc_rx += __res_u64(IDX_RX_TIME) + 4503 __res_u64(IDX_OBSS_AIRTIME) - 4504 state_ts->cc_rx; 4505 state->cc_busy += __res_u64(IDX_TX_TIME) + 4506 __res_u64(IDX_RX_TIME) + 4507 __res_u64(IDX_OBSS_AIRTIME) + 4508 __res_u64(IDX_NON_WIFI_TIME) - 4509 state_ts->cc_busy; 4510 out: 4511 state_ts->cc_tx = __res_u64(IDX_TX_TIME); 4512 state_ts->cc_bss_rx = __res_u64(IDX_RX_TIME); 4513 state_ts->cc_rx = __res_u64(IDX_RX_TIME) + __res_u64(IDX_OBSS_AIRTIME); 4514 state_ts->cc_busy = __res_u64(IDX_TX_TIME) + 4515 __res_u64(IDX_RX_TIME) + 4516 __res_u64(IDX_OBSS_AIRTIME) + 4517 __res_u64(IDX_NON_WIFI_TIME); 4518 #undef __res_u64 4519 4520 dev_kfree_skb(skb); 4521 4522 return 0; 4523 } 4524 4525 int mt7996_mcu_get_temperature(struct mt7996_phy *phy) 4526 { 4527 #define TEMPERATURE_QUERY 0 4528 #define GET_TEMPERATURE 0 4529 struct { 4530 u8 _rsv[4]; 4531 4532 __le16 tag; 4533 __le16 len; 4534 4535 u8 rsv1; 4536 u8 action; 4537 u8 band_idx; 4538 u8 rsv2; 4539 } req = { 4540 .tag = cpu_to_le16(TEMPERATURE_QUERY), 4541 .len = cpu_to_le16(sizeof(req) - 4), 4542 .action = GET_TEMPERATURE, 4543 .band_idx = phy->mt76->band_idx, 4544 }; 4545 struct mt7996_mcu_thermal { 4546 u8 _rsv[4]; 4547 4548 __le16 tag; 4549 __le16 len; 4550 4551 __le32 rsv; 4552 __le32 temperature; 4553 } __packed * res; 4554 struct sk_buff *skb; 4555 int ret; 4556 u32 temp; 4557 4558 ret = mt76_mcu_send_and_get_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 4559 &req, sizeof(req), true, &skb); 4560 if (ret) 4561 return ret; 4562 4563 res = (void *)skb->data; 4564 temp = le32_to_cpu(res->temperature); 4565 dev_kfree_skb(skb); 4566 4567 return temp; 4568 } 4569 4570 int mt7996_mcu_set_thermal_throttling(struct mt7996_phy *phy, u8 state) 4571 { 4572 struct { 4573 u8 _rsv[4]; 4574 4575 __le16 tag; 4576 __le16 len; 4577 4578 struct mt7996_mcu_thermal_ctrl ctrl; 4579 } __packed req = { 4580 .tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_DUTY_CONFIG), 4581 .len = cpu_to_le16(sizeof(req) - 4), 4582 .ctrl = { 4583 .band_idx = phy->mt76->band_idx, 4584 }, 4585 }; 4586 int level, ret; 4587 4588 /* set duty cycle and level */ 4589 for (level = 0; level < 4; level++) { 4590 req.ctrl.duty.duty_level = level; 4591 req.ctrl.duty.duty_cycle = state; 4592 state /= 2; 4593 4594 ret = mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 4595 &req, sizeof(req), false); 4596 if (ret) 4597 return ret; 4598 } 4599 4600 return 0; 4601 } 4602 4603 int mt7996_mcu_set_thermal_protect(struct mt7996_phy *phy, bool enable) 4604 { 4605 #define SUSTAIN_PERIOD 10 4606 struct { 4607 u8 _rsv[4]; 4608 4609 __le16 tag; 4610 __le16 len; 4611 4612 struct mt7996_mcu_thermal_ctrl ctrl; 4613 struct mt7996_mcu_thermal_enable enable; 4614 } __packed req = { 4615 .len = cpu_to_le16(sizeof(req) - 4 - sizeof(req.enable)), 4616 .ctrl = { 4617 .band_idx = phy->mt76->band_idx, 4618 .type.protect_type = 1, 4619 .type.trigger_type = 1, 4620 }, 4621 }; 4622 int ret; 4623 4624 req.tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_DISABLE); 4625 4626 ret = mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 4627 &req, sizeof(req) - sizeof(req.enable), false); 4628 if (ret || !enable) 4629 return ret; 4630 4631 /* set high-temperature trigger threshold */ 4632 req.tag = cpu_to_le16(UNI_CMD_THERMAL_PROTECT_ENABLE); 4633 req.enable.restore_temp = cpu_to_le32(phy->throttle_temp[0]); 4634 req.enable.trigger_temp = cpu_to_le32(phy->throttle_temp[1]); 4635 req.enable.sustain_time = cpu_to_le16(SUSTAIN_PERIOD); 4636 4637 req.len = cpu_to_le16(sizeof(req) - 4); 4638 4639 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(THERMAL), 4640 &req, sizeof(req), false); 4641 } 4642 4643 int mt7996_mcu_set_ser(struct mt7996_dev *dev, u8 action, u8 val, u8 band) 4644 { 4645 struct { 4646 u8 rsv[4]; 4647 4648 __le16 tag; 4649 __le16 len; 4650 4651 union { 4652 struct { 4653 __le32 mask; 4654 } __packed set; 4655 4656 struct { 4657 u8 method; 4658 u8 band; 4659 u8 rsv2[2]; 4660 } __packed trigger; 4661 }; 4662 } __packed req = { 4663 .tag = cpu_to_le16(action), 4664 .len = cpu_to_le16(sizeof(req) - 4), 4665 }; 4666 4667 switch (action) { 4668 case UNI_CMD_SER_SET: 4669 req.set.mask = cpu_to_le32(val); 4670 break; 4671 case UNI_CMD_SER_TRIGGER: 4672 req.trigger.method = val; 4673 req.trigger.band = band; 4674 break; 4675 default: 4676 return -EINVAL; 4677 } 4678 4679 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SER), 4680 &req, sizeof(req), false); 4681 } 4682 4683 int mt7996_mcu_set_txbf(struct mt7996_dev *dev, u8 action) 4684 { 4685 #define MT7996_BF_MAX_SIZE sizeof(union bf_tag_tlv) 4686 #define BF_PROCESSING 4 4687 struct uni_header hdr; 4688 struct sk_buff *skb; 4689 struct tlv *tlv; 4690 int len = sizeof(hdr) + MT7996_BF_MAX_SIZE; 4691 4692 memset(&hdr, 0, sizeof(hdr)); 4693 4694 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); 4695 if (!skb) 4696 return -ENOMEM; 4697 4698 skb_put_data(skb, &hdr, sizeof(hdr)); 4699 4700 switch (action) { 4701 case BF_SOUNDING_ON: { 4702 struct bf_sounding_on *req_snd_on; 4703 4704 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_snd_on)); 4705 req_snd_on = (struct bf_sounding_on *)tlv; 4706 req_snd_on->snd_mode = BF_PROCESSING; 4707 break; 4708 } 4709 case BF_HW_EN_UPDATE: { 4710 struct bf_hw_en_status_update *req_hw_en; 4711 4712 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_hw_en)); 4713 req_hw_en = (struct bf_hw_en_status_update *)tlv; 4714 req_hw_en->ebf = true; 4715 req_hw_en->ibf = dev->ibf; 4716 break; 4717 } 4718 case BF_MOD_EN_CTRL: { 4719 struct bf_mod_en_ctrl *req_mod_en; 4720 4721 tlv = mt7996_mcu_add_uni_tlv(skb, action, sizeof(*req_mod_en)); 4722 req_mod_en = (struct bf_mod_en_ctrl *)tlv; 4723 req_mod_en->bf_num = mt7996_band_valid(dev, MT_BAND2) ? 3 : 2; 4724 req_mod_en->bf_bitmap = mt7996_band_valid(dev, MT_BAND2) ? 4725 GENMASK(2, 0) : GENMASK(1, 0); 4726 break; 4727 } 4728 default: 4729 return -EINVAL; 4730 } 4731 4732 return mt76_mcu_skb_send_msg(&dev->mt76, skb, MCU_WM_UNI_CMD(BF), true); 4733 } 4734 4735 static int 4736 mt7996_mcu_enable_obss_spr(struct mt7996_phy *phy, u16 action, u8 val) 4737 { 4738 struct mt7996_dev *dev = phy->dev; 4739 struct { 4740 u8 band_idx; 4741 u8 __rsv[3]; 4742 4743 __le16 tag; 4744 __le16 len; 4745 4746 __le32 val; 4747 } __packed req = { 4748 .band_idx = phy->mt76->band_idx, 4749 .tag = cpu_to_le16(action), 4750 .len = cpu_to_le16(sizeof(req) - 4), 4751 .val = cpu_to_le32(val), 4752 }; 4753 4754 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 4755 &req, sizeof(req), true); 4756 } 4757 4758 static int 4759 mt7996_mcu_set_obss_spr_pd(struct mt7996_phy *phy, 4760 struct ieee80211_he_obss_pd *he_obss_pd) 4761 { 4762 struct mt7996_dev *dev = phy->dev; 4763 u8 max_th = 82, non_srg_max_th = 62; 4764 struct { 4765 u8 band_idx; 4766 u8 __rsv[3]; 4767 4768 __le16 tag; 4769 __le16 len; 4770 4771 u8 pd_th_non_srg; 4772 u8 pd_th_srg; 4773 u8 period_offs; 4774 u8 rcpi_src; 4775 __le16 obss_pd_min; 4776 __le16 obss_pd_min_srg; 4777 u8 resp_txpwr_mode; 4778 u8 txpwr_restrict_mode; 4779 u8 txpwr_ref; 4780 u8 __rsv2[3]; 4781 } __packed req = { 4782 .band_idx = phy->mt76->band_idx, 4783 .tag = cpu_to_le16(UNI_CMD_SR_SET_PARAM), 4784 .len = cpu_to_le16(sizeof(req) - 4), 4785 .obss_pd_min = cpu_to_le16(max_th), 4786 .obss_pd_min_srg = cpu_to_le16(max_th), 4787 .txpwr_restrict_mode = 2, 4788 .txpwr_ref = 21 4789 }; 4790 int ret; 4791 4792 /* disable firmware dynamical PD asjustment */ 4793 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_DPD, false); 4794 if (ret) 4795 return ret; 4796 4797 if (he_obss_pd->sr_ctrl & 4798 IEEE80211_HE_SPR_NON_SRG_OBSS_PD_SR_DISALLOWED) 4799 req.pd_th_non_srg = max_th; 4800 else if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_NON_SRG_OFFSET_PRESENT) 4801 req.pd_th_non_srg = max_th - he_obss_pd->non_srg_max_offset; 4802 else 4803 req.pd_th_non_srg = non_srg_max_th; 4804 4805 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_SRG_INFORMATION_PRESENT) 4806 req.pd_th_srg = max_th - he_obss_pd->max_offset; 4807 4808 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 4809 &req, sizeof(req), true); 4810 } 4811 4812 static int 4813 mt7996_mcu_set_obss_spr_siga(struct mt7996_phy *phy, 4814 struct mt7996_vif_link *link, 4815 struct ieee80211_he_obss_pd *he_obss_pd) 4816 { 4817 struct mt7996_dev *dev = phy->dev; 4818 u8 omac = link->mt76.omac_idx; 4819 struct { 4820 u8 band_idx; 4821 u8 __rsv[3]; 4822 4823 __le16 tag; 4824 __le16 len; 4825 4826 u8 omac; 4827 u8 __rsv2[3]; 4828 u8 flag[20]; 4829 } __packed req = { 4830 .band_idx = phy->mt76->band_idx, 4831 .tag = cpu_to_le16(UNI_CMD_SR_SET_SIGA), 4832 .len = cpu_to_le16(sizeof(req) - 4), 4833 .omac = omac > HW_BSSID_MAX ? omac - 12 : omac, 4834 }; 4835 int ret; 4836 4837 if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_HESIGA_SR_VAL15_ALLOWED) 4838 req.flag[req.omac] = 0xf; 4839 else 4840 return 0; 4841 4842 /* switch to normal AP mode */ 4843 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_MODE, 0); 4844 if (ret) 4845 return ret; 4846 4847 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), 4848 &req, sizeof(req), true); 4849 } 4850 4851 static int 4852 mt7996_mcu_set_obss_spr_bitmap(struct mt7996_phy *phy, 4853 struct ieee80211_he_obss_pd *he_obss_pd) 4854 { 4855 struct mt7996_dev *dev = phy->dev; 4856 struct { 4857 u8 band_idx; 4858 u8 __rsv[3]; 4859 4860 __le16 tag; 4861 __le16 len; 4862 4863 __le32 color_l[2]; 4864 __le32 color_h[2]; 4865 __le32 bssid_l[2]; 4866 __le32 bssid_h[2]; 4867 } __packed req = { 4868 .band_idx = phy->mt76->band_idx, 4869 .tag = cpu_to_le16(UNI_CMD_SR_SET_SRG_BITMAP), 4870 .len = cpu_to_le16(sizeof(req) - 4), 4871 }; 4872 u32 bitmap; 4873 4874 memcpy(&bitmap, he_obss_pd->bss_color_bitmap, sizeof(bitmap)); 4875 req.color_l[req.band_idx] = cpu_to_le32(bitmap); 4876 4877 memcpy(&bitmap, he_obss_pd->bss_color_bitmap + 4, sizeof(bitmap)); 4878 req.color_h[req.band_idx] = cpu_to_le32(bitmap); 4879 4880 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap, sizeof(bitmap)); 4881 req.bssid_l[req.band_idx] = cpu_to_le32(bitmap); 4882 4883 memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap + 4, sizeof(bitmap)); 4884 req.bssid_h[req.band_idx] = cpu_to_le32(bitmap); 4885 4886 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SR), &req, 4887 sizeof(req), true); 4888 } 4889 4890 int mt7996_mcu_add_obss_spr(struct mt7996_phy *phy, 4891 struct mt7996_vif_link *link, 4892 struct ieee80211_he_obss_pd *he_obss_pd) 4893 { 4894 int ret; 4895 4896 /* enable firmware scene detection algorithms */ 4897 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_SD, 4898 sr_scene_detect); 4899 if (ret) 4900 return ret; 4901 4902 /* firmware dynamically adjusts PD threshold so skip manual control */ 4903 if (sr_scene_detect && !he_obss_pd->enable) 4904 return 0; 4905 4906 /* enable spatial reuse */ 4907 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE, 4908 he_obss_pd->enable); 4909 if (ret) 4910 return ret; 4911 4912 if (sr_scene_detect || !he_obss_pd->enable) 4913 return 0; 4914 4915 ret = mt7996_mcu_enable_obss_spr(phy, UNI_CMD_SR_ENABLE_TX, true); 4916 if (ret) 4917 return ret; 4918 4919 /* set SRG/non-SRG OBSS PD threshold */ 4920 ret = mt7996_mcu_set_obss_spr_pd(phy, he_obss_pd); 4921 if (ret) 4922 return ret; 4923 4924 /* Set SR prohibit */ 4925 ret = mt7996_mcu_set_obss_spr_siga(phy, link, he_obss_pd); 4926 if (ret) 4927 return ret; 4928 4929 /* set SRG BSS color/BSSID bitmap */ 4930 return mt7996_mcu_set_obss_spr_bitmap(phy, he_obss_pd); 4931 } 4932 4933 int mt7996_mcu_update_bss_color(struct mt7996_dev *dev, 4934 struct mt76_vif_link *mlink, 4935 struct cfg80211_he_bss_color *he_bss_color) 4936 { 4937 int len = sizeof(struct bss_req_hdr) + sizeof(struct bss_color_tlv); 4938 struct bss_color_tlv *bss_color; 4939 struct sk_buff *skb; 4940 struct tlv *tlv; 4941 4942 skb = __mt7996_mcu_alloc_bss_req(&dev->mt76, mlink, len); 4943 if (IS_ERR(skb)) 4944 return PTR_ERR(skb); 4945 4946 tlv = mt76_connac_mcu_add_tlv(skb, UNI_BSS_INFO_BSS_COLOR, 4947 sizeof(*bss_color)); 4948 bss_color = (struct bss_color_tlv *)tlv; 4949 bss_color->enable = he_bss_color->enabled; 4950 bss_color->color = he_bss_color->color; 4951 4952 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 4953 MCU_WMWA_UNI_CMD(BSS_INFO_UPDATE), true); 4954 } 4955 4956 #define TWT_AGRT_TRIGGER BIT(0) 4957 #define TWT_AGRT_ANNOUNCE BIT(1) 4958 #define TWT_AGRT_PROTECT BIT(2) 4959 4960 int mt7996_mcu_twt_agrt_update(struct mt7996_dev *dev, 4961 struct mt7996_vif_link *link, 4962 struct mt7996_twt_flow *flow, 4963 int cmd) 4964 { 4965 struct { 4966 /* fixed field */ 4967 u8 bss; 4968 u8 _rsv[3]; 4969 4970 __le16 tag; 4971 __le16 len; 4972 u8 tbl_idx; 4973 u8 cmd; 4974 u8 own_mac_idx; 4975 u8 flowid; /* 0xff for group id */ 4976 __le16 peer_id; /* specify the peer_id (msb=0) 4977 * or group_id (msb=1) 4978 */ 4979 u8 duration; /* 256 us */ 4980 u8 bss_idx; 4981 __le64 start_tsf; 4982 __le16 mantissa; 4983 u8 exponent; 4984 u8 is_ap; 4985 u8 agrt_params; 4986 u8 __rsv2[23]; 4987 } __packed req = { 4988 .tag = cpu_to_le16(UNI_CMD_TWT_ARGT_UPDATE), 4989 .len = cpu_to_le16(sizeof(req) - 4), 4990 .tbl_idx = flow->table_id, 4991 .cmd = cmd, 4992 .own_mac_idx = link->mt76.omac_idx, 4993 .flowid = flow->id, 4994 .peer_id = cpu_to_le16(flow->wcid), 4995 .duration = flow->duration, 4996 .bss = link->mt76.idx, 4997 .bss_idx = link->mt76.idx, 4998 .start_tsf = cpu_to_le64(flow->tsf), 4999 .mantissa = flow->mantissa, 5000 .exponent = flow->exp, 5001 .is_ap = true, 5002 }; 5003 5004 if (flow->protection) 5005 req.agrt_params |= TWT_AGRT_PROTECT; 5006 if (!flow->flowtype) 5007 req.agrt_params |= TWT_AGRT_ANNOUNCE; 5008 if (flow->trigger) 5009 req.agrt_params |= TWT_AGRT_TRIGGER; 5010 5011 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(TWT), 5012 &req, sizeof(req), true); 5013 } 5014 5015 int mt7996_mcu_set_rts_thresh(struct mt7996_phy *phy, u32 val) 5016 { 5017 struct { 5018 u8 band_idx; 5019 u8 _rsv[3]; 5020 5021 __le16 tag; 5022 __le16 len; 5023 __le32 len_thresh; 5024 __le32 pkt_thresh; 5025 } __packed req = { 5026 .band_idx = phy->mt76->band_idx, 5027 .tag = cpu_to_le16(UNI_BAND_CONFIG_RTS_THRESHOLD), 5028 .len = cpu_to_le16(sizeof(req) - 4), 5029 .len_thresh = cpu_to_le32(val), 5030 .pkt_thresh = cpu_to_le32(0x2), 5031 }; 5032 5033 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), 5034 &req, sizeof(req), true); 5035 } 5036 5037 int mt7996_mcu_set_radio_en(struct mt7996_phy *phy, bool enable) 5038 { 5039 struct { 5040 u8 band_idx; 5041 u8 _rsv[3]; 5042 5043 __le16 tag; 5044 __le16 len; 5045 u8 enable; 5046 u8 _rsv2[3]; 5047 } __packed req = { 5048 .band_idx = phy->mt76->band_idx, 5049 .tag = cpu_to_le16(UNI_BAND_CONFIG_RADIO_ENABLE), 5050 .len = cpu_to_le16(sizeof(req) - 4), 5051 .enable = enable, 5052 }; 5053 5054 return mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), 5055 &req, sizeof(req), true); 5056 } 5057 5058 int mt7996_mcu_rdd_resume_tx(struct mt7996_phy *phy) 5059 { 5060 struct { 5061 u8 band_idx; 5062 u8 _rsv[3]; 5063 5064 __le16 tag; 5065 __le16 len; 5066 u8 mac_enable; 5067 u8 _rsv2[3]; 5068 } __packed req = { 5069 .band_idx = phy->mt76->band_idx, 5070 .tag = cpu_to_le16(UNI_BAND_CONFIG_MAC_ENABLE_CTRL), 5071 .len = cpu_to_le16(sizeof(req) - 4), 5072 .mac_enable = 2, 5073 }; 5074 int ret; 5075 5076 if (!phy->rdd_tx_paused) 5077 return 0; 5078 5079 ret = mt76_mcu_send_msg(&phy->dev->mt76, MCU_WM_UNI_CMD(BAND_CONFIG), 5080 &req, sizeof(req), true); 5081 if (!ret) 5082 phy->rdd_tx_paused = false; 5083 5084 return ret; 5085 } 5086 5087 int mt7996_mcu_rdd_cmd(struct mt7996_dev *dev, int cmd, u8 rdd_idx, u8 val) 5088 { 5089 struct { 5090 u8 _rsv[4]; 5091 5092 __le16 tag; 5093 __le16 len; 5094 5095 u8 ctrl; 5096 u8 rdd_idx; 5097 u8 rdd_rx_sel; 5098 u8 val; 5099 u8 rsv[4]; 5100 } __packed req = { 5101 .tag = cpu_to_le16(UNI_RDD_CTRL_PARM), 5102 .len = cpu_to_le16(sizeof(req) - 4), 5103 .ctrl = cmd, 5104 .rdd_idx = rdd_idx, 5105 .val = val, 5106 }; 5107 5108 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RDD_CTRL), 5109 &req, sizeof(req), true); 5110 } 5111 5112 int mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev *dev, 5113 struct ieee80211_vif *vif, 5114 struct mt7996_vif_link *link, 5115 struct mt7996_sta_link *msta_link) 5116 { 5117 struct sk_buff *skb; 5118 5119 skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &link->mt76, 5120 &msta_link->wcid, 5121 MT7996_STA_UPDATE_MAX_SIZE); 5122 if (IS_ERR(skb)) 5123 return PTR_ERR(skb); 5124 5125 /* starec hdr trans */ 5126 mt7996_mcu_sta_hdr_trans_tlv(dev, skb, vif, &msta_link->wcid); 5127 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 5128 MCU_WMWA_UNI_CMD(STA_REC_UPDATE), true); 5129 } 5130 5131 int mt7996_mcu_set_fixed_rate_table(struct mt7996_phy *phy, u8 table_idx, 5132 u16 rate_idx, bool beacon) 5133 { 5134 #define UNI_FIXED_RATE_TABLE_SET 0 5135 #define SPE_IXD_SELECT_TXD 0 5136 #define SPE_IXD_SELECT_BMC_WTBL 1 5137 struct mt7996_dev *dev = phy->dev; 5138 struct fixed_rate_table_ctrl req = { 5139 .tag = cpu_to_le16(UNI_FIXED_RATE_TABLE_SET), 5140 .len = cpu_to_le16(sizeof(req) - 4), 5141 .table_idx = table_idx, 5142 .rate_idx = cpu_to_le16(rate_idx), 5143 .gi = 1, 5144 .he_ltf = 1, 5145 }; 5146 u8 band_idx = phy->mt76->band_idx; 5147 5148 if (beacon) { 5149 req.spe_idx_sel = SPE_IXD_SELECT_TXD; 5150 req.spe_idx = 24 + band_idx; 5151 phy->beacon_rate = rate_idx; 5152 } else { 5153 req.spe_idx_sel = SPE_IXD_SELECT_BMC_WTBL; 5154 } 5155 5156 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(FIXED_RATE_TABLE), 5157 &req, sizeof(req), false); 5158 } 5159 5160 int mt7996_mcu_rf_regval(struct mt7996_dev *dev, u32 regidx, u32 *val, bool set) 5161 { 5162 struct { 5163 u8 __rsv1[4]; 5164 5165 __le16 tag; 5166 __le16 len; 5167 __le16 idx; 5168 u8 __rsv2[2]; 5169 __le32 ofs; 5170 __le32 data; 5171 } __packed *res, req = { 5172 .tag = cpu_to_le16(UNI_CMD_ACCESS_RF_REG_BASIC), 5173 .len = cpu_to_le16(sizeof(req) - 4), 5174 5175 .idx = cpu_to_le16(u32_get_bits(regidx, GENMASK(31, 24))), 5176 .ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))), 5177 .data = set ? cpu_to_le32(*val) : 0, 5178 }; 5179 struct sk_buff *skb; 5180 int ret; 5181 5182 if (set) 5183 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(REG_ACCESS), 5184 &req, sizeof(req), true); 5185 5186 ret = mt76_mcu_send_and_get_msg(&dev->mt76, 5187 MCU_WM_UNI_CMD_QUERY(REG_ACCESS), 5188 &req, sizeof(req), true, &skb); 5189 if (ret) 5190 return ret; 5191 5192 res = (void *)skb->data; 5193 *val = le32_to_cpu(res->data); 5194 dev_kfree_skb(skb); 5195 5196 return 0; 5197 } 5198 5199 int mt7996_mcu_trigger_assert(struct mt7996_dev *dev) 5200 { 5201 struct { 5202 __le16 tag; 5203 __le16 len; 5204 u8 enable; 5205 u8 rsv[3]; 5206 } __packed req = { 5207 .len = cpu_to_le16(sizeof(req) - 4), 5208 .enable = true, 5209 }; 5210 5211 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ASSERT_DUMP), 5212 &req, sizeof(req), false); 5213 } 5214 5215 int mt7996_mcu_set_rro(struct mt7996_dev *dev, u16 tag, u16 val) 5216 { 5217 struct { 5218 u8 __rsv1[4]; 5219 __le16 tag; 5220 __le16 len; 5221 union { 5222 struct { 5223 u8 type; 5224 u8 __rsv2[3]; 5225 } __packed platform_type; 5226 struct { 5227 u8 type; 5228 u8 dest; 5229 u8 __rsv2[2]; 5230 } __packed bypass_mode; 5231 struct { 5232 u8 path; 5233 u8 __rsv2[3]; 5234 } __packed txfree_path; 5235 struct { 5236 __le16 flush_one; 5237 __le16 flush_all; 5238 u8 __rsv2[4]; 5239 } __packed timeout; 5240 }; 5241 } __packed req = { 5242 .tag = cpu_to_le16(tag), 5243 .len = cpu_to_le16(sizeof(req) - 4), 5244 }; 5245 5246 switch (tag) { 5247 case UNI_RRO_SET_PLATFORM_TYPE: 5248 req.platform_type.type = val; 5249 break; 5250 case UNI_RRO_SET_BYPASS_MODE: 5251 req.bypass_mode.type = val; 5252 break; 5253 case UNI_RRO_SET_TXFREE_PATH: 5254 req.txfree_path.path = val; 5255 break; 5256 case UNI_RRO_SET_FLUSH_TIMEOUT: 5257 req.timeout.flush_one = cpu_to_le16(val); 5258 req.timeout.flush_all = cpu_to_le16(2 * val); 5259 break; 5260 default: 5261 return -EINVAL; 5262 } 5263 5264 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req, 5265 sizeof(req), true); 5266 } 5267 5268 int mt7996_mcu_get_all_sta_info(struct mt7996_phy *phy, u16 tag) 5269 { 5270 struct mt7996_dev *dev = phy->dev; 5271 struct { 5272 u8 _rsv[4]; 5273 5274 __le16 tag; 5275 __le16 len; 5276 } __packed req = { 5277 .tag = cpu_to_le16(tag), 5278 .len = cpu_to_le16(sizeof(req) - 4), 5279 }; 5280 5281 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(ALL_STA_INFO), 5282 &req, sizeof(req), false); 5283 } 5284 5285 int mt7996_mcu_wed_rro_reset_sessions(struct mt7996_dev *dev, u16 id) 5286 { 5287 struct { 5288 u8 __rsv[4]; 5289 5290 __le16 tag; 5291 __le16 len; 5292 __le16 session_id; 5293 u8 pad[4]; 5294 } __packed req = { 5295 .tag = cpu_to_le16(UNI_RRO_DEL_BA_SESSION), 5296 .len = cpu_to_le16(sizeof(req) - 4), 5297 .session_id = cpu_to_le16(id), 5298 }; 5299 5300 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(RRO), &req, 5301 sizeof(req), true); 5302 } 5303 5304 int mt7996_mcu_set_sniffer_mode(struct mt7996_phy *phy, bool enabled) 5305 { 5306 struct mt7996_dev *dev = phy->dev; 5307 struct { 5308 u8 band_idx; 5309 u8 _rsv[3]; 5310 __le16 tag; 5311 __le16 len; 5312 u8 enable; 5313 u8 _pad[3]; 5314 } __packed req = { 5315 .band_idx = phy->mt76->band_idx, 5316 .tag = 0, 5317 .len = cpu_to_le16(sizeof(req) - 4), 5318 .enable = enabled, 5319 }; 5320 5321 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(SNIFFER), &req, 5322 sizeof(req), true); 5323 } 5324 5325 int mt7996_mcu_set_txpower_sku(struct mt7996_phy *phy) 5326 { 5327 #define TX_POWER_LIMIT_TABLE_RATE 0 5328 struct mt7996_dev *dev = phy->dev; 5329 struct mt76_phy *mphy = phy->mt76; 5330 struct tx_power_limit_table_ctrl { 5331 u8 __rsv1[4]; 5332 5333 __le16 tag; 5334 __le16 len; 5335 u8 power_ctrl_id; 5336 u8 power_limit_type; 5337 u8 band_idx; 5338 } __packed req = { 5339 .tag = cpu_to_le16(UNI_TXPOWER_POWER_LIMIT_TABLE_CTRL), 5340 .len = cpu_to_le16(sizeof(req) + MT7996_SKU_PATH_NUM - 4), 5341 .power_ctrl_id = UNI_TXPOWER_POWER_LIMIT_TABLE_CTRL, 5342 .power_limit_type = TX_POWER_LIMIT_TABLE_RATE, 5343 .band_idx = phy->mt76->band_idx, 5344 }; 5345 struct mt76_power_limits la = {}; 5346 struct sk_buff *skb; 5347 int i, tx_power; 5348 5349 tx_power = mt76_get_power_bound(mphy, phy->txpower); 5350 tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan, 5351 &la, tx_power); 5352 mphy->txpower_cur = tx_power; 5353 5354 skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, 5355 sizeof(req) + MT7996_SKU_PATH_NUM); 5356 if (!skb) 5357 return -ENOMEM; 5358 5359 skb_put_data(skb, &req, sizeof(req)); 5360 /* cck and ofdm */ 5361 skb_put_data(skb, &la.cck, sizeof(la.cck)); 5362 skb_put_data(skb, &la.ofdm, sizeof(la.ofdm)); 5363 /* ht20 */ 5364 skb_put_data(skb, &la.mcs[0], 8); 5365 /* ht40 */ 5366 skb_put_data(skb, &la.mcs[1], 9); 5367 5368 /* vht */ 5369 for (i = 0; i < 4; i++) { 5370 skb_put_data(skb, &la.mcs[i], sizeof(la.mcs[i])); 5371 skb_put_zero(skb, 2); /* padding */ 5372 } 5373 5374 /* he */ 5375 skb_put_data(skb, &la.ru[0], sizeof(la.ru)); 5376 /* eht */ 5377 skb_put_data(skb, &la.eht[0], sizeof(la.eht)); 5378 5379 /* padding */ 5380 skb_put_zero(skb, MT7996_SKU_PATH_NUM - MT7996_SKU_RATE_NUM); 5381 5382 return mt76_mcu_skb_send_msg(&dev->mt76, skb, 5383 MCU_WM_UNI_CMD(TXPOWER), true); 5384 } 5385 5386 int mt7996_mcu_cp_support(struct mt7996_dev *dev, u8 mode) 5387 { 5388 __le32 cp_mode; 5389 5390 if (mode < mt76_connac_lmac_mapping(IEEE80211_AC_BE) || 5391 mode > mt76_connac_lmac_mapping(IEEE80211_AC_VO)) 5392 return -EINVAL; 5393 5394 if (!mt7996_has_wa(dev)) { 5395 struct { 5396 u8 _rsv[4]; 5397 5398 __le16 tag; 5399 __le16 len; 5400 u8 cp_mode; 5401 u8 rsv[3]; 5402 } __packed req = { 5403 .tag = cpu_to_le16(UNI_CMD_SDO_CP_MODE), 5404 .len = cpu_to_le16(sizeof(req) - 4), 5405 .cp_mode = mode, 5406 }; 5407 5408 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_UNI_CMD(SDO), 5409 &req, sizeof(req), false); 5410 } 5411 5412 cp_mode = cpu_to_le32(mode); 5413 5414 return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(CP_SUPPORT), 5415 &cp_mode, sizeof(cp_mode), true); 5416 } 5417 5418 int mt7996_mcu_set_dup_wtbl(struct mt7996_dev *dev) 5419 { 5420 #define DUP_WTBL_NUM 80 5421 struct { 5422 u8 _rsv[4]; 5423 5424 __le16 tag; 5425 __le16 len; 5426 __le16 base; 5427 __le16 num; 5428 u8 _rsv2[4]; 5429 } __packed req = { 5430 .tag = cpu_to_le16(UNI_CHIP_CONFIG_DUP_WTBL), 5431 .len = cpu_to_le16(sizeof(req) - 4), 5432 .base = cpu_to_le16(MT7996_WTBL_STA - DUP_WTBL_NUM + 1), 5433 .num = cpu_to_le16(DUP_WTBL_NUM), 5434 }; 5435 5436 return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(CHIP_CONFIG), &req, 5437 sizeof(req), true); 5438 } 5439