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Searched refs:mclk_mask (Results 1 – 6 of 6) sorted by relevance

/linux/sound/hda/core/
H A Dintel-nhlt.c176 int mclk_mask = 0; in intel_nhlt_ssp_mclk_mask() local
223 mclk_mask |= blob[mdivc_offset] & GENMASK(1, 0); in intel_nhlt_ssp_mclk_mask()
232 if (hweight_long(mclk_mask) != 1) in intel_nhlt_ssp_mclk_mask()
235 return mclk_mask; in intel_nhlt_ssp_mclk_mask()
/linux/sound/soc/sof/intel/
H A Dhda.c1668 int mclk_mask = check_nhlt_ssp_mclk_mask(sdev, in hda_machine_select()
1671 if (mclk_mask < 0) { in hda_machine_select()
1678 if (mclk_mask) { in hda_machine_select()
1680 sdev->mclk_id_quirk = (mclk_mask & BIT(0)) ? 0 : 1; in hda_machine_select()
1683 ssp_num, sdev->mclk_id_quirk, mclk_mask); in hda_machine_select()
1667 int mclk_mask = check_nhlt_ssp_mclk_mask(sdev, hda_machine_select() local
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega12_hwmgr.c1728 uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) in vega12_get_profiling_clk_mask() argument
1736 *mclk_mask = 0; in vega12_get_profiling_clk_mask()
1743 *mclk_mask = VEGA12_UMD_PSTATE_MCLK_LEVEL; in vega12_get_profiling_clk_mask()
1750 *mclk_mask = 0; in vega12_get_profiling_clk_mask()
1753 *mclk_mask = mem_dpm_table->count - 1; in vega12_get_profiling_clk_mask()
1783 uint32_t mclk_mask = 0; in vega12_dpm_force_dpm_level() local
1800 ret = vega12_get_profiling_clk_mask(hwmgr, level, &sclk_mask, &mclk_mask, &soc_mask); in vega12_dpm_force_dpm_level()
1804 vega12_force_clock_level(hwmgr, PP_MCLK, 1 << mclk_mask); in vega12_dpm_force_dpm_level()
H A Dvega20_hwmgr.c2534 uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) in vega20_get_profiling_clk_mask() argument
2542 *mclk_mask = 0; in vega20_get_profiling_clk_mask()
2549 *mclk_mask = VEGA20_UMD_PSTATE_MCLK_LEVEL; in vega20_get_profiling_clk_mask()
2556 *mclk_mask = 0; in vega20_get_profiling_clk_mask()
2559 *mclk_mask = mem_dpm_table->count - 1; in vega20_get_profiling_clk_mask()
2734 uint32_t sclk_mask, mclk_mask, soc_mask; in vega20_dpm_force_dpm_level() local
2753 ret = vega20_get_profiling_clk_mask(hwmgr, level, &sclk_mask, &mclk_mask, &soc_mask); in vega20_dpm_force_dpm_level()
2757 vega20_force_clock_level(hwmgr, PP_MCLK, 1 << mclk_mask); in vega20_dpm_force_dpm_level()
H A Dsmu7_hwmgr.c3260 uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *pcie_mask) in smu7_get_profiling_clk() argument
3278 *mclk_mask = golden_dpm_table->mclk_table.count - 1; in smu7_get_profiling_clk()
3281 *mclk_mask = golden_dpm_table->mclk_table.count - 2; in smu7_get_profiling_clk()
3317 *mclk_mask = 0; in smu7_get_profiling_clk()
3319 *mclk_mask = golden_dpm_table->mclk_table.count - 1; in smu7_get_profiling_clk()
3331 uint32_t mclk_mask = 0; in smu7_force_dpm_level() local
3348 ret = smu7_get_profiling_clk(hwmgr, level, &sclk_mask, &mclk_mask, &pcie_mask); in smu7_force_dpm_level()
3352 smu7_force_clock_level(hwmgr, PP_MCLK, 1<<mclk_mask); in smu7_force_dpm_level()
H A Dvega10_hwmgr.c4219 uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) in vega10_get_profiling_clk_mask() argument
4229 *mclk_mask = VEGA10_UMD_PSTATE_MCLK_LEVEL; in vega10_get_profiling_clk_mask()
4235 *mclk_mask = 0; in vega10_get_profiling_clk_mask()
4245 *mclk_mask = table_info->vdd_dep_on_mclk->count - 1; in vega10_get_profiling_clk_mask()
4337 uint32_t mclk_mask = 0; in vega10_dpm_force_dpm_level() local
4354 ret = vega10_get_profiling_clk_mask(hwmgr, level, &sclk_mask, &mclk_mask, &soc_mask); in vega10_dpm_force_dpm_level()
4358 vega10_force_clock_level(hwmgr, PP_MCLK, 1<<mclk_mask); in vega10_dpm_force_dpm_level()