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Searched refs:mclk_edc_wr_enable_threshold (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dcypress_dpm.h82 u32 mclk_edc_wr_enable_threshold; member
H A Dci_dpm.h212 u32 mclk_edc_wr_enable_threshold; member
H A Dni_dpm.c2343 if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold) in ni_convert_power_level_to_smc()
4132 eg_pi->mclk_edc_wr_enable_threshold = 55000; in ni_dpm_init()
4136 eg_pi->mclk_edc_wr_enable_threshold = 40000; in ni_dpm_init()
4138 ni_pi->mclk_rtt_mode_threshold = eg_pi->mclk_edc_wr_enable_threshold; in ni_dpm_init()
H A Dcypress_dpm.c713 if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold) in cypress_convert_power_level_to_smc()
2067 eg_pi->mclk_edc_wr_enable_threshold = 40000; in cypress_dpm_init()
H A Dbtc_dpm.c2586 eg_pi->mclk_edc_wr_enable_threshold = 40000; in btc_dpm_init()
H A Dci_dpm.c2903 if (pi->mclk_edc_wr_enable_threshold && in ci_populate_single_memory_level()
2904 (memory_clock > pi->mclk_edc_wr_enable_threshold)) in ci_populate_single_memory_level()
5740 pi->mclk_edc_wr_enable_threshold = 40000; in ci_dpm_init()
H A Dsi_dpm.c4953 if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold) in si_convert_power_level_to_smc()
6934 eg_pi->mclk_edc_wr_enable_threshold = 40000; in si_dpm_init()
6936 ni_pi->mclk_rtt_mode_threshold = eg_pi->mclk_edc_wr_enable_threshold; in si_dpm_init()
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.h673 u32 mclk_edc_wr_enable_threshold; member
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Diceland_smumgr.c1236 uint32_t mclk_edc_wr_enable_threshold = 40000; in iceland_populate_single_memory_level() local
1301 if ((mclk_edc_wr_enable_threshold != 0) && in iceland_populate_single_memory_level()
1302 (memory_clock > mclk_edc_wr_enable_threshold)) { in iceland_populate_single_memory_level()
H A Dci_smumgr.c1183 uint32_t mclk_edc_wr_enable_threshold = 40000; in ci_populate_single_memory_level() local
1255 if ((mclk_edc_wr_enable_threshold != 0) && in ci_populate_single_memory_level()
1256 (memory_clock > mclk_edc_wr_enable_threshold)) { in ci_populate_single_memory_level()
H A Dtonga_smumgr.c968 uint32_t mclk_edc_wr_enable_threshold = 40000; in tonga_populate_single_memory_level() local
1041 if ((mclk_edc_wr_enable_threshold != 0) && in tonga_populate_single_memory_level()
1042 (memory_clock > mclk_edc_wr_enable_threshold)) { in tonga_populate_single_memory_level()