Searched refs:max_uclk_mhz (Results 1 – 3 of 3) sorted by relevance
569 max_dtbclk_mhz = 0, max_fclk_mhz = 0, max_uclk_mhz = 0, max_socclk_mhz = 0; in dml2_init_soc_states() local578 if (p->in_states->state_array[i].dram_speed_mts > max_uclk_mhz) in dml2_init_soc_states()579 max_uclk_mhz = (int)p->in_states->state_array[i].dram_speed_mts; in dml2_init_soc_states()
2637 max_phyclk_mhz = 0, max_dtbclk_mhz = 0, max_fclk_mhz = 0, max_uclk_mhz = 0; in dcn32_patch_dpm_table() local2644 if (bw_params->clk_table.entries[i].memclk_mhz > max_uclk_mhz) in dcn32_patch_dpm_table()2645 max_uclk_mhz = bw_params->clk_table.entries[i].memclk_mhz; in dcn32_patch_dpm_table()2668 if (max_uclk_mhz == 0) in dcn32_patch_dpm_table()
10429 double max_uclk_mhz = 0; in dml_core_mode_programming() local12059 …max_uclk_mhz = mode_lib->soc.clk_table.uclk.clk_values_khz[mode_lib->soc.clk_table.uclk.num_clk_va… in dml_core_mode_programming()12060 …min_return_latency_in_DCFCLK_cycles = (min_return_uclk_cycles / max_uclk_mhz + min_return_fclk_cyc… in dml_core_mode_programming()12067 DML_LOG_VERBOSE("DML::%s: max_uclk_mhz = %f\n", __func__, max_uclk_mhz); in dml_core_mode_programming()