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Searched refs:max_supported_dppclk_khz (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr.c43 int disp_clk_threshold = new_clocks->max_supported_dppclk_khz; in rv1_determine_dppclk_threshold()
184 clk_mgr->base.clks.max_supported_dppclk_khz = new_clocks->max_supported_dppclk_khz; in ramp_up_dispclk_with_dpp()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/
H A Ddml21_wrapper_fpu.c127 context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = in dml21_calculate_rq_and_dlg_params()
130 …context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = in_ctx->v21.dml_init.soc_bb.clk_table.dppclk… in dml21_calculate_rq_and_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
H A Ddcn201_clk_mgr.c80 clk_mgr->clks.max_supported_dppclk_khz = 1200000; in dcn201_init_clocks()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddml2_utils.c365 …context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = in_ctx->v20.dml_core_ctx.states.state_array[… in dml2_calculate_rq_and_dlg_params()
372 context->bw_ctx.bw.dcn.clk.bw_dppclk_khz = context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz ; in dml2_calculate_rq_and_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.c462 clock_cfg->max_clock_khz = context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz; in dcn2_get_clock()
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc.h722 int max_supported_dppclk_khz; member
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c1218 …context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = context->bw_ctx.dml.soc.clock_limits[vlevel]… in dcn20_calculate_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c1743 …context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = context->bw_ctx.dml.soc.clock_limits[vlevel]… in dcn32_calculate_dlg_params()