Searched refs:max_supported_dppclk_khz (Results 1 – 10 of 10) sorted by relevance
43 int disp_clk_threshold = new_clocks->max_supported_dppclk_khz; in rv1_determine_dppclk_threshold()184 clk_mgr->base.clks.max_supported_dppclk_khz = new_clocks->max_supported_dppclk_khz; in ramp_up_dispclk_with_dpp()
80 clk_mgr->clks.max_supported_dppclk_khz = 1200000; in dcn201_init_clocks()
178 context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = in dml21_calculate_rq_and_dlg_params()181 …context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = in_ctx->v21.dml_init.soc_bb.clk_table.dppclk… in dml21_calculate_rq_and_dlg_params()
364 …context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = in_ctx->v20.dml_core_ctx.states.state_array[… in dml2_calculate_rq_and_dlg_params()371 context->bw_ctx.bw.dcn.clk.bw_dppclk_khz = context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz ; in dml2_calculate_rq_and_dlg_params()
1180 context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = in dcn_validate_bandwidth()1184 context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = in dcn_validate_bandwidth()1188 context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = in dcn_validate_bandwidth()1192 context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = in dcn_validate_bandwidth()
462 clock_cfg->max_clock_khz = context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz; in dcn2_get_clock()
628 int max_supported_dppclk_khz; member
1219 …context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = context->bw_ctx.dml.soc.clock_limits[vlevel]… in dcn20_calculate_dlg_params()
1776 …context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = context->bw_ctx.dml.soc.clock_limits[vlevel]… in dcn32_calculate_dlg_params()
5422 info->maxSupportedDppClock = (unsigned int)state->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz; in get_clock_requirements_for_state()