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Searched refs:max_limits (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dbtc_dpm.c1240 const struct radeon_clock_and_voltage_limits *max_limits, in btc_adjust_clock_combinations() argument
1253 max_limits->sclk, in btc_adjust_clock_combinations()
1260 max_limits->mclk, in btc_adjust_clock_combinations()
2069 struct radeon_clock_and_voltage_limits *max_limits; in btc_apply_state_adjust_rules() local
2081 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in btc_apply_state_adjust_rules()
2083 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in btc_apply_state_adjust_rules()
2086 if (ps->high.mclk > max_limits->mclk) in btc_apply_state_adjust_rules()
2087 ps->high.mclk = max_limits->mclk; in btc_apply_state_adjust_rules()
2088 if (ps->high.sclk > max_limits->sclk) in btc_apply_state_adjust_rules()
2089 ps->high.sclk = max_limits->sclk; in btc_apply_state_adjust_rules()
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H A Dbtc_dpm.h48 const struct radeon_clock_and_voltage_limits *max_limits,
H A Dni_dpm.c789 struct radeon_clock_and_voltage_limits *max_limits; in ni_apply_state_adjust_rules() local
802 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ni_apply_state_adjust_rules()
804 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ni_apply_state_adjust_rules()
808 if (ps->performance_levels[i].mclk > max_limits->mclk) in ni_apply_state_adjust_rules()
809 ps->performance_levels[i].mclk = max_limits->mclk; in ni_apply_state_adjust_rules()
810 if (ps->performance_levels[i].sclk > max_limits->sclk) in ni_apply_state_adjust_rules()
811 ps->performance_levels[i].sclk = max_limits->sclk; in ni_apply_state_adjust_rules()
812 if (ps->performance_levels[i].vddc > max_limits->vddc) in ni_apply_state_adjust_rules()
813 ps->performance_levels[i].vddc = max_limits->vddc; in ni_apply_state_adjust_rules()
814 if (ps->performance_levels[i].vddci > max_limits->vddci) in ni_apply_state_adjust_rules()
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H A Dci_dpm.c770 struct radeon_clock_and_voltage_limits *max_limits; in ci_apply_state_adjust_rules() local
795 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_apply_state_adjust_rules()
797 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_apply_state_adjust_rules()
801 if (ps->performance_levels[i].mclk > max_limits->mclk) in ci_apply_state_adjust_rules()
802 ps->performance_levels[i].mclk = max_limits->mclk; in ci_apply_state_adjust_rules()
803 if (ps->performance_levels[i].sclk > max_limits->sclk) in ci_apply_state_adjust_rules()
804 ps->performance_levels[i].sclk = max_limits->sclk; in ci_apply_state_adjust_rules()
3886 const struct radeon_clock_and_voltage_limits *max_limits; in ci_enable_uvd_dpm() local
3890 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_enable_uvd_dpm()
3892 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_enable_uvd_dpm()
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H A Dsi_dpm.c2906 struct radeon_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local
2970 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules()
2972 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules()
2980 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()
2981 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()
2982 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()
2983 ps->performance_levels[i].sclk = max_limits->sclk; in si_apply_state_adjust_rules()
2984 if (ps->performance_levels[i].vddc > max_limits->vddc) in si_apply_state_adjust_rules()
2985 ps->performance_levels[i].vddc = max_limits->vddc; in si_apply_state_adjust_rules()
2986 if (ps->performance_levels[i].vddci > max_limits->vddci) in si_apply_state_adjust_rules()
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H A Dkv_dpm.c1947 struct radeon_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local
1958 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()
1962 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()
2081 struct radeon_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local
2083 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_dp_link_caps.c181 struct intel_dp_link_config max_limits; member
427 const struct intel_dp_link_config *max_limits, in calc_allowed_config_filter() argument
448 if (config.rate > max_limits->rate) in calc_allowed_config_filter()
451 if (config.lane_count > max_limits->lane_count) in calc_allowed_config_filter()
486 &link_caps->max_limits, &forced_params); in get_allowed_config_filter()
626 link_caps->max_limits = *max_link_limits; in set_max_link_limits()
677 &link_caps->max_limits, &forced_params).config_mask) in intel_dp_link_caps_disable_config()
709 *max_link_limits = link_caps->max_limits; in intel_dp_link_caps_get_max_limits()
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c3303 const struct amdgpu_clock_and_voltage_limits *max_limits, in btc_adjust_clock_combinations() argument
3316 max_limits->sclk, in btc_adjust_clock_combinations()
3323 max_limits->mclk, in btc_adjust_clock_combinations()
3448 struct amdgpu_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local
3544 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules()
3546 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules()
3554 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()
3555 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()
3556 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()
3557 ps->performance_levels[i].sclk = max_limits in si_apply_state_adjust_rules()
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/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_hwmgr.c3440 const struct phm_clock_and_voltage_limits *max_limits; in smu7_apply_state_adjust_rules() local
3458 max_limits = adev->pm.ac_power ? in smu7_apply_state_adjust_rules()
3465 if (smu7_ps->performance_levels[i].memory_clock > max_limits->mclk) in smu7_apply_state_adjust_rules()
3466 smu7_ps->performance_levels[i].memory_clock = max_limits->mclk; in smu7_apply_state_adjust_rules()
3467 if (smu7_ps->performance_levels[i].engine_clock > max_limits->sclk) in smu7_apply_state_adjust_rules()
3468 smu7_ps->performance_levels[i].engine_clock = max_limits->sclk; in smu7_apply_state_adjust_rules()
3477 max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); in smu7_apply_state_adjust_rules()
3478 stable_pstate_sclk = (max_limits->sclk * 75) / 100; in smu7_apply_state_adjust_rules()
3493 stable_pstate_mclk = max_limits->mclk; in smu7_apply_state_adjust_rules()
3528 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in smu7_apply_state_adjust_rules()
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