Searched refs:max_limits (Results 1 – 12 of 12) sorted by relevance
1240 const struct radeon_clock_and_voltage_limits *max_limits, in btc_adjust_clock_combinations() argument1253 max_limits->sclk, in btc_adjust_clock_combinations()1260 max_limits->mclk, in btc_adjust_clock_combinations()2069 struct radeon_clock_and_voltage_limits *max_limits; in btc_apply_state_adjust_rules() local2081 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in btc_apply_state_adjust_rules()2083 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in btc_apply_state_adjust_rules()2086 if (ps->high.mclk > max_limits->mclk) in btc_apply_state_adjust_rules()2087 ps->high.mclk = max_limits->mclk; in btc_apply_state_adjust_rules()2088 if (ps->high.sclk > max_limits->sclk) in btc_apply_state_adjust_rules()2089 ps->high.sclk = max_limits->sclk; in btc_apply_state_adjust_rules()[all …]
48 const struct radeon_clock_and_voltage_limits *max_limits,
789 struct radeon_clock_and_voltage_limits *max_limits; in ni_apply_state_adjust_rules() local802 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ni_apply_state_adjust_rules()804 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ni_apply_state_adjust_rules()808 if (ps->performance_levels[i].mclk > max_limits->mclk) in ni_apply_state_adjust_rules()809 ps->performance_levels[i].mclk = max_limits->mclk; in ni_apply_state_adjust_rules()810 if (ps->performance_levels[i].sclk > max_limits->sclk) in ni_apply_state_adjust_rules()811 ps->performance_levels[i].sclk = max_limits->sclk; in ni_apply_state_adjust_rules()812 if (ps->performance_levels[i].vddc > max_limits->vddc) in ni_apply_state_adjust_rules()813 ps->performance_levels[i].vddc = max_limits->vddc; in ni_apply_state_adjust_rules()814 if (ps->performance_levels[i].vddci > max_limits->vddci) in ni_apply_state_adjust_rules()[all …]
770 struct radeon_clock_and_voltage_limits *max_limits; in ci_apply_state_adjust_rules() local795 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_apply_state_adjust_rules()797 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_apply_state_adjust_rules()801 if (ps->performance_levels[i].mclk > max_limits->mclk) in ci_apply_state_adjust_rules()802 ps->performance_levels[i].mclk = max_limits->mclk; in ci_apply_state_adjust_rules()803 if (ps->performance_levels[i].sclk > max_limits->sclk) in ci_apply_state_adjust_rules()804 ps->performance_levels[i].sclk = max_limits->sclk; in ci_apply_state_adjust_rules()3886 const struct radeon_clock_and_voltage_limits *max_limits; in ci_enable_uvd_dpm() local3890 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_enable_uvd_dpm()3892 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_enable_uvd_dpm()[all …]
2906 struct radeon_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local2970 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules()2972 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules()2980 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()2981 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()2982 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()2983 ps->performance_levels[i].sclk = max_limits->sclk; in si_apply_state_adjust_rules()2984 if (ps->performance_levels[i].vddc > max_limits->vddc) in si_apply_state_adjust_rules()2985 ps->performance_levels[i].vddc = max_limits->vddc; in si_apply_state_adjust_rules()2986 if (ps->performance_levels[i].vddci > max_limits->vddci) in si_apply_state_adjust_rules()[all …]
1947 struct radeon_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local1958 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()1962 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()2081 struct radeon_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local2083 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()
3303 const struct amdgpu_clock_and_voltage_limits *max_limits, in btc_adjust_clock_combinations() 3316 max_limits->sclk, in btc_adjust_clock_combinations() 3323 max_limits->mclk, in btc_adjust_clock_combinations() 3448 struct amdgpu_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() 3544 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules() 3546 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules() 3554 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules() 3555 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules() 3556 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules() 3557 ps->performance_levels[i].sclk = max_limits in si_apply_state_adjust_rules() 3299 btc_adjust_clock_combinations(struct amdgpu_device * adev,const struct amdgpu_clock_and_voltage_limits * max_limits,struct rv7xx_pl * pl) btc_adjust_clock_combinations() argument 3444 struct amdgpu_clock_and_voltage_limits *max_limits; si_apply_state_adjust_rules() local [all...]
2209 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local2220 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()2224 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()2343 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local2345 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()
3288 const struct phm_clock_and_voltage_limits *max_limits; in vega10_apply_state_adjust_rules() local3308 max_limits = adev->pm.ac_power ? in vega10_apply_state_adjust_rules()3316 max_limits->mclk) in vega10_apply_state_adjust_rules()3318 max_limits->mclk; in vega10_apply_state_adjust_rules()3320 max_limits->sclk) in vega10_apply_state_adjust_rules()3322 max_limits->sclk; in vega10_apply_state_adjust_rules()3339 max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); in vega10_apply_state_adjust_rules()3340 stable_pstate_sclk = (max_limits->sclk * in vega10_apply_state_adjust_rules()3356 stable_pstate_mclk = max_limits->mclk; in vega10_apply_state_adjust_rules()3381 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in vega10_apply_state_adjust_rules()[all …]
3416 const struct phm_clock_and_voltage_limits *max_limits; in smu7_apply_state_adjust_rules() local3434 max_limits = adev->pm.ac_power ? in smu7_apply_state_adjust_rules()3441 if (smu7_ps->performance_levels[i].memory_clock > max_limits->mclk) in smu7_apply_state_adjust_rules()3442 smu7_ps->performance_levels[i].memory_clock = max_limits->mclk; in smu7_apply_state_adjust_rules()3443 if (smu7_ps->performance_levels[i].engine_clock > max_limits->sclk) in smu7_apply_state_adjust_rules()3444 smu7_ps->performance_levels[i].engine_clock = max_limits->sclk; in smu7_apply_state_adjust_rules()3453 max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); in smu7_apply_state_adjust_rules()3454 stable_pstate_sclk = (max_limits->sclk * 75) / 100; in smu7_apply_state_adjust_rules()3469 stable_pstate_mclk = max_limits->mclk; in smu7_apply_state_adjust_rules()3504 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in smu7_apply_state_adjust_rules()[all …]
1831 struct phm_clock_and_voltage_limits *max_limits = in vega12_get_dal_power_level()1834 info->engine_max_clock = max_limits->sclk; in vega12_get_dal_power_level()1835 info->memory_max_clock = max_limits->mclk; in vega12_get_dal_power_level()
2805 struct phm_clock_and_voltage_limits *max_limits = in vega20_get_dal_power_level()2808 info->engine_max_clock = max_limits->sclk; in vega20_get_dal_power_level()2809 info->memory_max_clock = max_limits->mclk; in vega20_get_dal_power_level()