Searched refs:max_fclk_mhz (Results 1 – 4 of 4) sorted by relevance
/linux/drivers/gpu/drm/amd/display/dc/dml2/ |
H A D | dml2_policy.c | 131 max_phyclk_mhz = 0, max_dtbclk_mhz = 0, max_fclk_mhz = 0, in dml2_policy_build_synthetic_soc_states() local 139 if (p->in_states->state_array[i].fabricclk_mhz > max_fclk_mhz) in dml2_policy_build_synthetic_soc_states() 140 max_fclk_mhz = (int) p->in_states->state_array[i].fabricclk_mhz; in dml2_policy_build_synthetic_soc_states() 223 p->out_states->state_array[i].fabricclk_mhz > max_fclk_mhz || in dml2_policy_build_synthetic_soc_states()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
H A D | dcn32_fpu.c | 2668 max_phyclk_mhz = 0, max_dtbclk_mhz = 0, max_fclk_mhz = 0, max_uclk_mhz = 0; in dcn32_patch_dpm_table() local 2673 if (bw_params->clk_table.entries[i].fclk_mhz > max_fclk_mhz) in dcn32_patch_dpm_table() 2674 max_fclk_mhz = bw_params->clk_table.entries[i].fclk_mhz; in dcn32_patch_dpm_table()
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/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
H A D | dml2_core_shared.c | 11387 double max_fclk_mhz = min_clk_table->max_clocks_khz.fclk / 1000.0; in dml2_core_shared_mode_programming() local 11390 …s = (min_return_uclk_cycles / max_uclk_mhz + min_return_fclk_cycles / max_fclk_mhz) * hard_minimum… in dml2_core_shared_mode_programming() 11397 dml2_printf("DML::%s: max_fclk_mhz = %f\n", __func__, max_fclk_mhz); in dml2_core_shared_mode_programming()
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H A D | dml2_core_dcn4_calcs.c | 9991 const double max_fclk_mhz = min_clk_table->max_clocks_khz.fclk / 1000.0; in dml_core_mode_programming() local 11567 …s = (min_return_uclk_cycles / max_uclk_mhz + min_return_fclk_cycles / max_fclk_mhz) * hard_minimum… in dml_core_mode_programming() 11573 dml2_printf("DML::%s: max_fclk_mhz = %f\n", __func__, max_fclk_mhz); in dml_core_mode_programming()
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