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Searched refs:mask_offset (Results 1 – 7 of 7) sorted by relevance

/linux/arch/arm/mach-omap1/
H A Dmux.h29 .mask_offset = mode_offset, \
43 .mask_offset = mode_offset, \
54 .mask_offset = mode_offset, \
66 .mask_offset = mode_offset, \
109 const unsigned char mask_offset; member
H A Dmux.c302 mask = (0x7 << cfg->mask_offset); in omap1_cfg_reg()
306 tmp2 = (cfg->mask << cfg->mask_offset); in omap1_cfg_reg()
/linux/arch/arm/plat-orion/
H A Dgpio.c47 int mask_offset; member
84 return ochip->base + ochip->mask_offset + GPIO_EDGE_MASK_OFF; in GPIO_EDGE_MASK()
89 return ochip->base + ochip->mask_offset + GPIO_LEVEL_MASK_OFF; in GPIO_LEVEL_MASK()
521 void __iomem *base, int mask_offset, in orion_gpio_init() argument
554 ochip->mask_offset = mask_offset; in orion_gpio_init()
583 ct->regs.mask = ochip->mask_offset + GPIO_LEVEL_MASK_OFF; in orion_gpio_init()
591 ct->regs.mask = ochip->mask_offset + GPIO_EDGE_MASK_OFF; in orion_gpio_init()
/linux/arch/arm/mach-davinci/
H A Dmux.c70 mask = (cfg->mask << cfg->mask_offset); in davinci_cfg_reg()
74 tmp2 = (cfg->mode << cfg->mask_offset); in davinci_cfg_reg()
H A Dmux.h18 const unsigned char mask_offset; member
669 .mask_offset = mode_offset, \
680 .mask_offset = mode_offset, \
691 .mask_offset = mode_offset, \
/linux/arch/arm/plat-orion/include/plat/
H A Dorion-gpio.h34 void __iomem *base, int mask_offset,
/linux/drivers/pinctrl/mediatek/
H A Dmtk-eint.c341 int offset, mask_offset, index; in mtk_eint_irq_handler() local
351 mask_offset = eint_num >> 5; in mtk_eint_irq_handler()
361 if (eint->wake_mask[mask_offset] & BIT(offset) && in mtk_eint_irq_handler()
362 !(eint->cur_mask[mask_offset] & BIT(offset))) { in mtk_eint_irq_handler()