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Searched refs:mask_low (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/iio/adc/
H A Dmax1363.c178 u8 mask_low; member
820 val = (1 << number) & st->mask_low; in max1363_read_event_config()
848 if ((st->mask_low | st->mask_high) & 0x0F) { in max1363_monitor_mode_update()
851 } else if ((st->mask_low | st->mask_high) & 0x30) { in max1363_monitor_mode_update()
875 if (st->mask_low & (1 << j)) { in max1363_monitor_mode_update()
961 unifiedmask = st->mask_low | st->mask_high; in __max1363_write_event_config()
965 st->mask_low &= ~(1 << number); in __max1363_write_event_config()
971 st->mask_low |= (1 << number); in __max1363_write_event_config()
1000 max1363_monitor_mode_update(st, !!(st->mask_high | st->mask_low)); in max1363_write_event_config()
/linux/include/linux/platform_data/
H A Dmlxreg.h231 u32 mask_low; member
/linux/drivers/platform/mellanox/
H A Dmlx-platform.c452 .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_I2C,
934 .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,
974 .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,
984 .mask_low = MLXPLAT_CPLD_LOW_AGGRCX_MASK,
1031 .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,
1140 .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,
1187 .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,
1311 .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,
1510 .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW | MLXPLAT_CPLD_LOW_AGGR_MASK_ASIC2,
1520 .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW | MLXPLAT_CPLD_LOW_AGGR_MASK_ASIC2,
[all …]
H A Dmlxreg-hotplug.c640 pdata->mask_low); in mlxreg_hotplug_set_irq()
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_hwmgr.c977 tmp = table.mask_low; in vega10_setup_dpm_led_config()
1037 table->mask_low = vol_table->mask_low; in vega10_trim_voltage_table()
1075 vol_table->mask_low = 0; in vega10_get_mvdd_voltage_table()
1102 vol_table->mask_low = 0; in vega10_get_vddci_voltage_table()
1128 vol_table->mask_low = 0; in vega10_get_vdd_voltage_table()
H A Dsmu7_hwmgr.c296 voltage_table->mask_low = 0; in phm_get_svi2_voltage_table_v0()
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dpolaris10_smumgr.c683 table->SmioMask2 = data->mvdd_voltage_table.mask_low; in polaris10_populate_smc_mvdd_table()
710 table->SmioMask1 = data->vddc_voltage_table.mask_low; in polaris10_populate_smc_vddc_table()
735 table->SmioMask1 = data->vddci_voltage_table.mask_low; in polaris10_populate_smc_vddci_table()
H A Dvegam_smumgr.c467 table->SmioMask2 = data->mvdd_voltage_table.mask_low; in vegam_populate_smc_mvdd_table()
495 table->SmioMask1 = data->vddci_voltage_table.mask_low; in vegam_populate_smc_vddci_table()
H A Dtonga_smumgr.c360 table->SmioMask1 = data->vddci_voltage_table.mask_low; in tonga_populate_smc_vdd_ci_table()
383 table->SmioMask2 = data->mvdd_voltage_table.mask_low; in tonga_populate_smc_mvdd_table()
H A Dfiji_smumgr.c1899 u32 tmp = param_led_dpm.mask_low; in fiji_setup_dpm_led_config()
/linux/drivers/gpu/drm/radeon/
H A Dsi_dpm.c3844 data = table->mask_low; in si_validate_phase_shedding_tables()
3888 voltage_table->mask_low = 0; in si_get_svi2_voltage_table()
4009 cpu_to_be32(eg_pi->vddc_voltage_table.mask_low); in si_populate_smc_voltage_tables()
4023 cpu_to_be32(eg_pi->vddci_voltage_table.mask_low); in si_populate_smc_voltage_tables()
4031 cpu_to_be32(si_pi->mvdd_voltage_table.mask_low); in si_populate_smc_voltage_tables()
4040 cpu_to_be32(si_pi->vddc_phase_shed_table.mask_low); in si_populate_smc_voltage_tables()
H A Dcypress_dpm.c1540 cpu_to_be32(eg_pi->vddc_voltage_table.mask_low); in cypress_populate_smc_voltage_tables()
1558 cpu_to_be32(eg_pi->vddci_voltage_table.mask_low); in cypress_populate_smc_voltage_tables()
H A Dni_dpm.c1280 cpu_to_be32(eg_pi->vddc_voltage_table.mask_low); in ni_populate_smc_voltage_tables()
1295 cpu_to_be32(eg_pi->vddci_voltage_table.mask_low); in ni_populate_smc_voltage_tables()
H A Dradeon_atombios.c3750 &voltage_table->mask_low); in radeon_atom_get_voltage_table()
3786 voltage_table->mask_low = le32_to_cpu(gpio->ulGpioMaskVal); in radeon_atom_get_voltage_table()
H A Dci_dpm.c2078 voltage_table->mask_low = 0; in ci_get_svi2_voltage_table()
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c4409 data = table->mask_low; in si_validate_phase_shedding_tables()
4453 voltage_table->mask_low = 0; in si_get_svi2_voltage_table()
4574 cpu_to_be32(eg_pi->vddc_voltage_table.mask_low); in si_populate_smc_voltage_tables()
4588 cpu_to_be32(eg_pi->vddci_voltage_table.mask_low); in si_populate_smc_voltage_tables()
4596 cpu_to_be32(si_pi->mvdd_voltage_table.mask_low); in si_populate_smc_voltage_tables()
4605 cpu_to_be32(si_pi->vddc_phase_shed_table.mask_low); in si_populate_smc_voltage_tables()