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/linux/tools/testing/selftests/powerpc/ptrace/
H A Dptrace-vsx.h13 int validate_vsx(unsigned long *vsx, unsigned long *load) in validate_vsx() argument
18 if (vsx[i] != load[2 * i + 1]) { in validate_vsx()
20 i, vsx[i], 2 * i + 1, load[2 * i + 1]); in validate_vsx()
31 int validate_vmx(unsigned long vmx[][2], unsigned long *load) in validate_vmx() argument
37 if ((vmx[i][0] != load[64 + 2 * i]) || in validate_vmx()
38 (vmx[i][1] != load[65 + 2 * i])) { in validate_vmx()
41 load[64 + 2 * i]); in validate_vmx()
44 load[65 + 2 * i]); in validate_vmx()
51 if ((vmx[i][0] != load[65 + 2 * i]) || in validate_vmx()
52 (vmx[i][1] != load[64 + 2 * i])) { in validate_vmx()
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/linux/tools/power/cpupower/bench/
H A DREADME-BENCH9 - Identify average reaction time of a governor to CPU load changes
34 You can specify load (100% CPU load) and sleep (0% CPU load) times in us which
38 load=25000
41 This part of the configuration file will create 25ms load/sleep turns,
48 Will increase load and sleep time by 25ms 5 times.
50 25ms load/sleep time repeated 20 times (cycles).
51 50ms load/sleep time repeated 20 times (cycles).
53 100ms load/sleep time repeated 20 times (cycles).
69 100% CPU load (load) | 0 % CPU load (sleep) | round
76 In round 1, ondemand should have rather static 50% load and probably
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H A Dbenchmark.c32 unsigned int calculate_timespace(long load, struct config *config) in calculate_timespace() argument
41 printf("calibrating load of %lius, please wait...\n", load); in calculate_timespace()
53 rounds = (unsigned int)(load * estimated / timed); in calculate_timespace()
88 load_time = config->load; in start_benchmark()
92 total_time += _round * (config->sleep + config->load); in start_benchmark()
/linux/drivers/misc/genwqe/
H A Dcard_dev.c503 struct genwqe_bitstream *load) in do_flash_update() argument
518 if ((load->size & 0x3) != 0) in do_flash_update()
521 if (((unsigned long)(load->data_addr) & ~PAGE_MASK) != 0) in do_flash_update()
525 switch ((char)load->partition) { in do_flash_update()
539 buf = (u8 __user *)load->data_addr; in do_flash_update()
544 blocks_to_flash = load->size / FLASH_BLOCK; in do_flash_update()
545 while (load->size) { in do_flash_update()
552 tocopy = min_t(size_t, load->size, FLASH_BLOCK); in do_flash_update()
582 req->__asiv[24] = load->uid; in do_flash_update()
586 *(__be64 *)&req->__asiv[88] = cpu_to_be64(load->slu_id); in do_flash_update()
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/linux/tools/perf/scripts/python/bin/
H A Dmem-phys-addr-record8 load=`perf list | grep mem_inst_retired.all_loads`
9 if [ -z "$load" ]; then
10 load=`perf list | grep mem_uops_retired.all_loads`
12 if [ -z "$load" ]; then
17 arg=$(echo $load | tr -d ' ')
/linux/arch/mips/sibyte/
H A DPlatform27 load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000
28 load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000
29 load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
30 load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000
31 load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
32 load-$(CONFIG_SIBYTE_LITTLESUR) := 0xffffffff80100000
/linux/tools/testing/selftests/verification/test.d/
H A Drv_wwnr_printk.tc6 load() { # returns true if there was a reaction
17 load
20 ! load
23 load
26 ! load
/linux/kernel/sched/
H A Dpelt.c104 unsigned long load, unsigned long runnable, int running) in accumulate_sum() argument
125 if (load) { in accumulate_sum()
142 if (load) in accumulate_sum()
143 sa->load_sum += load * contrib; in accumulate_sum()
182 unsigned long load, unsigned long runnable, int running) in ___update_load_sum() argument
217 if (!load) in ___update_load_sum()
227 if (!accumulate_sum(delta, sa, load, runnable, running)) in ___update_load_sum()
258 ___update_load_avg(struct sched_avg *sa, unsigned long load) in ___update_load_avg() argument
265 sa->load_avg = div_u64(load * sa->load_sum, divider); in ___update_load_avg()
324 scale_load_down(cfs_rq->load.weight), in __update_load_avg_cfs_rq()
/linux/arch/mips/ralink/
H A DPlatform9 load-$(CONFIG_SOC_RT288X) += 0xffffffff88000000
15 load-$(CONFIG_SOC_RT305X) += 0xffffffff80000000
21 load-$(CONFIG_SOC_RT3883) += 0xffffffff80000000
27 load-$(CONFIG_SOC_MT7620) += 0xffffffff80000000
32 load-$(CONFIG_SOC_MT7621) += 0xffffffff80001000
/linux/include/linux/sched/
H A Dloadavg.h29 calc_load(unsigned long load, unsigned long exp, unsigned long active) in calc_load() argument
33 newload = load * exp + active * (FIXED_1 - exp); in calc_load()
34 if (active >= load) in calc_load()
40 extern unsigned long calc_load_n(unsigned long load, unsigned long exp,
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8994-sony-xperia-kitakami.dtsi161 * One way to use that framebuffer is to load a secondary instance of
162 * LK with the downstream DTB appended and then, only from there, load
239 regulator-system-load = <325000>;
240 regulator-allow-set-load;
267 regulator-system-load = <10000>;
268 regulator-allow-set-load;
314 regulator-system-load = <10000>;
315 regulator-allow-set-load;
326 regulator-system-load = <10000>;
327 regulator-allow-set-load;
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H A Dsdm660-xiaomi-lavender.dts147 regulator-allow-set-load;
155 regulator-allow-set-load;
162 regulator-allow-set-load;
172 regulator-system-load = <570000>;
173 regulator-allow-set-load;
187 regulator-allow-set-load;
188 regulator-system-load = <800000>;
256 regulator-allow-set-load;
280 regulator-allow-set-load;
294 regulator-system-load = <325000>;
[all …]
H A Dmsm8992-lg-h815.dts161 regulator-system-load = <325000>;
162 regulator-allow-set-load;
174 regulator-system-load = <22000>;
175 regulator-allow-set-load;
182 regulator-system-load = <570000>;
183 regulator-allow-set-load;
190 regulator-system-load = <800000>;
191 regulator-allow-set-load;
/linux/arch/mips/sgi-ip22/
H A DPlatform4 # Set the load address to >= 0xffffffff88069000 if you want to leave space for
12 load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
15 load-$(CONFIG_SGI_IP22) += 0xffffffff88004000
21 # Set the load address to >= 0xa800000020080000 if you want to leave space for
27 load-$(CONFIG_SGI_IP28) += 0xa800000020004000
/linux/arch/m68k/fpsp040/
H A Ddo_func.S98 | These routines load forced values into fp0. They are called
110 bsr ld_mzero |if neg, load neg zero, return here
118 bne ld_mzero |if neg, load neg zero
119 bra ld_pzero |load positive zero
310 beq ld_pzero |if pos then load +0
311 bra ld_mzero |else neg load -0
448 leal pscalet,%a1 |load start of jump table
449 movel (%a1,%d1.w*4),%a1 |load a1 with label depending on tag
460 beq ld_pzero |if pos then load +0
461 bra ld_mzero |if neg then load -0
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/linux/drivers/net/can/softing/
H A Dsofting_cs.c36 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
48 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
60 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
72 .load = {0x0120, 0x00f600, fw_dir "ldcard2.bin",},
84 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
96 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
108 .load = {0x0120, 0x00f600, fw_dir "ldcard2.bin",},
120 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
132 .load = {0x0120, 0x00f600, fw_dir "ldcard2.bin",},
/linux/tools/perf/util/
H A Djitdump.c338 jr->load.pid = bswap_32(jr->load.pid); in jit_get_next_entry()
339 jr->load.tid = bswap_32(jr->load.tid); in jit_get_next_entry()
340 jr->load.vma = bswap_64(jr->load.vma); in jit_get_next_entry()
341 jr->load.code_addr = bswap_64(jr->load.code_addr); in jit_get_next_entry()
342 jr->load.code_size = bswap_64(jr->load.code_size); in jit_get_next_entry()
343 jr->load.code_index= bswap_64(jr->load.code_index); in jit_get_next_entry()
383 return jr->load.pid; in jr_entry_pid()
390 return jr->load.tid; in jr_entry_tid()
444 nspid = jr->load.pid; in jit_repipe_code_load()
447 csize = jr->load.code_size; in jit_repipe_code_load()
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/linux/rust/kernel/sync/atomic/
H A Dpredefine.rs158 assert_eq!(v, x.load(Relaxed)); in atomic_cmpxchg_tests()
168 assert_eq!(v, x.load(Acquire)); in atomic_arithmetic_tests()
181 assert_eq!(new, x.load(Relaxed));
194 assert_eq!(old, x.load(Relaxed));
196 assert_eq!(new, x.load(Relaxed));
206 assert_eq!(v + 12, x.load(Relaxed));
210 assert_eq!(v + 25, x.load(Relaxed));
218 assert_eq!(false, x.load(Relaxed));
220 assert_eq!(true, x.load(Relaxed));
223 assert_eq!(false, x.load(Relaxe
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/linux/Documentation/leds/
H A Dleds-mt6370-rgb.rst50 * Tr1: First rising time for 0% - 30% load.
51 * Tr2: Second rising time for 31% - 100% load.
52 * Ton: On time for 100% load.
53 * Tf1: First falling time for 100% - 31% load.
54 * Tf2: Second falling time for 30% to 0% load.
55 * Toff: Off time for 0% load.
/linux/arch/mips/alchemy/
H A DPlatform13 load-$(CONFIG_MIPS_DB1XXX) += 0xffffffff80100000
18 load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
23 load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
28 load-$(CONFIG_MIPS_GPR) += 0xffffffff80100000
/linux/arch/arm/include/debug/
H A D8250.S21 .macro load, rd, rx:vararg macro
30 .macro load, rd, rx:vararg macro
42 1002: load \rd, [\rx, #UART_LSR << UART_SHIFT]
52 1001: load \rd, [\rx, #UART_MSR << UART_SHIFT]
/linux/arch/mips/kernel/
H A Dcmpxchg.c53 u32 mask, old32, new32, load32, load; in __cmpxchg_small() local
88 load = (load32 & mask) >> shift; in __cmpxchg_small()
89 if (load != old) in __cmpxchg_small()
90 return load; in __cmpxchg_small()
/linux/tools/memory-model/Documentation/
H A Dglossary.txt8 based on the value returned by an earlier load, an "address
9 dependency" extends from that load extending to the later access.
29 a special operation that includes a load and which orders that
30 load before later memory references running on that same CPU.
35 When an acquire load returns the value stored by a release store
36 to that same variable, (in other words, the acquire load "reads
38 store "happen before" any operations following that load acquire.
55 of a value computed from a value returned by an earlier load,
56 a "control dependency" extends from that load to that store.
89 on the value returned by an earlier load,
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H A Dcontrol-dependencies.txt12 Therefore, a load-load control dependency will not preserve ordering
20 are permitted to predict the result of the load from "b". This prediction
21 can cause other CPUs to see this load as having happened before the load
32 (usually) guaranteed for load-store control dependencies, as in the
42 fuse the load from "a" with other loads. Without the WRITE_ONCE(),
44 the compiler might convert the store into a load and a check followed
45 by a store, and this compiler-generated load would not be ordered by
57 load, it does *not* force the compiler to actually use the loaded value.
78 WRITE_ONCE(b, 1); /* BUG: No ordering vs. load from a!!! */
87 Now there is no conditional between the load from "a" and the store to
[all …]
/linux/arch/mips/boot/dts/mscc/
H A Docelot_pcb120.dts30 phy_load_save_pins: phy-load-save-pins {
49 load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
55 load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
61 load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
67 load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;

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