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Searched refs:lio_pci_writeq (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/net/ethernet/cavium/liquidio/
H A Dcn68xx_device.c36 lio_pci_writeq(oct, CN6XXX_DPI_DMA_CTL_MASK, CN6XXX_DPI_DMA_CONTROL); in lio_cn68xx_set_dpi_regs()
45 lio_pci_writeq(oct, 0, CN6XXX_DPI_DMA_ENG_ENB(i)); in lio_cn68xx_set_dpi_regs()
46 lio_pci_writeq(oct, fifo_sizes[i], CN6XXX_DPI_DMA_ENG_BUF(i)); in lio_cn68xx_set_dpi_regs()
55 lio_pci_writeq(oct, 1, CN6XXX_DPI_CTL); in lio_cn68xx_set_dpi_regs()
H A Dcn66xx_device.c35 lio_pci_writeq(oct, 1, CN6XXX_CIU_SOFT_BIST); in lio_cn6xxx_soft_reset()
39 lio_pci_writeq(oct, 1, CN6XXX_CIU_SOFT_RST); in lio_cn6xxx_soft_reset()
91 lio_pci_writeq(oct, r64, CN6XXX_DPI_SLI_PRTX_CFG(oct->pcie_port)); in lio_cn6xxx_setup_pcie_mps()
119 lio_pci_writeq(oct, r64, CN6XXX_DPI_SLI_PRTX_CFG(oct->pcie_port)); in lio_cn6xxx_setup_pcie_mrrs()
421 lio_pci_writeq(oct, (bar1 & 0xFFFFFFFEULL), in lio_cn6xxx_bar1_idx_setup()
430 lio_pci_writeq(oct, (((core_addr >> 22) << 4) | PCI_BAR1_MASK), in lio_cn6xxx_bar1_idx_setup()
440 lio_pci_writeq(oct, mask, CN6XXX_BAR1_REG(idx, oct->pcie_port)); in lio_cn6xxx_bar1_idx_write()
H A Docteon_device.h737 void lio_pci_writeq(struct octeon_device *oct, u64 val, u64 addr);
H A Docteon_device.c1374 void lio_pci_writeq(struct octeon_device *oct, in lio_pci_writeq() function
1393 EXPORT_SYMBOL_GPL(lio_pci_writeq);
H A Dlio_main.c1538 lio_pci_writeq(oct, comp, CN6XXX_MIO_PTP_CLOCK_COMP); in liquidio_ptp_adjfine()
1600 lio_pci_writeq(oct, ns, CN6XXX_MIO_PTP_CLOCK_HI); in liquidio_ptp_settime()
1664 lio_pci_writeq(oct, clock_comp, CN6XXX_MIO_PTP_CLOCK_COMP); in liquidio_ptp_init()
1668 lio_pci_writeq(oct, cfg | 0x01, CN6XXX_MIO_PTP_CLOCK_CFG); in liquidio_ptp_init()