Home
last modified time | relevance | path

Searched refs:levels (Results 1 – 25 of 457) sorted by relevance

12345678910>>...19

/linux/drivers/gpu/drm/radeon/
H A Drv730_dpm.c244 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state()
245 table->ACPIState.levels[0].gen2PCIE = pi->pcie_gen2 ? in rv730_populate_smc_acpi_state()
247 table->ACPIState.levels[0].gen2XSP = in rv730_populate_smc_acpi_state()
251 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state()
252 table->ACPIState.levels[0].gen2PCIE = 0; in rv730_populate_smc_acpi_state()
294 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl); in rv730_populate_smc_acpi_state()
295 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL2 = cpu_to_be32(mpll_func_cntl_2); in rv730_populate_smc_acpi_state()
296 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL3 = cpu_to_be32(mpll_func_cntl_3); in rv730_populate_smc_acpi_state()
297 table->ACPIState.levels[0].mclk.mclk730.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv730_populate_smc_acpi_state()
298 table->ACPIState.levels[0].mclk.mclk730.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv730_populate_smc_acpi_state()
[all …]
H A Drv740_dpm.c337 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state()
338 table->ACPIState.levels[0].gen2PCIE = in rv740_populate_smc_acpi_state()
341 table->ACPIState.levels[0].gen2XSP = in rv740_populate_smc_acpi_state()
345 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state()
346 table->ACPIState.levels[0].gen2PCIE = 0; in rv740_populate_smc_acpi_state()
376 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv740_populate_smc_acpi_state()
377 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv740_populate_smc_acpi_state()
378 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv740_populate_smc_acpi_state()
379 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv740_populate_smc_acpi_state()
380 table->ACPIState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv740_populate_smc_acpi_state()
[all …]
H A Dcypress_dpm.c778 &smc_state->levels[0], in cypress_convert_power_state_to_smc()
785 &smc_state->levels[1], in cypress_convert_power_state_to_smc()
792 &smc_state->levels[2], in cypress_convert_power_state_to_smc()
797 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in cypress_convert_power_state_to_smc()
798 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in cypress_convert_power_state_to_smc()
799 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3; in cypress_convert_power_state_to_smc()
802 smc_state->levels[0].ACIndex = 2; in cypress_convert_power_state_to_smc()
803 smc_state->levels[1].ACIndex = 3; in cypress_convert_power_state_to_smc()
804 smc_state->levels[2].ACIndex = 4; in cypress_convert_power_state_to_smc()
806 smc_state->levels[ in cypress_convert_power_state_to_smc()
[all...]
H A Dsumo_dpm.c345 u32 highest_engine_clock = ps->levels[ps->num_levels - 1].sclk; in sumo_program_bsp()
409 m_a = asi * ps->levels[i].sclk / 100; in sumo_program_at()
668 pi->boost_pl = new_ps->levels[new_ps->num_levels - 1]; in sumo_patch_boost_state()
760 sumo_program_power_level(rdev, &new_ps->levels[i], i); in sumo_program_power_levels_0_to_n()
842 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in sumo_set_uvd_clock_before_set_eng_clock()
843 current_ps->levels[current_ps->num_levels - 1].sclk) in sumo_set_uvd_clock_before_set_eng_clock()
860 if (new_ps->levels[new_ps->num_levels - 1].sclk < in sumo_set_uvd_clock_after_set_eng_clock()
861 current_ps->levels[current_ps->num_levels - 1].sclk) in sumo_set_uvd_clock_after_set_eng_clock()
1051 current_vddc = current_ps->levels[current_index].vddc_index; in sumo_patch_thermal_state()
1052 current_sclk = current_ps->levels[current_inde in sumo_patch_thermal_state()
[all...]
H A Drv770_dpm.c291 smc_state->levels[i].aT = cpu_to_be32(a_t); in rv770_populate_smc_t()
297 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].aT = in rv770_populate_smc_t()
311 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in rv770_populate_smc_sp()
313 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].bSP = in rv770_populate_smc_sp()
687 &smc_state->levels[0], in rv770_convert_power_state_to_smc()
694 &smc_state->levels[1], in rv770_convert_power_state_to_smc()
701 &smc_state->levels[2], in rv770_convert_power_state_to_smc()
706 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in rv770_convert_power_state_to_smc()
707 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in rv770_convert_power_state_to_smc()
708 smc_state->levels[ in rv770_convert_power_state_to_smc()
[all...]
H A Dtrinity_dpm.c801 trinity_program_power_level(rdev, &new_ps->levels[i], i); in trinity_program_power_levels_0_to_n()
921 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in trinity_set_uvd_clock_before_set_eng_clock()
922 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_before_set_eng_clock()
935 if (new_ps->levels[new_ps->num_levels - 1].sclk < in trinity_set_uvd_clock_after_set_eng_clock()
936 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_after_set_eng_clock()
1283 ps->levels[0] = pi->boot_pl; in trinity_patch_boot_state()
1306 pi->current_ps.levels[0] = pi->boot_pl; in trinity_construct_boot_state()
1361 current_vddc = current_ps->levels[current_index].vddc_index; in trinity_patch_thermal_state()
1362 current_sclk = current_ps->levels[current_index].sclk; in trinity_patch_thermal_state()
1368 ps->levels[ in trinity_patch_thermal_state()
[all...]
/linux/drivers/video/backlight/
H A Dpwm_bl.c25 unsigned int *levels; member
80 if (pb->levels) in compute_duty_cycle()
81 duty_cycle = pb->levels[brightness]; in compute_duty_cycle()
197 data->levels = devm_kcalloc(dev, data->max_brightness, in pwm_backlight_brightness_default()
198 sizeof(*data->levels), GFP_KERNEL); in pwm_backlight_brightness_default()
199 if (!data->levels) in pwm_backlight_brightness_default()
209 data->levels[i] = (unsigned int)retval; in pwm_backlight_brightness_default()
255 data->levels = devm_kcalloc(dev, num_levels, in pwm_backlight_parse_dt()
256 sizeof(*data->levels), GFP_KERNEL); in pwm_backlight_parse_dt()
257 if (!data->levels) in pwm_backlight_parse_dt()
[all …]
/linux/arch/powerpc/platforms/powernv/
H A Dpci-ioda-tce.c81 unsigned long size, unsigned int levels);
217 unsigned long size, unsigned int levels) in pnv_pci_ioda2_table_do_free_pages() argument
222 if (levels) { in pnv_pci_ioda2_table_do_free_pages()
233 levels - 1); in pnv_pci_ioda2_table_do_free_pages()
257 unsigned int levels, unsigned long limit, in pnv_pci_ioda2_table_do_alloc_pages() argument
268 --levels; in pnv_pci_ioda2_table_do_alloc_pages()
269 if (!levels) { in pnv_pci_ioda2_table_do_alloc_pages()
276 levels, limit, current_offset, total_allocated); in pnv_pci_ioda2_table_do_alloc_pages()
291 __u32 page_shift, __u64 window_size, __u32 levels, in pnv_pci_ioda2_table_alloc_pages() argument
303 if (!levels || (levels > POWERNV_IOMMU_MAX_LEVELS)) in pnv_pci_ioda2_table_alloc_pages()
[all …]
/linux/arch/mips/kernel/
H A Dcacheinfo.c24 int levels = 0, leaves = 0; in init_cache_level() local
31 levels += 1; in init_cache_level()
39 levels++; in init_cache_level()
44 levels++; in init_cache_level()
49 levels++; in init_cache_level()
53 this_cpu_ci->num_levels = levels; in init_cache_level()
/linux/Documentation/scheduler/
H A Dsched-nice-design.rst6 nice-levels implementation in the new Linux scheduler.
8 Nice levels were always pretty weak under Linux and people continuously
16 In the O(1) scheduler (in 2003) we changed negative nice levels to be
58 To sum it up: we always wanted to make nice levels more consistent, but
83 nice levels were not 'punchy enough', so lots of people had to resort to
90 To address the first complaint (of nice levels being not "punchy"
92 (and granularity was made a separate concept from nice levels) and thus
98 To address the second complaint (of nice levels not being consistent),
100 tasks, regardless of their absolute nice levels. So on the new
104 levels were changed to be "multiplicative" (or exponential) - that way
[all …]
/linux/drivers/acpi/
H A Dacpi_video.c86 * the rest are all supported levels.
93 ACPI_VIDEO_FIRST_LEVEL, /* actual supported levels begin here */
187 u8 _BCL:1; /* Query list of brightness control levels supported */
232 if (vd->brightness->levels[i] == cur_level) in acpi_video_get_brightness()
245 vd->brightness->levels[request_level]); in acpi_video_set_brightness()
274 if (level == video->brightness->levels[offset]) { in video_get_cur_state()
292 level = video->brightness->levels[state - 1]; in video_set_cur_state()
310 union acpi_object **levels) in acpi_video_device_lcd_query_levels() argument
317 *levels = NULL; in acpi_video_device_lcd_query_levels()
329 *levels in acpi_video_device_lcd_query_levels()
1786 union acpi_object *levels; acpi_video_run_bcl_for_osi() local
[all...]
/linux/drivers/iommu/
H A Dio-pgtable-dart.c72 int levels; member
177 int level = data->levels; in dart_get_last()
236 int level = data->levels; in dart_map_pages()
365 int levels, max_tbl_bits, tbl_bits, bits_per_level, va_bits, pg_shift; in dart_alloc_pgtable() local
381 levels = max_t(int, 2, (va_bits - max_tbl_bits + bits_per_level - 1) / bits_per_level); in dart_alloc_pgtable()
383 if (levels > (DART_MAX_LEVELS - 1)) in dart_alloc_pgtable()
386 tbl_bits = max_t(int, 0, va_bits - (bits_per_level * levels)); in dart_alloc_pgtable()
395 data->levels = levels + 1; /* Table level counts as one level */ in dart_alloc_pgtable()
431 cfg->apple_dart_cfg.n_levels = data->levels; in apple_dart_alloc_pgtable()
[all...]
/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-npcm750-evb.dts285 cooling-levels = <127 255>;
290 cooling-levels = /bits/ 8 <127 255>;
295 cooling-levels = /bits/ 8 <127 255>;
300 cooling-levels = /bits/ 8 <127 255>;
305 cooling-levels = /bits/ 8 <127 255>;
310 cooling-levels = /bits/ 8 <127 255>;
315 cooling-levels = /bits/ 8 <127 255>;
320 cooling-levels = /bits/ 8 <127 255>;
/linux/arch/arm64/mm/
H A Dtrans_pgd.c248 unsigned long level_mask, prev_level_entry, *levels[4]; in trans_pgd_idmap_page() local
255 levels[this_level] = trans_alloc(info); in trans_pgd_idmap_page()
256 if (!levels[this_level]) in trans_pgd_idmap_page()
264 *(levels[this_level] + index) = prev_level_entry; in trans_pgd_idmap_page()
266 pfn = virt_to_pfn(levels[this_level]); in trans_pgd_idmap_page()
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/
H A Dvmm.c123 ctrl->levels[i].physAddress = pd->pt[0]->addr; in r535_mmu_vaspace_new()
124 ctrl->levels[i].size = BIT_ULL(desc->bits) * desc->size; in r535_mmu_vaspace_new()
125 ctrl->levels[i].aperture = 1; in r535_mmu_vaspace_new()
126 ctrl->levels[i].pageShift = page_shift; in r535_mmu_vaspace_new()
/linux/arch/riscv/kernel/
H A Dcacheinfo.c84 int levels = 1, level = 1; in populate_cache_leaves() local
126 if (level <= levels) in populate_cache_leaves()
134 levels = level; in populate_cache_leaves()
/linux/arch/openrisc/kernel/
H A Dcacheinfo.c33 int leaves = 0, levels = 0; in init_cache_level() local
76 levels = 1; in init_cache_level()
79 this_cpu_ci->num_levels = levels; in init_cache_level()
/linux/Documentation/userspace-api/media/v4l/
H A Dpixfmt-srggb8-pisp-comp.rst43 In quantization mode 0, the lowest 321 quantization levels are multiples of
44 FSD/4096 and the remaining levels are successive multiples of FSD/2048.
65 levels, where the lowest 95 levels are multiples of FSD/256 and the
66 remaining levels are multiples of FSD/128 (level 175 represents values
/linux/tools/power/x86/intel-speed-select/
H A Disst-core.c204 if (level > pkg_dev.levels) { in isst_get_pbf_info()
244 if (level > pkg_dev.levels) { in isst_get_fact_info()
351 for (i = 0; i < pkg_dev->levels; ++i) { in isst_get_process_ctdp_complete()
381 pkg_dev->levels); in isst_get_process_ctdp()
383 if (tdp_level != 0xff && tdp_level > pkg_dev->levels) { in isst_get_process_ctdp()
391 for (i = 0; i <= pkg_dev->levels; ++i) { in isst_get_process_ctdp()
/linux/drivers/base/
H A Dcacheinfo.c45 * system-wide shared caches for all other levels. in cache_leaves_are_shared()
240 * overriding the architecturally specified levels, so in cache_of_set_props()
331 unsigned int levels = 0, leaves, level; in init_of_cache_level() local
339 levels = 1; in init_of_cache_level()
351 if (level <= levels) in init_of_cache_level()
355 levels = level; in init_of_cache_level()
358 this_cpu_ci->num_levels = levels; in init_of_cache_level()
526 unsigned int levels = 0, split_levels = 0; in fetch_cache_info() local
532 ret = acpi_get_cache_info(cpu, &levels, &split_levels); in fetch_cache_info()
534 this_cpu_ci->num_levels = levels; in fetch_cache_info()
[all...]
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dfiji_smumgr.c954 /* populate graphics levels */ in fiji_populate_single_graphic_level()
1014 struct SMU73_Discrete_GraphicsLevel *levels = in fiji_populate_all_graphic_levels() local
1025 &levels[i]); in fiji_populate_all_graphic_levels()
1031 levels[i].DeepSleepDivId = 0; in fiji_populate_all_graphic_levels()
1035 levels[0].EnabledForActivity = 1; in fiji_populate_all_graphic_levels()
1038 levels[dpm_table->sclk_table.count - 1].DisplayWatermark = in fiji_populate_all_graphic_levels()
1048 "There must be 1 or more PCIE levels defined in PPTable.", in fiji_populate_all_graphic_levels()
1052 levels[i].pcieDpmLevel = in fiji_populate_all_graphic_levels()
1077 levels[i].pcieDpmLevel = hightest_pcie_level_enabled; in fiji_populate_all_graphic_levels()
1080 levels[ in fiji_populate_all_graphic_levels()
1230 struct SMU73_Discrete_MemoryLevel *levels = fiji_populate_all_memory_levels() local
2554 struct SMU73_Discrete_GraphicsLevel *levels = fiji_update_dpm_settings() local
[all...]
/linux/Documentation/devicetree/bindings/hwmon/
H A Dnpcm750-pwm-fan.txt32 For PWM channel can be configured cooling-levels to create cooling device.
47 - cooling-levels: PWM duty cycle values in a range from 0 to 255
77 cooling-levels = <127 255>;
/linux/include/linux/
H A Dcacheinfo.h105 unsigned int *levels, unsigned int *split_levels) in acpi_get_cache_info() argument
111 unsigned int *levels, unsigned int *split_levels);
/linux/Documentation/firmware-guide/acpi/
H A Dvideo_extension.rst65 The first two levels are for when laptop are on AC or on battery and are
66 not used by Linux currently. The remaining 10 levels are supported levels
71 the range of available brightness levels is from 0 to 9 (max_brightness)
/linux/fs/qnx6/
H A Dinode.c214 pr_debug("inode_levels: %02x\n", sb->Inode.levels); in qnx6_superblock_debug()
409 /* sanity check - limit maximum indirect pointer levels */ in qnx6_fill_super()
410 if (sb1->Inode.levels > QNX6_PTR_MAX_LEVELS) { in qnx6_fill_super()
411 pr_err("too many inode levels (max %i, sb %i)\n", in qnx6_fill_super()
412 QNX6_PTR_MAX_LEVELS, sb1->Inode.levels); in qnx6_fill_super()
415 if (sb1->Longfile.levels > QNX6_PTR_MAX_LEVELS) { in qnx6_fill_super()
416 pr_err("too many longfilename levels (max %i, sb %i)\n", in qnx6_fill_super()
417 QNX6_PTR_MAX_LEVELS, sb1->Longfile.levels); in qnx6_fill_super()
504 ei->di_filelevels = p->levels; in qnx6_private_inode()

12345678910>>...19