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/linux/drivers/gpu/drm/radeon/
H A Drv730_dpm.c244 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state()
245 table->ACPIState.levels[0].gen2PCIE = pi->pcie_gen2 ? in rv730_populate_smc_acpi_state()
247 table->ACPIState.levels[0].gen2XSP = in rv730_populate_smc_acpi_state()
251 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state()
252 table->ACPIState.levels[0].gen2PCIE = 0; in rv730_populate_smc_acpi_state()
294 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl); in rv730_populate_smc_acpi_state()
295 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL2 = cpu_to_be32(mpll_func_cntl_2); in rv730_populate_smc_acpi_state()
296 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL3 = cpu_to_be32(mpll_func_cntl_3); in rv730_populate_smc_acpi_state()
297 table->ACPIState.levels[0].mclk.mclk730.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv730_populate_smc_acpi_state()
298 table->ACPIState.levels[0].mclk.mclk730.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv730_populate_smc_acpi_state()
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H A Drv740_dpm.c337 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state()
338 table->ACPIState.levels[0].gen2PCIE = in rv740_populate_smc_acpi_state()
341 table->ACPIState.levels[0].gen2XSP = in rv740_populate_smc_acpi_state()
345 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state()
346 table->ACPIState.levels[0].gen2PCIE = 0; in rv740_populate_smc_acpi_state()
376 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv740_populate_smc_acpi_state()
377 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv740_populate_smc_acpi_state()
378 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv740_populate_smc_acpi_state()
379 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv740_populate_smc_acpi_state()
380 table->ACPIState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv740_populate_smc_acpi_state()
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H A Dcypress_dpm.c778 &smc_state->levels[0], in cypress_convert_power_state_to_smc()
785 &smc_state->levels[1], in cypress_convert_power_state_to_smc()
792 &smc_state->levels[2], in cypress_convert_power_state_to_smc()
797 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in cypress_convert_power_state_to_smc()
798 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in cypress_convert_power_state_to_smc()
799 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3; in cypress_convert_power_state_to_smc()
802 smc_state->levels[0].ACIndex = 2; in cypress_convert_power_state_to_smc()
803 smc_state->levels[1].ACIndex = 3; in cypress_convert_power_state_to_smc()
804 smc_state->levels[2].ACIndex = 4; in cypress_convert_power_state_to_smc()
806 smc_state->levels[0].ACIndex = 0; in cypress_convert_power_state_to_smc()
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H A Dsumo_dpm.c345 u32 highest_engine_clock = ps->levels[ps->num_levels - 1].sclk; in sumo_program_bsp()
409 m_a = asi * ps->levels[i].sclk / 100; in sumo_program_at()
668 pi->boost_pl = new_ps->levels[new_ps->num_levels - 1]; in sumo_patch_boost_state()
760 sumo_program_power_level(rdev, &new_ps->levels[i], i); in sumo_program_power_levels_0_to_n()
842 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in sumo_set_uvd_clock_before_set_eng_clock()
843 current_ps->levels[current_ps->num_levels - 1].sclk) in sumo_set_uvd_clock_before_set_eng_clock()
860 if (new_ps->levels[new_ps->num_levels - 1].sclk < in sumo_set_uvd_clock_after_set_eng_clock()
861 current_ps->levels[current_ps->num_levels - 1].sclk) in sumo_set_uvd_clock_after_set_eng_clock()
1051 current_vddc = current_ps->levels[current_index].vddc_index; in sumo_patch_thermal_state()
1052 current_sclk = current_ps->levels[current_index].sclk; in sumo_patch_thermal_state()
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H A Drv770_dpm.c291 smc_state->levels[i].aT = cpu_to_be32(a_t); in rv770_populate_smc_t()
297 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].aT = in rv770_populate_smc_t()
311 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in rv770_populate_smc_sp()
313 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].bSP = in rv770_populate_smc_sp()
687 &smc_state->levels[0], in rv770_convert_power_state_to_smc()
694 &smc_state->levels[1], in rv770_convert_power_state_to_smc()
701 &smc_state->levels[2], in rv770_convert_power_state_to_smc()
706 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in rv770_convert_power_state_to_smc()
707 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in rv770_convert_power_state_to_smc()
708 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3; in rv770_convert_power_state_to_smc()
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H A Dtrinity_dpm.c801 trinity_program_power_level(rdev, &new_ps->levels[i], i); in trinity_program_power_levels_0_to_n()
921 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in trinity_set_uvd_clock_before_set_eng_clock()
922 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_before_set_eng_clock()
935 if (new_ps->levels[new_ps->num_levels - 1].sclk < in trinity_set_uvd_clock_after_set_eng_clock()
936 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_after_set_eng_clock()
1283 ps->levels[0] = pi->boot_pl; in trinity_patch_boot_state()
1306 pi->current_ps.levels[0] = pi->boot_pl; in trinity_construct_boot_state()
1361 current_vddc = current_ps->levels[current_index].vddc_index; in trinity_patch_thermal_state()
1362 current_sclk = current_ps->levels[current_index].sclk; in trinity_patch_thermal_state()
1368 ps->levels[0].vddc_index = current_vddc; in trinity_patch_thermal_state()
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/
H A Dr535.c71 ctrl->levels[0].physAddress = vmm->pd->pt[0]->addr; in r535_mmu_promote_vmm()
72 ctrl->levels[0].size = 0x20; in r535_mmu_promote_vmm()
73 ctrl->levels[0].aperture = 1; in r535_mmu_promote_vmm()
74 ctrl->levels[0].pageShift = 0x2f; in r535_mmu_promote_vmm()
75 ctrl->levels[1].physAddress = vmm->pd->pde[0]->pt[0]->addr; in r535_mmu_promote_vmm()
76 ctrl->levels[1].size = 0x1000; in r535_mmu_promote_vmm()
77 ctrl->levels[1].aperture = 1; in r535_mmu_promote_vmm()
78 ctrl->levels[1].pageShift = 0x26; in r535_mmu_promote_vmm()
80 ctrl->levels[2].physAddress = vmm->pd->pde[0]->pde[0]->pt[0]->addr; in r535_mmu_promote_vmm()
81 ctrl->levels[2].size = 0x1000; in r535_mmu_promote_vmm()
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/linux/drivers/video/backlight/
H A Dpwm_bl.c25 unsigned int *levels; member
80 if (pb->levels) in compute_duty_cycle()
81 duty_cycle = pb->levels[brightness]; in compute_duty_cycle()
197 data->levels = devm_kcalloc(dev, data->max_brightness, in pwm_backlight_brightness_default()
198 sizeof(*data->levels), GFP_KERNEL); in pwm_backlight_brightness_default()
199 if (!data->levels) in pwm_backlight_brightness_default()
209 data->levels[i] = (unsigned int)retval; in pwm_backlight_brightness_default()
255 data->levels = devm_kcalloc(dev, num_levels, in pwm_backlight_parse_dt()
256 sizeof(*data->levels), GFP_KERNEL); in pwm_backlight_parse_dt()
257 if (!data->levels) in pwm_backlight_parse_dt()
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H A Dled_bl.c20 unsigned int *levels; member
30 if (priv->levels) in led_bl_set_brightness()
31 bkl_brightness = priv->levels[level]; in led_bl_set_brightness()
138 u32 *levels = NULL; in led_bl_parse_levels() local
140 levels = devm_kzalloc(dev, sizeof(u32) * num_levels, in led_bl_parse_levels()
142 if (!levels) in led_bl_parse_levels()
146 levels, in led_bl_parse_levels()
157 if ((i && db > levels[i-1]) && db <= levels[i]) in led_bl_parse_levels()
162 priv->levels = levels; in led_bl_parse_levels()
H A Dmp3309c.c63 unsigned int *levels; member
128 chip->pdata->levels[brightness], in mp3309c_bl_update_status()
129 chip->pdata->levels[chip->pdata->max_brightness]); in mp3309c_bl_update_status()
261 pdata->levels = devm_kcalloc(dev, num_levels, sizeof(*pdata->levels), GFP_KERNEL); in mp3309c_parse_fwnode()
262 if (!pdata->levels) in mp3309c_parse_fwnode()
266 pdata->levels, num_levels); in mp3309c_parse_fwnode()
271 pdata->levels[i] = i; in mp3309c_parse_fwnode()
/linux/arch/powerpc/platforms/powernv/
H A Dpci-ioda-tce.c81 unsigned long size, unsigned int levels);
217 unsigned long size, unsigned int levels) in pnv_pci_ioda2_table_do_free_pages() argument
222 if (levels) { in pnv_pci_ioda2_table_do_free_pages()
233 levels - 1); in pnv_pci_ioda2_table_do_free_pages()
257 unsigned int levels, unsigned long limit, in pnv_pci_ioda2_table_do_alloc_pages() argument
268 --levels; in pnv_pci_ioda2_table_do_alloc_pages()
269 if (!levels) { in pnv_pci_ioda2_table_do_alloc_pages()
276 levels, limit, current_offset, total_allocated); in pnv_pci_ioda2_table_do_alloc_pages()
291 __u32 page_shift, __u64 window_size, __u32 levels, in pnv_pci_ioda2_table_alloc_pages() argument
303 if (!levels || (levels > POWERNV_IOMMU_MAX_LEVELS)) in pnv_pci_ioda2_table_alloc_pages()
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/linux/arch/mips/kernel/
H A Dcacheinfo.c24 int levels = 0, leaves = 0; in init_cache_level() local
31 levels += 1; in init_cache_level()
39 levels++; in init_cache_level()
44 levels++; in init_cache_level()
49 levels++; in init_cache_level()
53 this_cpu_ci->num_levels = levels; in init_cache_level()
/linux/Documentation/scheduler/
H A Dsched-nice-design.rst6 nice-levels implementation in the new Linux scheduler.
8 Nice levels were always pretty weak under Linux and people continuously
16 In the O(1) scheduler (in 2003) we changed negative nice levels to be
58 To sum it up: we always wanted to make nice levels more consistent, but
83 nice levels were not 'punchy enough', so lots of people had to resort to
90 To address the first complaint (of nice levels being not "punchy"
92 (and granularity was made a separate concept from nice levels) and thus
98 To address the second complaint (of nice levels not being consistent),
100 tasks, regardless of their absolute nice levels. So on the new
104 levels were changed to be "multiplicative" (or exponential) - that way
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/linux/drivers/acpi/
H A Dacpi_video.c231 if (vd->brightness->levels[i] == cur_level) in acpi_video_get_brightness()
244 vd->brightness->levels[request_level]); in acpi_video_set_brightness()
273 if (level == video->brightness->levels[offset]) { in video_get_cur_state()
291 level = video->brightness->levels[state - 1]; in video_set_cur_state()
309 union acpi_object **levels) in acpi_video_device_lcd_query_levels() argument
316 *levels = NULL; in acpi_video_device_lcd_query_levels()
328 *levels = obj; in acpi_video_device_lcd_query_levels()
354 if (level == device->brightness->levels[state]) { in acpi_video_device_lcd_set_level()
546 level = device->brightness->levels[bqc_value + in acpi_video_bqc_value_to_level()
583 if (device->brightness->levels[i] == *level) { in acpi_video_device_lcd_get_level_current()
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H A Dpptt.c197 unsigned int *levels, unsigned int *split_levels) in acpi_count_levels() argument
200 acpi_find_cache_level(table_hdr, cpu_node, levels, split_levels, 0, 0); in acpi_count_levels()
621 int acpi_get_cache_info(unsigned int cpu, unsigned int *levels, in acpi_get_cache_info() argument
628 *levels = 0; in acpi_get_cache_info()
643 acpi_count_levels(table, cpu_node, levels, split_levels); in acpi_get_cache_info()
646 *levels, split_levels ? *split_levels : -1); in acpi_get_cache_info()
/linux/arch/arm64/mm/
H A Dtrans_pgd.c241 unsigned long level_mask, prev_level_entry, *levels[4]; in trans_pgd_idmap_page() local
248 levels[this_level] = trans_alloc(info); in trans_pgd_idmap_page()
249 if (!levels[this_level]) in trans_pgd_idmap_page()
257 *(levels[this_level] + index) = prev_level_entry; in trans_pgd_idmap_page()
259 pfn = virt_to_pfn(levels[this_level]); in trans_pgd_idmap_page()
/linux/drivers/thermal/intel/int340x_thermal/
H A Dint3406_thermal.c60 acpi_level = d->br->levels[d->upper_limit - state]; in int3406_thermal_set_cur_state()
83 if (acpi_level <= d->br->levels[index]) in int3406_thermal_get_cur_state()
115 d->lower_limit = int3406_thermal_get_index(d->br->levels, in int3406_thermal_get_limit()
120 d->upper_limit = int3406_thermal_get_index(d->br->levels, in int3406_thermal_get_limit()
/linux/Documentation/arch/arm64/
H A Dmemory.rst8 Linux kernel. The architecture allows up to 4 levels of translation
9 tables with a 4KB page size and up to 3 levels with a 64KB page size.
11 AArch64 Linux uses either 3 levels or 4 levels of translation tables
14 64KB pages, only 2 levels of translation tables, allowing 42-bit (4TB)
27 AArch64 Linux memory layout with 4KB pages + 4 levels (48-bit)::
44 AArch64 Linux memory layout with 64KB pages + 3 levels (52-bit with HW support)::
/linux/Documentation/userspace-api/media/v4l/
H A Dpixfmt-srggb8-pisp-comp.rst42 In quantization mode 0, the lowest 321 quantization levels are multiples of
43 FSD/4096 and the remaining levels are successive multiples of FSD/2048.
64 levels, where the lowest 95 levels are multiples of FSD/256 and the
65 remaining levels are multiples of FSD/128 (level 175 represents values
/linux/tools/power/x86/intel-speed-select/
H A Disst-core.c204 if (level > pkg_dev.levels) { in isst_get_pbf_info()
244 if (level > pkg_dev.levels) { in isst_get_fact_info()
351 for (i = 0; i < pkg_dev->levels; ++i) { in isst_get_process_ctdp_complete()
381 pkg_dev->levels); in isst_get_process_ctdp()
383 if (tdp_level != 0xff && tdp_level > pkg_dev->levels) { in isst_get_process_ctdp()
391 for (i = 0; i <= pkg_dev->levels; ++i) { in isst_get_process_ctdp()
/linux/Documentation/ABI/
H A DREADME3 everchanging nature of Linux, and the differing maturity levels, these
6 We have four different levels of ABI stability, as shown by the four
7 different subdirectories in this location. Interfaces may change levels
10 The different levels of stability are:
69 How things move between levels:
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dfiji_smumgr.c1014 struct SMU73_Discrete_GraphicsLevel *levels = in fiji_populate_all_graphic_levels() local
1025 &levels[i]); in fiji_populate_all_graphic_levels()
1031 levels[i].DeepSleepDivId = 0; in fiji_populate_all_graphic_levels()
1035 levels[0].EnabledForActivity = 1; in fiji_populate_all_graphic_levels()
1038 levels[dpm_table->sclk_table.count - 1].DisplayWatermark = in fiji_populate_all_graphic_levels()
1052 levels[i].pcieDpmLevel = in fiji_populate_all_graphic_levels()
1077 levels[i].pcieDpmLevel = hightest_pcie_level_enabled; in fiji_populate_all_graphic_levels()
1080 levels[0].pcieDpmLevel = lowest_pcie_level_enabled; in fiji_populate_all_graphic_levels()
1083 levels[1].pcieDpmLevel = mid_pcie_level_enabled; in fiji_populate_all_graphic_levels()
1086 result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels, in fiji_populate_all_graphic_levels()
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/linux/Documentation/devicetree/bindings/hwmon/
H A Daspeed-pwm-tacho.txt34 For PWM port can be configured cooling-levels to create cooling device.
42 - cooling-levels: PWM duty cycle values in a range from 0 to 255
65 cooling-levels = /bits/ 8 <125 151 177 203 229 255>;
/linux/arch/arm64/include/asm/
H A Dkvm_arm.h210 #define VTCR_EL2_LVLS_TO_SL0(levels) \ argument
211 ((VTCR_EL2_TGRAN_SL0_BASE - (4 - (levels))) << VTCR_EL2_SL0_SHIFT)
283 #define ARM64_VTTBR_X(ipa, levels) ((ipa) - ((levels) * (PAGE_SHIFT - 3))) argument
/linux/include/linux/
H A Dcacheinfo.h105 unsigned int *levels, unsigned int *split_levels) in acpi_get_cache_info() argument
111 unsigned int *levels, unsigned int *split_levels);

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