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Searched refs:latch (Results 1 – 25 of 26) sorted by relevance

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/linux/Documentation/driver-api/surface_aggregator/clients/
H A Ddtx.rst58 The latch mechanism has two major states: *open* and *closed*. In the
62 The latch can additionally be locked and, correspondingly, unlocked, which
66 documentation for the detachment procedure below. By default, the latch is
82 instructions/commands. In case the latch is unlocked, the led will flash
83 green. If the latch has been locked, the led will be solid red
93 - If the latch is unlocked, the EC will open the latch and the clipboard
98 - If the latch is locked, the EC will *not* open the latch, meaning the
111 latch, after which the user can separate clipboard and base.
113 As this changes the latch state, a *latch-status* event
114 (``SDTX_EVENT_LATCH_STATUS``) will be sent once the latch has been opened
[all …]
/linux/drivers/clk/ti/
H A Dmux.c81 ti_clk_latch(&mux->reg, mux->latch); in ti_clk_mux_set_parent()
125 s8 latch, u8 clk_mux_flags, u32 *table) in _register_mux() argument
146 mux->latch = latch; in _register_mux()
175 s32 latch = -EINVAL; in of_mux_clk_setup() local
194 of_property_read_u32(node, "ti,latch-bit", &latch); in of_mux_clk_setup()
211 flags, &reg, shift, mask, latch, clk_mux_flags, in of_mux_clk_setup()
235 mux->latch = -EINVAL; in ti_clk_build_component_mux()
H A Dclk.c372 u32 latch; in ti_clk_latch() local
377 latch = 1 << shift; in ti_clk_latch()
379 ti_clk_ll_ops->clk_rmw(latch, latch, reg); in ti_clk_latch()
380 ti_clk_ll_ops->clk_rmw(0, latch, reg); in ti_clk_latch()
H A Ddivider.c263 ti_clk_latch(&divider->reg, divider->latch); in ti_clk_divider_set_rate()
485 div->latch = val; in ti_clk_divider_populate()
487 div->latch = -EINVAL; in ti_clk_divider_populate()
H A Dclock.h16 s8 latch; member
32 s8 latch; member
/linux/drivers/pcmcia/
H A Dtcic.c532 u_char latch, sstat; in tcic_interrupt() local
550 latch = sstat ^ socket_table[psock].last_sstat; in tcic_interrupt()
556 if (latch == 0) in tcic_interrupt()
558 events = (latch & TCIC_SSTAT_CD) ? SS_DETECT : 0; in tcic_interrupt()
559 events |= (latch & TCIC_SSTAT_WP) ? SS_WRPROT : 0; in tcic_interrupt()
561 events |= (latch & TCIC_SSTAT_LBAT1) ? SS_STSCHG : 0; in tcic_interrupt()
563 events |= (latch & TCIC_SSTAT_RDY) ? SS_READY : 0; in tcic_interrupt()
564 events |= (latch & TCIC_SSTAT_LBAT1) ? SS_BATDEAD : 0; in tcic_interrupt()
565 events |= (latch & TCIC_SSTAT_LBAT2) ? SS_BATWARN : 0; in tcic_interrupt()
/linux/drivers/clocksource/
H A Dtimer-ixp4xx.c48 u32 latch; member
138 val = tmr->latch & ~IXP4XX_OST_RELOAD_MASK; in ixp4xx_set_periodic()
180 tmr->latch = DIV_ROUND_CLOSEST(timer_freq, in ixp4xx_timer_register()
/linux/kernel/time/
H A Dclockevents.c32 static u64 cev_delta2ns(unsigned long latch, struct clock_event_device *evt, in cev_delta2ns() argument
35 u64 clc = (u64) latch << evt->shift; in cev_delta2ns()
46 if ((clc >> evt->shift) != (u64)latch) in cev_delta2ns()
85 u64 clockevent_delta2ns(unsigned long latch, struct clock_event_device *evt) in clockevent_delta2ns() argument
87 return cev_delta2ns(latch, evt, false); in clockevent_delta2ns()
/linux/Documentation/devicetree/bindings/mtd/
H A Dfsl-upm-nand.txt6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
H A Datmel-nand.txt125 - atmel,nand-addr-offset : offset for the address latch.
126 - atmel,nand-cmd-offset : offset for the command latch.
/linux/arch/arm/boot/dts/ti/omap/
H A Ddra76x.dtsi101 ti,latch-bit = <26>;
120 ti,latch-bit = <26>;
/linux/drivers/iio/imu/bmi270/
H A Dbmi270_core.c1341 bool active_high, bool open_drain, bool latch) in bmi270_int_pin_config() argument
1348 FIELD_PREP(BMI270_INT_LATCH_REG_MSK, latch)); in bmi270_int_pin_config()
1373 bool open_drain, active_high, latch; in bmi270_trigger_probe() local
1396 latch = false; in bmi270_trigger_probe()
1400 latch = true; in bmi270_trigger_probe()
1404 latch = false; in bmi270_trigger_probe()
1408 latch = true; in bmi270_trigger_probe()
1420 latch); in bmi270_trigger_probe()
/linux/drivers/platform/surface/
H A Dsurface_dtx.c319 u8 latch; in sdtx_ioctl_get_latch_status() local
324 status = ssam_retry(ssam_bas_get_latch_status, ddev->ctrl, &latch); in sdtx_ioctl_get_latch_status()
328 return put_user(sdtx_translate_latch_status(ddev, latch), buf); in sdtx_ioctl_get_latch_status()
878 u8 mode, latch; in sdtx_device_state_workfn() local
906 status = ssam_retry(ssam_bas_get_latch_status, ddev->ctrl, &latch); in sdtx_device_state_workfn()
929 __sdtx_device_state_update_latch(ddev, latch); in sdtx_device_state_workfn()
H A DKconfig162 necessary) unlocking and opening the latch connecting both parts.
/linux/Documentation/hwmon/
H A Dadm9240.rst178 a 20 ms active low pulse to reset an external Chassis Intrusion latch.
180 Clear the CI latch by writing value 0 to the sysfs intrusion0_alarm file.
200 that alarm bits may be cleared on read, user-space may latch alarms and
/linux/include/linux/
H A Dclockchips.h182 extern u64 clockevent_delta2ns(unsigned long latch, struct clock_event_device *evt);
/linux/Documentation/virt/kvm/devices/
H A Darm-vgic-v3.rst171 here is that of the latch which is set by ISPENDR and cleared by ICPENDR or
173 ISPENDR is the logical OR of the latch value and the input line level.
175 Raw access to the latch state is provided to userspace so that it can save
177 combination of the current input line level and the latch state, and cannot
/linux/kernel/printk/
H A Dprintk.c483 seqcount_latch_t latch; member
493 .latch = SEQCNT_LATCH_ZERO(clear_seq.latch),
541 write_seqcount_latch_begin(&ls->latch); in latched_seq_write()
543 write_seqcount_latch(&ls->latch); in latched_seq_write()
545 write_seqcount_latch_end(&ls->latch); in latched_seq_write()
556 seq = read_seqcount_latch(&ls->latch); in latched_seq_read_nolock()
559 } while (read_seqcount_latch_retry(&ls->latch, seq)); in latched_seq_read_nolock()
/linux/drivers/scsi/aic7xxx/
H A Daic7xxx.seq1144 * data fifo is full, but the PCI input latch is not empty,
1147 * there is space for the input latch to drain.
1598 mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
1732 mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
1762 mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
1768 mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
1977 mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
1993 mov NONE,SCSIDATL ret; /*dummy read from latch to ACK*/
2259 * module has an 8 byte input latch that only
2261 * latch is full.
H A Daic79xx.seq1078 mov NONE,SCSIDAT; /*dummy read from latch to ACK*/
1352 mov NONE,SCSIDAT; /*dummy read from latch to ACK*/
1433 mov NONE,SCSIDAT; /*dummy read from latch to ACK*/
1450 mov NONE,SCSIDAT ret; /*dummy read from latch to ACK*/
/linux/Documentation/driver-api/media/drivers/
H A Dradiotrack.rst70 | (+) | (-) | | Detect | Audio | (bit) | (latch) | Update |
/linux/Documentation/networking/device_drivers/hamradio/
H A Dz8530drv.rst86 vector 0 # latch for interrupt vector
130 - address of the vector latch (aka "intack port") for PA0HZP
131 cards. There can be only one vector latch for all chips!
/linux/Documentation/driver-api/
H A Dmtdnand.rst908 /* Select the command latch by setting CLE to high */
910 /* Deselect the command latch by setting CLE to low */
912 /* Select the address latch by setting ALE to high */
914 /* Deselect the address latch by setting ALE to low */
/linux/Documentation/networking/device_drivers/ethernet/3com/
H A D3c509.rst196 0x01 Interrupt latch
/linux/drivers/media/tuners/
H A Dmxl5005s.c3867 static int mxl5005s_writereg(struct dvb_frontend *fe, u8 reg, u8 val, int latch) in mxl5005s_writereg() argument
3874 if (latch == 0) in mxl5005s_writereg()

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