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Searched refs:lane_width (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dhwmgr_ppt.h97 uint8_t lane_width; member
H A Dvega10_hwmgr.c1285 bios_pcie_table->entries[i].lane_width); in vega10_setup_default_pcie_table()
4691 uint32_t gen_speed, lane_width, current_gen_speed, current_lane_width; in vega10_emit_clock_levels() local
4765 lane_width = pptable->PcieLaneCount[i]; in vega10_emit_clock_levels()
4772 (lane_width == 1) ? "x1" : in vega10_emit_clock_levels()
4773 (lane_width == 2) ? "x2" : in vega10_emit_clock_levels()
4774 (lane_width == 3) ? "x4" : in vega10_emit_clock_levels()
4775 (lane_width == 4) ? "x8" : in vega10_emit_clock_levels()
4776 (lane_width == 5) ? "x12" : in vega10_emit_clock_levels()
4777 (lane_width == 6) ? "x16" : "", in vega10_emit_clock_levels()
4779 (current_lane_width == lane_width) ? in vega10_emit_clock_levels()
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H A Dvega20_hwmgr.c3380 uint32_t gen_speed, lane_width, current_gen_speed, current_lane_width; in vega20_print_clock_levels() local
3474 lane_width = pptable->PcieLaneCount[i]; in vega20_print_clock_levels()
3481 (lane_width == 1) ? "x1" : in vega20_print_clock_levels()
3482 (lane_width == 2) ? "x2" : in vega20_print_clock_levels()
3483 (lane_width == 3) ? "x4" : in vega20_print_clock_levels()
3484 (lane_width == 4) ? "x8" : in vega20_print_clock_levels()
3485 (lane_width == 5) ? "x12" : in vega20_print_clock_levels()
3486 (lane_width == 6) ? "x16" : "", in vega20_print_clock_levels()
3489 (current_lane_width == lane_width) ? in vega20_print_clock_levels()
H A Dprocess_pptables_v1_0.c519 pcie_record->lane_width = le16_to_cpu(atom_pcie_record->usPCIELaneWidth); in get_pcie_table()
557 pcie_record->lane_width = le16_to_cpu(atom_pcie_record->usPCIELaneWidth); in get_pcie_table()
H A Dvega10_processpptables.c815 pcie_table->entries[i].lane_width = in get_pcie_table()
H A Dsmu7_hwmgr.c677 pcie_table->entries[i].lane_width)); in smu7_setup_default_pcie_table()
/linux/drivers/gpu/drm/radeon/
H A Dsi_dpm.c4637 u32 lane_width; in si_init_smc_table() local
4708 lane_width = radeon_get_pcie_lanes(rdev); in si_init_smc_table()
4709 si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width); in si_init_smc_table()
5854 u32 lane_width; in si_set_pcie_lane_width_in_smc() local
5862 lane_width = radeon_get_pcie_lanes(rdev); in si_set_pcie_lane_width_in_smc()
5863 si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width); in si_set_pcie_lane_width_in_smc()
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c5231 u32 lane_width; in si_init_smc_table() local
5302 lane_width = amdgpu_get_pcie_lanes(adev); in si_init_smc_table()
5303 si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width); in si_init_smc_table()
6432 u32 lane_width; in si_set_pcie_lane_width_in_smc() local
6440 lane_width = amdgpu_get_pcie_lanes(adev); in si_set_pcie_lane_width_in_smc()
6441 si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width); in si_set_pcie_lane_width_in_smc()