1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (C) 2020-2023 Loongson Technology Corporation Limited
4 */
5
6 #ifndef __ASM_LOONGARCH_KVM_HOST_H__
7 #define __ASM_LOONGARCH_KVM_HOST_H__
8
9 #include <linux/cpumask.h>
10 #include <linux/hrtimer.h>
11 #include <linux/interrupt.h>
12 #include <linux/kvm.h>
13 #include <linux/kvm_types.h>
14 #include <linux/mutex.h>
15 #include <linux/perf_event.h>
16 #include <linux/spinlock.h>
17 #include <linux/threads.h>
18 #include <linux/types.h>
19
20 #include <asm/inst.h>
21 #include <asm/kvm_mmu.h>
22 #include <asm/kvm_ipi.h>
23 #include <asm/kvm_eiointc.h>
24 #include <asm/kvm_pch_pic.h>
25 #include <asm/loongarch.h>
26
27 #define __KVM_HAVE_ARCH_INTC_INITIALIZED
28
29 /* Loongarch KVM register ids */
30 #define KVM_GET_IOC_CSR_IDX(id) ((id & KVM_CSR_IDX_MASK) >> LOONGARCH_REG_SHIFT)
31 #define KVM_GET_IOC_CPUCFG_IDX(id) ((id & KVM_CPUCFG_IDX_MASK) >> LOONGARCH_REG_SHIFT)
32
33 #define KVM_MAX_VCPUS 256
34 #define KVM_MAX_CPUCFG_REGS 21
35
36 #define KVM_HALT_POLL_NS_DEFAULT 500000
37 #define KVM_REQ_TLB_FLUSH_GPA KVM_ARCH_REQ(0)
38 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(1)
39 #define KVM_REQ_PMU KVM_ARCH_REQ(2)
40
41 #define KVM_GUESTDBG_SW_BP_MASK \
42 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP)
43 #define KVM_GUESTDBG_VALID_MASK \
44 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP | KVM_GUESTDBG_SINGLESTEP)
45
46 #define KVM_DIRTY_LOG_MANUAL_CAPS \
47 (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | KVM_DIRTY_LOG_INITIALLY_SET)
48
49 struct kvm_vm_stat {
50 struct kvm_vm_stat_generic generic;
51 u64 pages;
52 u64 hugepages;
53 };
54
55 struct kvm_vcpu_stat {
56 struct kvm_vcpu_stat_generic generic;
57 u64 int_exits;
58 u64 idle_exits;
59 u64 cpucfg_exits;
60 u64 signal_exits;
61 u64 hypercall_exits;
62 u64 ipi_read_exits;
63 u64 ipi_write_exits;
64 u64 eiointc_read_exits;
65 u64 eiointc_write_exits;
66 u64 pch_pic_read_exits;
67 u64 pch_pic_write_exits;
68 };
69
70 #define KVM_MEM_HUGEPAGE_CAPABLE (1UL << 0)
71 #define KVM_MEM_HUGEPAGE_INCAPABLE (1UL << 1)
72 struct kvm_arch_memory_slot {
73 unsigned long flags;
74 };
75
76 #define HOST_MAX_PMNUM 16
77 struct kvm_context {
78 unsigned long vpid_cache;
79 struct kvm_vcpu *last_vcpu;
80 /* Host PMU CSR */
81 u64 perf_ctrl[HOST_MAX_PMNUM];
82 u64 perf_cntr[HOST_MAX_PMNUM];
83 };
84
85 struct kvm_world_switch {
86 int (*exc_entry)(void);
87 int (*enter_guest)(struct kvm_run *run, struct kvm_vcpu *vcpu);
88 unsigned long page_order;
89 };
90
91 #define MAX_PGTABLE_LEVELS 4
92
93 /*
94 * Physical CPUID is used for interrupt routing, there are different
95 * definitions about physical cpuid on different hardwares.
96 *
97 * For LOONGARCH_CSR_CPUID register, max CPUID size if 512
98 * For IPI hardware, max destination CPUID size 1024
99 * For eiointc interrupt controller, max destination CPUID size is 256
100 * For msgint interrupt controller, max supported CPUID size is 65536
101 *
102 * Currently max CPUID is defined as 256 for KVM hypervisor, in future
103 * it will be expanded to 4096, including 16 packages at most. And every
104 * package supports at most 256 vcpus
105 */
106 #define KVM_MAX_PHYID 256
107
108 struct kvm_phyid_info {
109 struct kvm_vcpu *vcpu;
110 bool enabled;
111 };
112
113 struct kvm_phyid_map {
114 int max_phyid;
115 struct kvm_phyid_info phys_map[KVM_MAX_PHYID];
116 };
117
118 struct kvm_arch {
119 /* Guest physical mm */
120 kvm_pte_t *pgd;
121 unsigned long gpa_size;
122 unsigned long invalid_ptes[MAX_PGTABLE_LEVELS];
123 unsigned int pte_shifts[MAX_PGTABLE_LEVELS];
124 unsigned int root_level;
125 spinlock_t phyid_map_lock;
126 struct kvm_phyid_map *phyid_map;
127 /* Enabled PV features */
128 unsigned long pv_features;
129 /* Supported KVM features */
130 unsigned long kvm_features;
131
132 s64 time_offset;
133 struct kvm_context __percpu *vmcs;
134 struct loongarch_ipi *ipi;
135 struct loongarch_eiointc *eiointc;
136 struct loongarch_pch_pic *pch_pic;
137 };
138
139 #define CSR_MAX_NUMS 0x800
140
141 struct loongarch_csrs {
142 unsigned long csrs[CSR_MAX_NUMS];
143 };
144
145 /* Resume Flags */
146 #define RESUME_HOST 0
147 #define RESUME_GUEST 1
148
149 enum emulation_result {
150 EMULATE_DONE, /* no further processing */
151 EMULATE_DO_MMIO, /* kvm_run filled with MMIO request */
152 EMULATE_DO_IOCSR, /* handle IOCSR request */
153 EMULATE_FAIL, /* can't emulate this instruction */
154 EMULATE_EXCEPT, /* A guest exception has been generated */
155 };
156
157 #define KVM_LARCH_FPU (0x1 << 0)
158 #define KVM_LARCH_LSX (0x1 << 1)
159 #define KVM_LARCH_LASX (0x1 << 2)
160 #define KVM_LARCH_LBT (0x1 << 3)
161 #define KVM_LARCH_PMU (0x1 << 4)
162 #define KVM_LARCH_SWCSR_LATEST (0x1 << 5)
163 #define KVM_LARCH_HWCSR_USABLE (0x1 << 6)
164
165 #define LOONGARCH_PV_FEAT_UPDATED BIT_ULL(63)
166 #define LOONGARCH_PV_FEAT_MASK (BIT(KVM_FEATURE_IPI) | \
167 BIT(KVM_FEATURE_STEAL_TIME) | \
168 BIT(KVM_FEATURE_USER_HCALL) | \
169 BIT(KVM_FEATURE_VIRT_EXTIOI))
170
171 struct kvm_vcpu_arch {
172 /*
173 * Switch pointer-to-function type to unsigned long
174 * for loading the value into register directly.
175 */
176 unsigned long host_eentry;
177 unsigned long guest_eentry;
178
179 /* Pointers stored here for easy accessing from assembly code */
180 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
181
182 /* GPA (=HVA) of PGD for secondary mmu */
183 unsigned long kvm_pgd;
184
185 /* Host registers preserved across guest mode execution */
186 unsigned long host_sp;
187 unsigned long host_tp;
188 unsigned long host_pgd;
189
190 /* Host CSRs are used when handling exits from guest */
191 unsigned long badi;
192 unsigned long badv;
193 unsigned long host_ecfg;
194 unsigned long host_estat;
195 unsigned long host_percpu;
196
197 /* GPRs */
198 unsigned long gprs[32];
199 unsigned long pc;
200
201 /* Which auxiliary state is loaded (KVM_LARCH_*) */
202 unsigned int aux_inuse;
203
204 /* FPU state */
205 struct loongarch_fpu fpu FPU_ALIGN;
206 struct loongarch_lbt lbt;
207
208 /* CSR state */
209 struct loongarch_csrs *csr;
210
211 /* Guest max PMU CSR id */
212 int max_pmu_csrid;
213
214 /* GPR used as IO source/target */
215 u32 io_gpr;
216
217 /* KVM register to control count timer */
218 u32 count_ctl;
219 struct hrtimer swtimer;
220
221 /* Bitmask of intr that are pending */
222 unsigned long irq_pending;
223 /* Bitmask of pending intr to be cleared */
224 unsigned long irq_clear;
225
226 /* Bitmask of exceptions that are pending */
227 unsigned long exception_pending;
228 unsigned int esubcode;
229
230 /* Cache for pages needed inside spinlock regions */
231 struct kvm_mmu_memory_cache mmu_page_cache;
232
233 /* vcpu's vpid */
234 u64 vpid;
235 gpa_t flush_gpa;
236
237 /* Frequency of stable timer in Hz */
238 u64 timer_mhz;
239 ktime_t expire;
240
241 /* Last CPU the vCPU state was loaded on */
242 int last_sched_cpu;
243 /* mp state */
244 struct kvm_mp_state mp_state;
245 /* ipi state */
246 struct ipi_state ipi_state;
247 /* cpucfg */
248 u32 cpucfg[KVM_MAX_CPUCFG_REGS];
249
250 /* paravirt steal time */
251 struct {
252 u64 guest_addr;
253 u64 last_steal;
254 struct gfn_to_hva_cache cache;
255 } st;
256 };
257
readl_sw_gcsr(struct loongarch_csrs * csr,int reg)258 static inline unsigned long readl_sw_gcsr(struct loongarch_csrs *csr, int reg)
259 {
260 return csr->csrs[reg];
261 }
262
writel_sw_gcsr(struct loongarch_csrs * csr,int reg,unsigned long val)263 static inline void writel_sw_gcsr(struct loongarch_csrs *csr, int reg, unsigned long val)
264 {
265 csr->csrs[reg] = val;
266 }
267
kvm_guest_has_fpu(struct kvm_vcpu_arch * arch)268 static inline bool kvm_guest_has_fpu(struct kvm_vcpu_arch *arch)
269 {
270 return arch->cpucfg[2] & CPUCFG2_FP;
271 }
272
kvm_guest_has_lsx(struct kvm_vcpu_arch * arch)273 static inline bool kvm_guest_has_lsx(struct kvm_vcpu_arch *arch)
274 {
275 return arch->cpucfg[2] & CPUCFG2_LSX;
276 }
277
kvm_guest_has_lasx(struct kvm_vcpu_arch * arch)278 static inline bool kvm_guest_has_lasx(struct kvm_vcpu_arch *arch)
279 {
280 return arch->cpucfg[2] & CPUCFG2_LASX;
281 }
282
kvm_guest_has_lbt(struct kvm_vcpu_arch * arch)283 static inline bool kvm_guest_has_lbt(struct kvm_vcpu_arch *arch)
284 {
285 return arch->cpucfg[2] & (CPUCFG2_X86BT | CPUCFG2_ARMBT | CPUCFG2_MIPSBT);
286 }
287
kvm_guest_has_pmu(struct kvm_vcpu_arch * arch)288 static inline bool kvm_guest_has_pmu(struct kvm_vcpu_arch *arch)
289 {
290 return arch->cpucfg[6] & CPUCFG6_PMP;
291 }
292
kvm_get_pmu_num(struct kvm_vcpu_arch * arch)293 static inline int kvm_get_pmu_num(struct kvm_vcpu_arch *arch)
294 {
295 return (arch->cpucfg[6] & CPUCFG6_PMNUM) >> CPUCFG6_PMNUM_SHIFT;
296 }
297
298 /* Check whether KVM support this feature (VMM may disable it) */
kvm_vm_support(struct kvm_arch * arch,int feature)299 static inline bool kvm_vm_support(struct kvm_arch *arch, int feature)
300 {
301 return !!(arch->kvm_features & BIT_ULL(feature));
302 }
303
304 bool kvm_arch_pmi_in_guest(struct kvm_vcpu *vcpu);
305
306 /* Debug: dump vcpu state */
307 int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu);
308
309 /* MMU handling */
310 void kvm_flush_tlb_all(void);
311 void kvm_flush_tlb_gpa(struct kvm_vcpu *vcpu, unsigned long gpa);
312 int kvm_handle_mm_fault(struct kvm_vcpu *vcpu, unsigned long badv, bool write, int ecode);
313
314 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end, bool blockable);
315 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
316 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
317
update_pc(struct kvm_vcpu_arch * arch)318 static inline void update_pc(struct kvm_vcpu_arch *arch)
319 {
320 arch->pc += 4;
321 }
322
323 /*
324 * kvm_is_ifetch_fault() - Find whether a TLBL exception is due to ifetch fault.
325 * @vcpu: Virtual CPU.
326 *
327 * Returns: Whether the TLBL exception was likely due to an instruction
328 * fetch fault rather than a data load fault.
329 */
kvm_is_ifetch_fault(struct kvm_vcpu_arch * arch)330 static inline bool kvm_is_ifetch_fault(struct kvm_vcpu_arch *arch)
331 {
332 return arch->pc == arch->badv;
333 }
334
335 /* Misc */
kvm_arch_hardware_unsetup(void)336 static inline void kvm_arch_hardware_unsetup(void) {}
kvm_arch_memslots_updated(struct kvm * kvm,u64 gen)337 static inline void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen) {}
kvm_arch_vcpu_blocking(struct kvm_vcpu * vcpu)338 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {}
kvm_arch_vcpu_unblocking(struct kvm_vcpu * vcpu)339 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {}
kvm_arch_vcpu_block_finish(struct kvm_vcpu * vcpu)340 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
kvm_arch_free_memslot(struct kvm * kvm,struct kvm_memory_slot * slot)341 static inline void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot) {}
342 void kvm_check_vpid(struct kvm_vcpu *vcpu);
343 enum hrtimer_restart kvm_swtimer_wakeup(struct hrtimer *timer);
344 void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm, const struct kvm_memory_slot *memslot);
345 void kvm_init_vmcs(struct kvm *kvm);
346 void kvm_exc_entry(void);
347 int kvm_enter_guest(struct kvm_run *run, struct kvm_vcpu *vcpu);
348
349 extern unsigned long vpid_mask;
350 extern const unsigned long kvm_exception_size;
351 extern const unsigned long kvm_enter_guest_size;
352 extern struct kvm_world_switch *kvm_loongarch_ops;
353
354 #define SW_GCSR (1 << 0)
355 #define HW_GCSR (1 << 1)
356 #define INVALID_GCSR (1 << 2)
357
358 int get_gcsr_flag(int csr);
359 void set_hw_gcsr(int csr_id, unsigned long val);
360
361 #endif /* __ASM_LOONGARCH_KVM_HOST_H__ */
362