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Searched refs:ixUVD_CGC_MEM_CTRL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Duvd_v3_1.c611 data = RREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL); in uvd_v3_1_enable_mgcg()
613 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v3_1_enable_mgcg()
620 data = RREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL); in uvd_v3_1_enable_mgcg()
622 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v3_1_enable_mgcg()
/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_4_0_d.h27 #define ixUVD_CGC_MEM_CTRL 0x00C0 macro
H A Duvd_4_2_d.h86 #define ixUVD_CGC_MEM_CTRL 0xc0 macro
H A Duvd_3_1_d.h88 #define ixUVD_CGC_MEM_CTRL 0xc0 macro
H A Duvd_5_0_d.h97 #define ixUVD_CGC_MEM_CTRL 0xc0 macro
H A Duvd_6_0_d.h113 #define ixUVD_CGC_MEM_CTRL 0xc0 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_3_0_0_offset.h1509 #define ixUVD_CGC_MEM_CTRL … macro
H A Dvcn_5_0_0_offset.h1646 #define ixUVD_CGC_MEM_CTRL … macro
H A Dvcn_4_0_0_offset.h1984 #define ixUVD_CGC_MEM_CTRL … macro