1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /*
3 * Copyright (C) 2012-2014, 2018-2025 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
6 */
7 #include <net/mac80211.h>
8 #include <linux/netdevice.h>
9 #include <linux/dmi.h>
10
11 #include "iwl-trans.h"
12 #include "iwl-op-mode.h"
13 #include "fw/img.h"
14 #include "iwl-debug.h"
15 #include "iwl-prph.h"
16 #include "fw/acpi.h"
17 #include "fw/pnvm.h"
18 #include "fw/uefi.h"
19 #include "fw/regulatory.h"
20
21 #include "mvm.h"
22 #include "fw/dbg.h"
23 #include "iwl-phy-db.h"
24 #include "iwl-modparams.h"
25 #include "iwl-nvm-parse.h"
26 #include "time-sync.h"
27
28 #define MVM_UCODE_ALIVE_TIMEOUT (2 * HZ)
29 #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ)
30
31 struct iwl_mvm_alive_data {
32 bool valid;
33 u32 scd_base_addr;
34 };
35
iwl_send_tx_ant_cfg(struct iwl_mvm * mvm,u8 valid_tx_ant)36 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
37 {
38 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
39 .valid = cpu_to_le32(valid_tx_ant),
40 };
41
42 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
43 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
44 sizeof(tx_ant_cmd), &tx_ant_cmd);
45 }
46
iwl_send_rss_cfg_cmd(struct iwl_mvm * mvm)47 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
48 {
49 int i;
50 struct iwl_rss_config_cmd cmd = {
51 .flags = cpu_to_le32(IWL_RSS_ENABLE),
52 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
53 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
54 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
55 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
56 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
57 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
58 };
59
60 if (mvm->trans->num_rx_queues == 1)
61 return 0;
62
63 /* Do not direct RSS traffic to Q 0 which is our fallback queue */
64 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
65 cmd.indirection_table[i] =
66 1 + (i % (mvm->trans->num_rx_queues - 1));
67 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
68
69 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
70 }
71
iwl_mvm_send_dqa_cmd(struct iwl_mvm * mvm)72 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
73 {
74 struct iwl_dqa_enable_cmd dqa_cmd = {
75 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
76 };
77 u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD);
78 int ret;
79
80 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
81 if (ret)
82 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
83 else
84 IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
85
86 return ret;
87 }
88
iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm * mvm,struct iwl_rx_cmd_buffer * rxb)89 void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
90 struct iwl_rx_cmd_buffer *rxb)
91 {
92 struct iwl_rx_packet *pkt = rxb_addr(rxb);
93 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
94
95 if (mfu_dump_notif->index_num == 0)
96 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
97 le32_to_cpu(mfu_dump_notif->assert_id));
98 }
99
iwl_alive_fn(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)100 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
101 struct iwl_rx_packet *pkt, void *data)
102 {
103 unsigned int pkt_len = iwl_rx_packet_payload_len(pkt);
104 struct iwl_mvm *mvm =
105 container_of(notif_wait, struct iwl_mvm, notif_wait);
106 struct iwl_mvm_alive_data *alive_data = data;
107 struct iwl_umac_alive *umac;
108 struct iwl_lmac_alive *lmac1;
109 struct iwl_lmac_alive *lmac2 = NULL;
110 u16 status;
111 u32 lmac_error_event_table, umac_error_table;
112 u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP,
113 UCODE_ALIVE_NTFY, 0);
114 u32 i;
115
116
117 if (version == 6) {
118 struct iwl_alive_ntf_v6 *palive;
119
120 if (pkt_len < sizeof(*palive))
121 return false;
122
123 palive = (void *)pkt->data;
124 mvm->trans->dbg.imr_data.imr_enable =
125 le32_to_cpu(palive->imr.enabled);
126 mvm->trans->dbg.imr_data.imr_size =
127 le32_to_cpu(palive->imr.size);
128 mvm->trans->dbg.imr_data.imr2sram_remainbyte =
129 mvm->trans->dbg.imr_data.imr_size;
130 mvm->trans->dbg.imr_data.imr_base_addr =
131 palive->imr.base_addr;
132 mvm->trans->dbg.imr_data.imr_curr_addr =
133 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr);
134 IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x size 0x0%x Address 0x%016llx\n",
135 mvm->trans->dbg.imr_data.imr_enable,
136 mvm->trans->dbg.imr_data.imr_size,
137 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr));
138
139 if (!mvm->trans->dbg.imr_data.imr_enable) {
140 for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) {
141 struct iwl_ucode_tlv *reg_tlv;
142 struct iwl_fw_ini_region_tlv *reg;
143
144 reg_tlv = mvm->trans->dbg.active_regions[i];
145 if (!reg_tlv)
146 continue;
147
148 reg = (void *)reg_tlv->data;
149 /*
150 * We have only one DRAM IMR region, so we
151 * can break as soon as we find the first
152 * one.
153 */
154 if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) {
155 mvm->trans->dbg.unsupported_region_msk |= BIT(i);
156 break;
157 }
158 }
159 }
160 }
161
162 if (version >= 5) {
163 struct iwl_alive_ntf_v5 *palive;
164
165 if (pkt_len < sizeof(*palive))
166 return false;
167
168 palive = (void *)pkt->data;
169 umac = &palive->umac_data;
170 lmac1 = &palive->lmac_data[0];
171 lmac2 = &palive->lmac_data[1];
172 status = le16_to_cpu(palive->status);
173
174 mvm->trans->sku_id[0] = le32_to_cpu(palive->sku_id.data[0]);
175 mvm->trans->sku_id[1] = le32_to_cpu(palive->sku_id.data[1]);
176 mvm->trans->sku_id[2] = le32_to_cpu(palive->sku_id.data[2]);
177
178 IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n",
179 mvm->trans->sku_id[0],
180 mvm->trans->sku_id[1],
181 mvm->trans->sku_id[2]);
182 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(struct iwl_alive_ntf_v4)) {
183 struct iwl_alive_ntf_v4 *palive;
184
185 if (pkt_len < sizeof(*palive))
186 return false;
187
188 palive = (void *)pkt->data;
189 umac = &palive->umac_data;
190 lmac1 = &palive->lmac_data[0];
191 lmac2 = &palive->lmac_data[1];
192 status = le16_to_cpu(palive->status);
193 } else if (iwl_rx_packet_payload_len(pkt) ==
194 sizeof(struct iwl_alive_ntf_v3)) {
195 struct iwl_alive_ntf_v3 *palive3;
196
197 if (pkt_len < sizeof(*palive3))
198 return false;
199
200 palive3 = (void *)pkt->data;
201 umac = &palive3->umac_data;
202 lmac1 = &palive3->lmac_data;
203 status = le16_to_cpu(palive3->status);
204 } else {
205 WARN(1, "unsupported alive notification (size %d)\n",
206 iwl_rx_packet_payload_len(pkt));
207 /* get timeout later */
208 return false;
209 }
210
211 lmac_error_event_table =
212 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
213 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
214
215 if (lmac2)
216 mvm->trans->dbg.lmac_error_event_table[1] =
217 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
218
219 umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) &
220 ~FW_ADDR_CACHE_CONTROL;
221
222 if (umac_error_table) {
223 if (umac_error_table >=
224 mvm->trans->cfg->min_umac_error_event_table) {
225 iwl_fw_umac_set_alive_err_table(mvm->trans,
226 umac_error_table);
227 } else {
228 IWL_ERR(mvm,
229 "Not valid error log pointer 0x%08X for %s uCode\n",
230 umac_error_table,
231 (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
232 "Init" : "RT");
233 }
234 }
235
236 alive_data->scd_base_addr = le32_to_cpu(lmac1->dbg_ptrs.scd_base_ptr);
237 alive_data->valid = status == IWL_ALIVE_STATUS_OK;
238
239 IWL_DEBUG_FW(mvm,
240 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
241 status, lmac1->ver_type, lmac1->ver_subtype);
242
243 if (lmac2)
244 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
245
246 IWL_DEBUG_FW(mvm,
247 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
248 le32_to_cpu(umac->umac_major),
249 le32_to_cpu(umac->umac_minor));
250
251 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
252
253 return true;
254 }
255
iwl_wait_init_complete(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)256 static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
257 struct iwl_rx_packet *pkt, void *data)
258 {
259 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
260
261 return true;
262 }
263
iwl_wait_phy_db_entry(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)264 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
265 struct iwl_rx_packet *pkt, void *data)
266 {
267 struct iwl_phy_db *phy_db = data;
268
269 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
270 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
271 return true;
272 }
273
274 WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
275
276 return false;
277 }
278
iwl_mvm_print_pd_notification(struct iwl_mvm * mvm)279 static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm)
280 {
281 #define IWL_FW_PRINT_REG_INFO(reg_name) \
282 IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name))
283
284 struct iwl_trans *trans = mvm->trans;
285 enum iwl_device_family device_family = trans->trans_cfg->device_family;
286
287 if (device_family < IWL_DEVICE_FAMILY_8000)
288 return;
289
290 if (device_family <= IWL_DEVICE_FAMILY_9000)
291 IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION);
292 else
293 IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION);
294
295 IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE);
296
297 /* print OPT info */
298 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR);
299 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA);
300 }
301
iwl_mvm_load_ucode_wait_alive(struct iwl_mvm * mvm,enum iwl_ucode_type ucode_type)302 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
303 enum iwl_ucode_type ucode_type)
304 {
305 struct iwl_notification_wait alive_wait;
306 struct iwl_mvm_alive_data alive_data = {};
307 const struct fw_img *fw;
308 int ret;
309 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
310 static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY };
311 bool run_in_rfkill =
312 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
313 u8 count;
314 struct iwl_pc_data *pc_data;
315
316 if (ucode_type == IWL_UCODE_REGULAR &&
317 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
318 !(fw_has_capa(&mvm->fw->ucode_capa,
319 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
320 fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
321 else
322 fw = iwl_get_ucode_image(mvm->fw, ucode_type);
323 if (WARN_ON(!fw))
324 return -EINVAL;
325 iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
326 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
327
328 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
329 alive_cmd, ARRAY_SIZE(alive_cmd),
330 iwl_alive_fn, &alive_data);
331
332 /*
333 * We want to load the INIT firmware even in RFKILL
334 * For the unified firmware case, the ucode_type is not
335 * INIT, but we still need to run it.
336 */
337 ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill);
338 if (ret) {
339 iwl_fw_set_current_image(&mvm->fwrt, old_type);
340 iwl_remove_notification(&mvm->notif_wait, &alive_wait);
341 return ret;
342 }
343
344 /*
345 * Some things may run in the background now, but we
346 * just wait for the ALIVE notification here.
347 */
348 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
349 MVM_UCODE_ALIVE_TIMEOUT);
350
351 if (mvm->trans->trans_cfg->device_family ==
352 IWL_DEVICE_FAMILY_AX210) {
353 /* print these registers regardless of alive fail/success */
354 IWL_INFO(mvm, "WFPM_UMAC_PD_NOTIFICATION: 0x%x\n",
355 iwl_read_umac_prph(mvm->trans, WFPM_ARC1_PD_NOTIFICATION));
356 IWL_INFO(mvm, "WFPM_LMAC2_PD_NOTIFICATION: 0x%x\n",
357 iwl_read_umac_prph(mvm->trans, WFPM_LMAC2_PD_NOTIFICATION));
358 IWL_INFO(mvm, "WFPM_AUTH_KEY_0: 0x%x\n",
359 iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG));
360 IWL_INFO(mvm, "CNVI_SCU_SEQ_DATA_DW9: 0x%x\n",
361 iwl_read_prph(mvm->trans, CNVI_SCU_SEQ_DATA_DW9));
362 }
363
364 if (ret) {
365 struct iwl_trans *trans = mvm->trans;
366
367 /* SecBoot info */
368 if (trans->trans_cfg->device_family >=
369 IWL_DEVICE_FAMILY_22000) {
370 IWL_ERR(mvm,
371 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
372 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
373 iwl_read_umac_prph(trans,
374 UMAG_SB_CPU_2_STATUS));
375 } else if (trans->trans_cfg->device_family >=
376 IWL_DEVICE_FAMILY_8000) {
377 IWL_ERR(mvm,
378 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
379 iwl_read_prph(trans, SB_CPU_1_STATUS),
380 iwl_read_prph(trans, SB_CPU_2_STATUS));
381 }
382
383 iwl_mvm_print_pd_notification(mvm);
384
385 /* LMAC/UMAC PC info */
386 if (trans->trans_cfg->device_family >=
387 IWL_DEVICE_FAMILY_22000) {
388 pc_data = trans->dbg.pc_data;
389 for (count = 0; count < trans->dbg.num_pc;
390 count++, pc_data++)
391 IWL_ERR(mvm, "%s: 0x%x\n",
392 pc_data->pc_name,
393 pc_data->pc_address);
394 } else if (trans->trans_cfg->device_family >=
395 IWL_DEVICE_FAMILY_9000) {
396 IWL_ERR(mvm, "UMAC PC: 0x%x\n",
397 iwl_read_umac_prph(trans,
398 UREG_UMAC_CURRENT_PC));
399 IWL_ERR(mvm, "LMAC PC: 0x%x\n",
400 iwl_read_umac_prph(trans,
401 UREG_LMAC1_CURRENT_PC));
402 if (iwl_mvm_is_cdb_supported(mvm))
403 IWL_ERR(mvm, "LMAC2 PC: 0x%x\n",
404 iwl_read_umac_prph(trans,
405 UREG_LMAC2_CURRENT_PC));
406 }
407
408 if (ret == -ETIMEDOUT && !mvm->fw_product_reset)
409 iwl_fw_dbg_error_collect(&mvm->fwrt,
410 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
411
412 iwl_fw_set_current_image(&mvm->fwrt, old_type);
413 return ret;
414 }
415
416 if (!alive_data.valid) {
417 IWL_ERR(mvm, "Loaded ucode is not valid!\n");
418 iwl_fw_set_current_image(&mvm->fwrt, old_type);
419 return -EIO;
420 }
421
422 /* if reached this point, Alive notification was received */
423 iwl_mei_alive_notif(true);
424
425 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
426
427 ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait,
428 &mvm->fw->ucode_capa);
429 if (ret) {
430 IWL_ERR(mvm, "Timeout waiting for PNVM load!\n");
431 iwl_fw_set_current_image(&mvm->fwrt, old_type);
432 return ret;
433 }
434
435 /*
436 * Note: all the queues are enabled as part of the interface
437 * initialization, but in firmware restart scenarios they
438 * could be stopped, so wake them up. In firmware restart,
439 * mac80211 will have the queues stopped as well until the
440 * reconfiguration completes. During normal startup, they
441 * will be empty.
442 */
443
444 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
445 /*
446 * Set a 'fake' TID for the command queue, since we use the
447 * hweight() of the tid_bitmap as a refcount now. Not that
448 * we ever even consider the command queue as one we might
449 * want to reuse, but be safe nevertheless.
450 */
451 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
452 BIT(IWL_MAX_TID_COUNT + 2);
453
454 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
455 #ifdef CONFIG_IWLWIFI_DEBUGFS
456 iwl_fw_set_dbg_rec_on(&mvm->fwrt);
457 #endif
458
459 /*
460 * For pre-MLD API (MLD API doesn't use the timestamps):
461 * All the BSSes in the BSS table include the GP2 in the system
462 * at the beacon Rx time, this is of course no longer relevant
463 * since we are resetting the firmware.
464 * Purge all the BSS table.
465 */
466 if (!mvm->mld_api_is_used)
467 cfg80211_bss_flush(mvm->hw->wiphy);
468
469 return 0;
470 }
471
iwl_mvm_phy_filter_init(struct iwl_mvm * mvm,struct iwl_phy_specific_cfg * phy_filters)472 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
473 struct iwl_phy_specific_cfg *phy_filters)
474 {
475 #ifdef CONFIG_ACPI
476 *phy_filters = mvm->phy_filters;
477 #endif /* CONFIG_ACPI */
478 }
479
iwl_mvm_uats_init(struct iwl_mvm * mvm)480 static void iwl_mvm_uats_init(struct iwl_mvm *mvm)
481 {
482 u8 cmd_ver;
483 int ret;
484 struct iwl_host_cmd cmd = {
485 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
486 MCC_ALLOWED_AP_TYPE_CMD),
487 .flags = 0,
488 .data[0] = &mvm->fwrt.uats_table,
489 .len[0] = sizeof(mvm->fwrt.uats_table),
490 .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
491 };
492
493 if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210) {
494 IWL_DEBUG_RADIO(mvm, "UATS feature is not supported\n");
495 return;
496 }
497
498 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
499 IWL_FW_CMD_VER_UNKNOWN);
500 if (cmd_ver != 1) {
501 IWL_DEBUG_RADIO(mvm,
502 "MCC_ALLOWED_AP_TYPE_CMD ver %d not supported\n",
503 cmd_ver);
504 return;
505 }
506
507 ret = iwl_uefi_get_uats_table(mvm->trans, &mvm->fwrt);
508 if (ret < 0) {
509 IWL_DEBUG_FW(mvm, "failed to read UATS table (%d)\n", ret);
510 return;
511 }
512
513 ret = iwl_mvm_send_cmd(mvm, &cmd);
514 if (ret < 0)
515 IWL_ERR(mvm, "failed to send MCC_ALLOWED_AP_TYPE_CMD (%d)\n",
516 ret);
517 else
518 IWL_DEBUG_RADIO(mvm, "MCC_ALLOWED_AP_TYPE_CMD sent to FW\n");
519 }
520
iwl_mvm_sgom_init(struct iwl_mvm * mvm)521 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm)
522 {
523 u8 cmd_ver;
524 int ret;
525 struct iwl_host_cmd cmd = {
526 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
527 SAR_OFFSET_MAPPING_TABLE_CMD),
528 .flags = 0,
529 .data[0] = &mvm->fwrt.sgom_table,
530 .len[0] = sizeof(mvm->fwrt.sgom_table),
531 .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
532 };
533
534 if (!mvm->fwrt.sgom_enabled) {
535 IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n");
536 return 0;
537 }
538
539 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
540 IWL_FW_CMD_VER_UNKNOWN);
541
542 if (cmd_ver != 2) {
543 IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n",
544 cmd_ver);
545 return 0;
546 }
547
548 ret = iwl_mvm_send_cmd(mvm, &cmd);
549 if (ret < 0)
550 IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret);
551
552 return ret;
553 }
554
iwl_send_phy_cfg_cmd(struct iwl_mvm * mvm)555 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
556 {
557 u32 cmd_id = PHY_CONFIGURATION_CMD;
558 struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd;
559 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
560 u8 cmd_ver;
561 size_t cmd_size;
562
563 if (iwl_mvm_has_unified_ucode(mvm) &&
564 !mvm->trans->cfg->tx_with_siso_diversity)
565 return 0;
566
567 if (mvm->trans->cfg->tx_with_siso_diversity) {
568 /*
569 * TODO: currently we don't set the antenna but letting the NIC
570 * to decide which antenna to use. This should come from BIOS.
571 */
572 phy_cfg_cmd.phy_cfg =
573 cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED);
574 }
575
576 /* Set parameters */
577 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
578
579 /* set flags extra PHY configuration flags from the device's cfg */
580 phy_cfg_cmd.phy_cfg |=
581 cpu_to_le32(mvm->trans->trans_cfg->extra_phy_cfg_flags);
582
583 phy_cfg_cmd.calib_control.event_trigger =
584 mvm->fw->default_calib[ucode_type].event_trigger;
585 phy_cfg_cmd.calib_control.flow_trigger =
586 mvm->fw->default_calib[ucode_type].flow_trigger;
587
588 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
589 IWL_FW_CMD_VER_UNKNOWN);
590 if (cmd_ver >= 3)
591 iwl_mvm_phy_filter_init(mvm, &phy_cfg_cmd.phy_specific_cfg);
592
593 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
594 phy_cfg_cmd.phy_cfg);
595 cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) :
596 sizeof(struct iwl_phy_cfg_cmd_v1);
597 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd);
598 }
599
iwl_run_unified_mvm_ucode(struct iwl_mvm * mvm)600 static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm)
601 {
602 struct iwl_notification_wait init_wait;
603 struct iwl_nvm_access_complete_cmd nvm_complete = {};
604 struct iwl_init_extended_cfg_cmd init_cfg = {
605 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
606 };
607 static const u16 init_complete[] = {
608 INIT_COMPLETE_NOTIF,
609 };
610 u32 sb_cfg;
611 int ret;
612
613 if (mvm->trans->cfg->tx_with_siso_diversity)
614 init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
615
616 lockdep_assert_held(&mvm->mutex);
617
618 mvm->rfkill_safe_init_done = false;
619
620 if (mvm->trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210) {
621 sb_cfg = iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG);
622 /* if needed, we'll reset this on our way out later */
623 mvm->fw_product_reset = sb_cfg == SB_CFG_RESIDES_IN_ROM;
624 if (mvm->fw_product_reset && iwl_mei_pldr_req())
625 return -EBUSY;
626 }
627
628 iwl_init_notification_wait(&mvm->notif_wait,
629 &init_wait,
630 init_complete,
631 ARRAY_SIZE(init_complete),
632 iwl_wait_init_complete,
633 NULL);
634
635 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
636
637 /* Will also start the device */
638 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
639 if (ret) {
640 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
641
642 /* if we needed reset then fail here, but notify and remove */
643 if (mvm->fw_product_reset) {
644 iwl_mei_alive_notif(false);
645 iwl_trans_pcie_reset(mvm->trans,
646 IWL_RESET_MODE_RESCAN);
647 }
648
649 goto error;
650 }
651 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
652 NULL);
653
654 if (mvm->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ)
655 mvm->trans->step_urm = !!(iwl_read_umac_prph(mvm->trans,
656 CNVI_PMU_STEP_FLOW) &
657 CNVI_PMU_STEP_FLOW_FORCE_URM);
658
659 /* Send init config command to mark that we are sending NVM access
660 * commands
661 */
662 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
663 INIT_EXTENDED_CFG_CMD),
664 CMD_SEND_IN_RFKILL,
665 sizeof(init_cfg), &init_cfg);
666 if (ret) {
667 IWL_ERR(mvm, "Failed to run init config command: %d\n",
668 ret);
669 goto error;
670 }
671
672 /* Load NVM to NIC if needed */
673 if (mvm->nvm_file_name) {
674 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
675 mvm->nvm_sections);
676 if (ret)
677 goto error;
678 ret = iwl_mvm_load_nvm_to_nic(mvm);
679 if (ret)
680 goto error;
681 }
682
683 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
684 NVM_ACCESS_COMPLETE),
685 CMD_SEND_IN_RFKILL,
686 sizeof(nvm_complete), &nvm_complete);
687 if (ret) {
688 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
689 ret);
690 goto error;
691 }
692
693 ret = iwl_send_phy_cfg_cmd(mvm);
694 if (ret) {
695 IWL_ERR(mvm, "Failed to run PHY configuration: %d\n",
696 ret);
697 goto error;
698 }
699
700 /* We wait for the INIT complete notification */
701 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
702 MVM_UCODE_ALIVE_TIMEOUT);
703 if (ret)
704 return ret;
705
706 /* Read the NVM only at driver load time, no need to do this twice */
707 if (!mvm->nvm_data) {
708 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw,
709 mvm->set_tx_ant, mvm->set_rx_ant);
710 if (IS_ERR(mvm->nvm_data)) {
711 ret = PTR_ERR(mvm->nvm_data);
712 mvm->nvm_data = NULL;
713 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
714 return ret;
715 }
716 }
717
718 mvm->rfkill_safe_init_done = true;
719
720 return 0;
721
722 error:
723 iwl_remove_notification(&mvm->notif_wait, &init_wait);
724 return ret;
725 }
726
iwl_run_init_mvm_ucode(struct iwl_mvm * mvm)727 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm)
728 {
729 struct iwl_notification_wait calib_wait;
730 static const u16 init_complete[] = {
731 INIT_COMPLETE_NOTIF,
732 CALIB_RES_NOTIF_PHY_DB
733 };
734 int ret;
735
736 if (iwl_mvm_has_unified_ucode(mvm))
737 return iwl_run_unified_mvm_ucode(mvm);
738
739 lockdep_assert_held(&mvm->mutex);
740
741 mvm->rfkill_safe_init_done = false;
742
743 iwl_init_notification_wait(&mvm->notif_wait,
744 &calib_wait,
745 init_complete,
746 ARRAY_SIZE(init_complete),
747 iwl_wait_phy_db_entry,
748 mvm->phy_db);
749
750 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
751
752 /* Will also start the device */
753 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
754 if (ret) {
755 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
756 goto remove_notif;
757 }
758
759 if (mvm->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
760 ret = iwl_mvm_send_bt_init_conf(mvm);
761 if (ret)
762 goto remove_notif;
763 }
764
765 /* Read the NVM only at driver load time, no need to do this twice */
766 if (!mvm->nvm_data) {
767 ret = iwl_nvm_init(mvm);
768 if (ret) {
769 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
770 goto remove_notif;
771 }
772 }
773
774 /* In case we read the NVM from external file, load it to the NIC */
775 if (mvm->nvm_file_name) {
776 ret = iwl_mvm_load_nvm_to_nic(mvm);
777 if (ret)
778 goto remove_notif;
779 }
780
781 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
782 "Too old NVM version (0x%0x, required = 0x%0x)",
783 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
784
785 /*
786 * abort after reading the nvm in case RF Kill is on, we will complete
787 * the init seq later when RF kill will switch to off
788 */
789 if (iwl_mvm_is_radio_hw_killed(mvm)) {
790 IWL_DEBUG_RF_KILL(mvm,
791 "jump over all phy activities due to RF kill\n");
792 goto remove_notif;
793 }
794
795 mvm->rfkill_safe_init_done = true;
796
797 /* Send TX valid antennas before triggering calibrations */
798 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
799 if (ret)
800 goto remove_notif;
801
802 ret = iwl_send_phy_cfg_cmd(mvm);
803 if (ret) {
804 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
805 ret);
806 goto remove_notif;
807 }
808
809 /*
810 * Some things may run in the background now, but we
811 * just wait for the calibration complete notification.
812 */
813 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
814 MVM_UCODE_CALIB_TIMEOUT);
815 if (!ret)
816 goto out;
817
818 if (iwl_mvm_is_radio_hw_killed(mvm)) {
819 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
820 ret = 0;
821 } else {
822 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
823 ret);
824 }
825
826 goto out;
827
828 remove_notif:
829 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
830 out:
831 mvm->rfkill_safe_init_done = false;
832 if (!mvm->nvm_data) {
833 /* we want to debug INIT and we have no NVM - fake */
834 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
835 sizeof(struct ieee80211_channel) +
836 sizeof(struct ieee80211_rate),
837 GFP_KERNEL);
838 if (!mvm->nvm_data)
839 return -ENOMEM;
840 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
841 mvm->nvm_data->bands[0].n_channels = 1;
842 mvm->nvm_data->bands[0].n_bitrates = 1;
843 mvm->nvm_data->bands[0].bitrates =
844 (void *)(mvm->nvm_data->channels + 1);
845 mvm->nvm_data->bands[0].bitrates->hw_value = 10;
846 }
847
848 return ret;
849 }
850
iwl_mvm_config_ltr(struct iwl_mvm * mvm)851 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
852 {
853 struct iwl_ltr_config_cmd cmd = {
854 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
855 };
856
857 if (!mvm->trans->ltr_enabled)
858 return 0;
859
860 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
861 sizeof(cmd), &cmd);
862 }
863
iwl_mvm_sar_select_profile(struct iwl_mvm * mvm,int prof_a,int prof_b)864 int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
865 {
866 u32 cmd_id = REDUCE_TX_POWER_CMD;
867 struct iwl_dev_tx_power_cmd_v3_v8 cmd = {
868 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
869 };
870 struct iwl_dev_tx_power_cmd cmd_v9_v10 = {
871 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
872 };
873 __le16 *per_chain;
874 int ret;
875 u16 len = 0;
876 u32 n_subbands;
877 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 3);
878 void *cmd_data = &cmd;
879
880 if (cmd_ver == 10) {
881 len = sizeof(cmd_v9_v10.v10);
882 n_subbands = IWL_NUM_SUB_BANDS_V2;
883 per_chain = &cmd_v9_v10.v10.per_chain[0][0][0];
884 cmd_v9_v10.v10.flags =
885 cpu_to_le32(mvm->fwrt.reduced_power_flags);
886 } else if (cmd_ver == 9) {
887 len = sizeof(cmd_v9_v10.v9);
888 n_subbands = IWL_NUM_SUB_BANDS_V1;
889 per_chain = &cmd_v9_v10.v9.per_chain[0][0];
890 } else if (cmd_ver >= 7) {
891 len = sizeof(cmd.v7);
892 n_subbands = IWL_NUM_SUB_BANDS_V2;
893 per_chain = cmd.v7.per_chain[0][0];
894 cmd.v7.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags);
895 if (cmd_ver == 8)
896 len = sizeof(cmd.v8);
897 } else if (cmd_ver == 6) {
898 len = sizeof(cmd.v6);
899 n_subbands = IWL_NUM_SUB_BANDS_V2;
900 per_chain = cmd.v6.per_chain[0][0];
901 } else if (fw_has_api(&mvm->fw->ucode_capa,
902 IWL_UCODE_TLV_API_REDUCE_TX_POWER)) {
903 len = sizeof(cmd.v5);
904 n_subbands = IWL_NUM_SUB_BANDS_V1;
905 per_chain = cmd.v5.per_chain[0][0];
906 } else if (fw_has_capa(&mvm->fw->ucode_capa,
907 IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) {
908 len = sizeof(cmd.v4);
909 n_subbands = IWL_NUM_SUB_BANDS_V1;
910 per_chain = cmd.v4.per_chain[0][0];
911 } else {
912 len = sizeof(cmd.v3);
913 n_subbands = IWL_NUM_SUB_BANDS_V1;
914 per_chain = cmd.v3.per_chain[0][0];
915 }
916
917 /* all structs have the same common part, add its length */
918 len += sizeof(cmd.common);
919
920 if (cmd_ver < 9)
921 len += sizeof(cmd.per_band);
922 else
923 cmd_data = &cmd_v9_v10;
924
925 ret = iwl_sar_fill_profile(&mvm->fwrt, per_chain,
926 IWL_NUM_CHAIN_TABLES,
927 n_subbands, prof_a, prof_b);
928
929 /* return on error or if the profile is disabled (positive number) */
930 if (ret)
931 return ret;
932
933 iwl_mei_set_power_limit(per_chain);
934
935 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
936 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, cmd_data);
937 }
938
iwl_mvm_get_sar_geo_profile(struct iwl_mvm * mvm)939 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
940 {
941 union iwl_geo_tx_power_profiles_cmd geo_tx_cmd;
942 struct iwl_geo_tx_power_profiles_resp *resp;
943 u16 len;
944 int ret;
945 struct iwl_host_cmd cmd = {
946 .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD),
947 .flags = CMD_WANT_SKB,
948 .data = { &geo_tx_cmd },
949 };
950 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
951 IWL_FW_CMD_VER_UNKNOWN);
952
953 /* the ops field is at the same spot for all versions, so set in v1 */
954 geo_tx_cmd.v1.ops =
955 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
956
957 if (cmd_ver == 5)
958 len = sizeof(geo_tx_cmd.v5);
959 else if (cmd_ver == 4)
960 len = sizeof(geo_tx_cmd.v4);
961 else if (cmd_ver == 3)
962 len = sizeof(geo_tx_cmd.v3);
963 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
964 IWL_UCODE_TLV_API_SAR_TABLE_VER))
965 len = sizeof(geo_tx_cmd.v2);
966 else
967 len = sizeof(geo_tx_cmd.v1);
968
969 if (!iwl_sar_geo_support(&mvm->fwrt))
970 return -EOPNOTSUPP;
971
972 cmd.len[0] = len;
973
974 ret = iwl_mvm_send_cmd(mvm, &cmd);
975 if (ret) {
976 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
977 return ret;
978 }
979
980 resp = (void *)cmd.resp_pkt->data;
981 ret = le32_to_cpu(resp->profile_idx);
982
983 if (WARN_ON(ret > BIOS_GEO_MAX_PROFILE_NUM))
984 ret = -EIO;
985
986 iwl_free_resp(&cmd);
987 return ret;
988 }
989
iwl_mvm_sar_geo_init(struct iwl_mvm * mvm)990 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
991 {
992 u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD);
993 union iwl_geo_tx_power_profiles_cmd cmd;
994 u16 len;
995 u32 n_bands;
996 u32 n_profiles;
997 __le32 sk = cpu_to_le32(0);
998 int ret;
999 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
1000 IWL_FW_CMD_VER_UNKNOWN);
1001
1002 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) !=
1003 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) ||
1004 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) !=
1005 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) ||
1006 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) !=
1007 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) ||
1008 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) !=
1009 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops));
1010
1011 /* the ops field is at the same spot for all versions, so set in v1 */
1012 cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES);
1013
1014 /* Only set to South Korea if the table revision is 1 */
1015 if (mvm->fwrt.geo_rev == 1)
1016 sk = cpu_to_le32(1);
1017
1018 if (cmd_ver == 5) {
1019 len = sizeof(cmd.v5);
1020 n_bands = ARRAY_SIZE(cmd.v5.table[0]);
1021 n_profiles = BIOS_GEO_MAX_PROFILE_NUM;
1022 cmd.v5.table_revision = sk;
1023 } else if (cmd_ver == 4) {
1024 len = sizeof(cmd.v4);
1025 n_bands = ARRAY_SIZE(cmd.v4.table[0]);
1026 n_profiles = BIOS_GEO_MAX_PROFILE_NUM;
1027 cmd.v4.table_revision = sk;
1028 } else if (cmd_ver == 3) {
1029 len = sizeof(cmd.v3);
1030 n_bands = ARRAY_SIZE(cmd.v3.table[0]);
1031 n_profiles = BIOS_GEO_MIN_PROFILE_NUM;
1032 cmd.v3.table_revision = sk;
1033 } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
1034 IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
1035 len = sizeof(cmd.v2);
1036 n_bands = ARRAY_SIZE(cmd.v2.table[0]);
1037 n_profiles = BIOS_GEO_MIN_PROFILE_NUM;
1038 cmd.v2.table_revision = sk;
1039 } else {
1040 len = sizeof(cmd.v1);
1041 n_bands = ARRAY_SIZE(cmd.v1.table[0]);
1042 n_profiles = BIOS_GEO_MIN_PROFILE_NUM;
1043 }
1044
1045 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) !=
1046 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) ||
1047 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) !=
1048 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) ||
1049 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) !=
1050 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) ||
1051 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) !=
1052 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table));
1053 /* the table is at the same position for all versions, so set use v1 */
1054 ret = iwl_sar_geo_fill_table(&mvm->fwrt, &cmd.v1.table[0][0],
1055 n_bands, n_profiles);
1056
1057 /*
1058 * It is a valid scenario to not support SAR, or miss wgds table,
1059 * but in that case there is no need to send the command.
1060 */
1061 if (ret)
1062 return 0;
1063
1064 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd);
1065 }
1066
iwl_mvm_ppag_send_cmd(struct iwl_mvm * mvm)1067 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1068 {
1069 union iwl_ppag_table_cmd cmd;
1070 int ret, cmd_size;
1071
1072 ret = iwl_fill_ppag_table(&mvm->fwrt, &cmd, &cmd_size);
1073 /* Not supporting PPAG table is a valid scenario */
1074 if (ret < 0)
1075 return 0;
1076
1077 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
1078 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
1079 PER_PLATFORM_ANT_GAIN_CMD),
1080 0, cmd_size, &cmd);
1081 if (ret < 0)
1082 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
1083 ret);
1084
1085 return ret;
1086 }
1087
iwl_mvm_ppag_init(struct iwl_mvm * mvm)1088 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1089 {
1090 /* no need to read the table, done in INIT stage */
1091 if (!(iwl_is_ppag_approved(&mvm->fwrt)))
1092 return 0;
1093
1094 return iwl_mvm_ppag_send_cmd(mvm);
1095 }
1096
iwl_mvm_tas_init(struct iwl_mvm * mvm)1097 static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1098 {
1099 u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG);
1100 int fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
1101 IWL_FW_CMD_VER_UNKNOWN);
1102 struct iwl_tas_selection_data selection_data = {};
1103 struct iwl_tas_config_cmd_v2_v4 cmd_v2_v4 = {};
1104 struct iwl_tas_config_cmd cmd_v5 = {};
1105 struct iwl_tas_data data = {};
1106 void *cmd_data = &cmd_v2_v4;
1107 int cmd_size;
1108 int ret;
1109
1110 BUILD_BUG_ON(ARRAY_SIZE(data.block_list_array) !=
1111 IWL_WTAS_BLACK_LIST_MAX);
1112 BUILD_BUG_ON(ARRAY_SIZE(cmd_v2_v4.common.block_list_array) !=
1113 IWL_WTAS_BLACK_LIST_MAX);
1114 BUILD_BUG_ON(ARRAY_SIZE(cmd_v5.block_list_array) !=
1115 IWL_WTAS_BLACK_LIST_MAX);
1116
1117 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) {
1118 IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n");
1119 return;
1120 }
1121
1122 ret = iwl_bios_get_tas_table(&mvm->fwrt, &data);
1123 if (ret < 0) {
1124 IWL_DEBUG_RADIO(mvm,
1125 "TAS table invalid or unavailable. (%d)\n",
1126 ret);
1127 return;
1128 }
1129
1130 if (ret == 0 && fw_ver < 5)
1131 return;
1132
1133 if (!iwl_is_tas_approved()) {
1134 IWL_DEBUG_RADIO(mvm,
1135 "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n",
1136 dmi_get_system_info(DMI_SYS_VENDOR) ?: "<unknown>");
1137 if ((!iwl_add_mcc_to_tas_block_list(data.block_list_array,
1138 &data.block_list_size,
1139 IWL_MCC_US)) ||
1140 (!iwl_add_mcc_to_tas_block_list(data.block_list_array,
1141 &data.block_list_size,
1142 IWL_MCC_CANADA))) {
1143 IWL_DEBUG_RADIO(mvm,
1144 "Unable to add US/Canada to TAS block list, disabling TAS\n");
1145 return;
1146 }
1147 } else {
1148 IWL_DEBUG_RADIO(mvm,
1149 "System vendor '%s' is in the approved list.\n",
1150 dmi_get_system_info(DMI_SYS_VENDOR) ?: "<unknown>");
1151 }
1152
1153 if (fw_ver < 5) {
1154 selection_data = iwl_parse_tas_selection(data.tas_selection,
1155 data.table_revision);
1156 cmd_v2_v4.common.block_list_size =
1157 cpu_to_le32(data.block_list_size);
1158 for (u8 i = 0; i < data.block_list_size; i++)
1159 cmd_v2_v4.common.block_list_array[i] =
1160 cpu_to_le32(data.block_list_array[i]);
1161 }
1162
1163 if (fw_ver == 5) {
1164 cmd_size = sizeof(cmd_v5);
1165 cmd_data = &cmd_v5;
1166 cmd_v5.block_list_size = cpu_to_le16(data.block_list_size);
1167 for (u16 i = 0; i < data.block_list_size; i++)
1168 cmd_v5.block_list_array[i] =
1169 cpu_to_le16(data.block_list_array[i]);
1170 cmd_v5.tas_config_info.table_source = data.table_source;
1171 cmd_v5.tas_config_info.table_revision = data.table_revision;
1172 cmd_v5.tas_config_info.value = cpu_to_le32(data.tas_selection);
1173 } else if (fw_ver == 4) {
1174 cmd_size = sizeof(cmd_v2_v4.common) + sizeof(cmd_v2_v4.v4);
1175 cmd_v2_v4.v4.override_tas_iec = selection_data.override_tas_iec;
1176 cmd_v2_v4.v4.enable_tas_iec = selection_data.enable_tas_iec;
1177 cmd_v2_v4.v4.usa_tas_uhb_allowed =
1178 selection_data.usa_tas_uhb_allowed;
1179 if (fw_has_capa(&mvm->fw->ucode_capa,
1180 IWL_UCODE_TLV_CAPA_UHB_CANADA_TAS_SUPPORT) &&
1181 selection_data.canada_tas_uhb_allowed)
1182 cmd_v2_v4.v4.uhb_allowed_flags = TAS_UHB_ALLOWED_CANADA;
1183 } else if (fw_ver == 3) {
1184 cmd_size = sizeof(cmd_v2_v4.common) + sizeof(cmd_v2_v4.v3);
1185 cmd_v2_v4.v3.override_tas_iec =
1186 cpu_to_le16(selection_data.override_tas_iec);
1187 cmd_v2_v4.v3.enable_tas_iec =
1188 cpu_to_le16(selection_data.enable_tas_iec);
1189 } else if (fw_ver == 2) {
1190 cmd_size = sizeof(cmd_v2_v4.common);
1191 } else {
1192 return;
1193 }
1194
1195 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, cmd_data);
1196 if (ret < 0)
1197 IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret);
1198 }
1199
iwl_mvm_lari_cfg(struct iwl_mvm * mvm)1200 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1201 {
1202 struct iwl_lari_config_change_cmd cmd;
1203 size_t cmd_size;
1204 int ret;
1205
1206 ret = iwl_fill_lari_config(&mvm->fwrt, &cmd, &cmd_size);
1207 if (!ret) {
1208 ret = iwl_mvm_send_cmd_pdu(mvm,
1209 WIDE_ID(REGULATORY_AND_NVM_GROUP,
1210 LARI_CONFIG_CHANGE),
1211 0, cmd_size, &cmd);
1212 if (ret < 0)
1213 IWL_DEBUG_RADIO(mvm,
1214 "Failed to send LARI_CONFIG_CHANGE (%d)\n",
1215 ret);
1216 }
1217 }
1218
iwl_mvm_get_bios_tables(struct iwl_mvm * mvm)1219 void iwl_mvm_get_bios_tables(struct iwl_mvm *mvm)
1220 {
1221 int ret;
1222
1223 iwl_acpi_get_guid_lock_status(&mvm->fwrt);
1224
1225 /* read PPAG table */
1226 ret = iwl_bios_get_ppag_table(&mvm->fwrt);
1227 if (ret < 0) {
1228 IWL_DEBUG_RADIO(mvm,
1229 "PPAG BIOS table invalid or unavailable. (%d)\n",
1230 ret);
1231 }
1232
1233 /* read SAR tables */
1234 ret = iwl_bios_get_wrds_table(&mvm->fwrt);
1235 if (ret < 0) {
1236 IWL_DEBUG_RADIO(mvm,
1237 "WRDS SAR BIOS table invalid or unavailable. (%d)\n",
1238 ret);
1239 /*
1240 * If not available, don't fail and don't bother with EWRD and
1241 * WGDS */
1242
1243 if (!iwl_bios_get_wgds_table(&mvm->fwrt)) {
1244 /*
1245 * If basic SAR is not available, we check for WGDS,
1246 * which should *not* be available either. If it is
1247 * available, issue an error, because we can't use SAR
1248 * Geo without basic SAR.
1249 */
1250 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
1251 }
1252
1253 } else {
1254 ret = iwl_bios_get_ewrd_table(&mvm->fwrt);
1255 /* if EWRD is not available, we can still use
1256 * WRDS, so don't fail */
1257 if (ret < 0)
1258 IWL_DEBUG_RADIO(mvm,
1259 "EWRD SAR BIOS table invalid or unavailable. (%d)\n",
1260 ret);
1261
1262 /* read geo SAR table */
1263 if (iwl_sar_geo_support(&mvm->fwrt)) {
1264 ret = iwl_bios_get_wgds_table(&mvm->fwrt);
1265 if (ret < 0)
1266 IWL_DEBUG_RADIO(mvm,
1267 "Geo SAR BIOS table invalid or unavailable. (%d)\n",
1268 ret);
1269 /* we don't fail if the table is not available */
1270 }
1271 }
1272
1273 iwl_acpi_get_phy_filters(&mvm->fwrt, &mvm->phy_filters);
1274
1275 if (iwl_bios_get_eckv(&mvm->fwrt, &mvm->ext_clock_valid))
1276 IWL_DEBUG_RADIO(mvm, "ECKV table doesn't exist in BIOS\n");
1277 }
1278
iwl_mvm_disconnect_iterator(void * data,u8 * mac,struct ieee80211_vif * vif)1279 static void iwl_mvm_disconnect_iterator(void *data, u8 *mac,
1280 struct ieee80211_vif *vif)
1281 {
1282 if (vif->type == NL80211_IFTYPE_STATION)
1283 ieee80211_hw_restart_disconnect(vif);
1284 }
1285
iwl_mvm_send_recovery_cmd(struct iwl_mvm * mvm,u32 flags)1286 void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
1287 {
1288 u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
1289 u32 status = 0;
1290 int ret;
1291
1292 struct iwl_fw_error_recovery_cmd recovery_cmd = {
1293 .flags = cpu_to_le32(flags),
1294 .buf_size = 0,
1295 };
1296 struct iwl_host_cmd host_cmd = {
1297 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1298 .data = {&recovery_cmd, },
1299 .len = {sizeof(recovery_cmd), },
1300 };
1301
1302 /* no error log was defined in TLV */
1303 if (!error_log_size)
1304 return;
1305
1306 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1307 /* no buf was allocated while HW reset */
1308 if (!mvm->error_recovery_buf)
1309 return;
1310
1311 host_cmd.data[1] = mvm->error_recovery_buf;
1312 host_cmd.len[1] = error_log_size;
1313 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1314 recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1315 }
1316
1317 ret = iwl_mvm_send_cmd_status(mvm, &host_cmd, &status);
1318 kfree(mvm->error_recovery_buf);
1319 mvm->error_recovery_buf = NULL;
1320
1321 if (ret) {
1322 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1323 return;
1324 }
1325
1326 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1327 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1328 if (status) {
1329 IWL_ERR(mvm,
1330 "Failed to send recovery cmd blob was invalid %d\n",
1331 status);
1332
1333 ieee80211_iterate_interfaces(mvm->hw, 0,
1334 iwl_mvm_disconnect_iterator,
1335 mvm);
1336 }
1337 }
1338 }
1339
iwl_mvm_sar_init(struct iwl_mvm * mvm)1340 static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
1341 {
1342 return iwl_mvm_sar_select_profile(mvm, 1, 1);
1343 }
1344
iwl_mvm_load_rt_fw(struct iwl_mvm * mvm)1345 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
1346 {
1347 int ret;
1348
1349 if (iwl_mvm_has_unified_ucode(mvm))
1350 return iwl_run_unified_mvm_ucode(mvm);
1351
1352 ret = iwl_run_init_mvm_ucode(mvm);
1353
1354 if (ret) {
1355 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1356 return ret;
1357 }
1358
1359 iwl_fw_dbg_stop_sync(&mvm->fwrt);
1360 iwl_trans_stop_device(mvm->trans);
1361 ret = iwl_trans_start_hw(mvm->trans);
1362 if (ret)
1363 return ret;
1364
1365 mvm->rfkill_safe_init_done = false;
1366 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1367 if (ret)
1368 return ret;
1369
1370 mvm->rfkill_safe_init_done = true;
1371
1372 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1373 NULL);
1374
1375 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
1376 }
1377
iwl_mvm_up(struct iwl_mvm * mvm)1378 int iwl_mvm_up(struct iwl_mvm *mvm)
1379 {
1380 int ret, i;
1381 struct ieee80211_supported_band *sband = NULL;
1382
1383 lockdep_assert_wiphy(mvm->hw->wiphy);
1384 lockdep_assert_held(&mvm->mutex);
1385
1386 ret = iwl_trans_start_hw(mvm->trans);
1387 if (ret)
1388 return ret;
1389
1390 ret = iwl_mvm_load_rt_fw(mvm);
1391 if (ret) {
1392 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
1393 if (ret != -ERFKILL && !mvm->fw_product_reset)
1394 iwl_fw_dbg_error_collect(&mvm->fwrt,
1395 FW_DBG_TRIGGER_DRIVER);
1396 goto error;
1397 }
1398
1399 /* FW loaded successfully */
1400 mvm->fw_product_reset = false;
1401
1402 iwl_fw_disable_dbg_asserts(&mvm->fwrt);
1403 iwl_get_shared_mem_conf(&mvm->fwrt);
1404
1405 ret = iwl_mvm_sf_update(mvm, NULL, false);
1406 if (ret)
1407 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1408
1409 if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
1410 mvm->fwrt.dump.conf = FW_DBG_INVALID;
1411 /* if we have a destination, assume EARLY START */
1412 if (mvm->fw->dbg.dest_tlv)
1413 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
1414 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
1415 }
1416
1417 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1418 if (ret)
1419 goto error;
1420
1421 if (!iwl_mvm_has_unified_ucode(mvm)) {
1422 /* Send phy db control command and then phy db calibration */
1423 ret = iwl_send_phy_db_data(mvm->phy_db);
1424 if (ret)
1425 goto error;
1426 ret = iwl_send_phy_cfg_cmd(mvm);
1427 if (ret)
1428 goto error;
1429 }
1430
1431 ret = iwl_mvm_send_bt_init_conf(mvm);
1432 if (ret)
1433 goto error;
1434
1435 if (fw_has_capa(&mvm->fw->ucode_capa,
1436 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) {
1437 ret = iwl_set_soc_latency(&mvm->fwrt);
1438 if (ret)
1439 goto error;
1440 }
1441
1442 iwl_mvm_lari_cfg(mvm);
1443
1444 /* Init RSS configuration */
1445 ret = iwl_configure_rxq(&mvm->fwrt);
1446 if (ret)
1447 goto error;
1448
1449 if (iwl_mvm_has_new_rx_api(mvm)) {
1450 ret = iwl_send_rss_cfg_cmd(mvm);
1451 if (ret) {
1452 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1453 ret);
1454 goto error;
1455 }
1456 }
1457
1458 /* init the fw <-> mac80211 STA mapping */
1459 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
1460 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1461 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL);
1462 }
1463
1464 for (i = 0; i < IWL_FW_MAX_LINK_ID + 1; i++)
1465 RCU_INIT_POINTER(mvm->link_id_to_link_conf[i], NULL);
1466
1467 mvm->tdls_cs.peer.sta_id = IWL_INVALID_STA;
1468
1469 /* reset quota debouncing buffer - 0xff will yield invalid data */
1470 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1471
1472 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
1473 ret = iwl_mvm_send_dqa_cmd(mvm);
1474 if (ret)
1475 goto error;
1476 }
1477
1478 /*
1479 * Add auxiliary station for scanning.
1480 * Newer versions of this command implies that the fw uses
1481 * internal aux station for all aux activities that don't
1482 * requires a dedicated data queue.
1483 */
1484 if (!iwl_mvm_has_new_station_api(mvm->fw)) {
1485 /*
1486 * In old version the aux station uses mac id like other
1487 * station and not lmac id
1488 */
1489 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1490 if (ret)
1491 goto error;
1492 }
1493
1494 /* Add all the PHY contexts */
1495 i = 0;
1496 while (!sband && i < NUM_NL80211_BANDS)
1497 sband = mvm->hw->wiphy->bands[i++];
1498
1499 if (WARN_ON_ONCE(!sband)) {
1500 ret = -ENODEV;
1501 goto error;
1502 }
1503
1504 if (iwl_mvm_is_tt_in_fw(mvm)) {
1505 /* in order to give the responsibility of ct-kill and
1506 * TX backoff to FW we need to send empty temperature reporting
1507 * cmd during init time
1508 */
1509 iwl_mvm_send_temp_report_ths_cmd(mvm);
1510 } else {
1511 /* Initialize tx backoffs to the minimal possible */
1512 iwl_mvm_tt_tx_backoff(mvm, 0);
1513 }
1514
1515 #ifdef CONFIG_THERMAL
1516 /* TODO: read the budget from BIOS / Platform NVM */
1517
1518 /*
1519 * In case there is no budget from BIOS / Platform NVM the default
1520 * budget should be 2000mW (cooling state 0).
1521 */
1522 if (iwl_mvm_is_ctdp_supported(mvm)) {
1523 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1524 mvm->cooling_dev.cur_state);
1525 if (ret)
1526 goto error;
1527 }
1528 #endif
1529
1530 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1531 WARN_ON(iwl_mvm_config_ltr(mvm));
1532
1533 ret = iwl_mvm_power_update_device(mvm);
1534 if (ret)
1535 goto error;
1536
1537 /*
1538 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1539 * anyway, so don't init MCC.
1540 */
1541 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1542 ret = iwl_mvm_init_mcc(mvm);
1543 if (ret)
1544 goto error;
1545 }
1546
1547 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
1548 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1549 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1550 ret = iwl_mvm_config_scan(mvm);
1551 if (ret)
1552 goto error;
1553 }
1554
1555 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) {
1556 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1557
1558 if (mvm->time_sync.active)
1559 iwl_mvm_time_sync_config(mvm, mvm->time_sync.peer_addr,
1560 IWL_TIME_SYNC_PROTOCOL_TM |
1561 IWL_TIME_SYNC_PROTOCOL_FTM);
1562 }
1563
1564 if (!mvm->ptp_data.ptp_clock)
1565 iwl_mvm_ptp_init(mvm);
1566
1567 ret = iwl_mvm_ppag_init(mvm);
1568 if (ret)
1569 goto error;
1570
1571 ret = iwl_mvm_sar_init(mvm);
1572 if (ret == 0)
1573 ret = iwl_mvm_sar_geo_init(mvm);
1574 if (ret < 0)
1575 goto error;
1576
1577 ret = iwl_mvm_sgom_init(mvm);
1578 if (ret)
1579 goto error;
1580
1581 iwl_mvm_tas_init(mvm);
1582 iwl_mvm_leds_sync(mvm);
1583 iwl_mvm_uats_init(mvm);
1584
1585 if (iwl_rfi_supported(mvm)) {
1586 if (iwl_rfi_is_enabled_in_bios(&mvm->fwrt))
1587 iwl_rfi_send_config_cmd(mvm, NULL);
1588 }
1589
1590 iwl_mvm_mei_device_state(mvm, true);
1591
1592 IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1593 return 0;
1594 error:
1595 iwl_mvm_stop_device(mvm);
1596 return ret;
1597 }
1598
iwl_mvm_load_d3_fw(struct iwl_mvm * mvm)1599 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1600 {
1601 int ret, i;
1602
1603 lockdep_assert_wiphy(mvm->hw->wiphy);
1604 lockdep_assert_held(&mvm->mutex);
1605
1606 ret = iwl_trans_start_hw(mvm->trans);
1607 if (ret)
1608 return ret;
1609
1610 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1611 if (ret) {
1612 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1613 goto error;
1614 }
1615
1616 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1617 if (ret)
1618 goto error;
1619
1620 /* Send phy db control command and then phy db calibration*/
1621 ret = iwl_send_phy_db_data(mvm->phy_db);
1622 if (ret)
1623 goto error;
1624
1625 ret = iwl_send_phy_cfg_cmd(mvm);
1626 if (ret)
1627 goto error;
1628
1629 /* init the fw <-> mac80211 STA mapping */
1630 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
1631 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1632 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL);
1633 }
1634
1635 if (!iwl_mvm_has_new_station_api(mvm->fw)) {
1636 /*
1637 * Add auxiliary station for scanning.
1638 * Newer versions of this command implies that the fw uses
1639 * internal aux station for all aux activities that don't
1640 * requires a dedicated data queue.
1641 * In old version the aux station uses mac id like other
1642 * station and not lmac id
1643 */
1644 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1645 if (ret)
1646 goto error;
1647 }
1648
1649 return 0;
1650 error:
1651 iwl_mvm_stop_device(mvm);
1652 return ret;
1653 }
1654
iwl_mvm_rx_mfuart_notif(struct iwl_mvm * mvm,struct iwl_rx_cmd_buffer * rxb)1655 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1656 struct iwl_rx_cmd_buffer *rxb)
1657 {
1658 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1659 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1660
1661 IWL_DEBUG_INFO(mvm,
1662 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1663 le32_to_cpu(mfuart_notif->installed_ver),
1664 le32_to_cpu(mfuart_notif->external_ver),
1665 le32_to_cpu(mfuart_notif->status),
1666 le32_to_cpu(mfuart_notif->duration));
1667
1668 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
1669 IWL_DEBUG_INFO(mvm,
1670 "MFUART: image size: 0x%08x\n",
1671 le32_to_cpu(mfuart_notif->image_size));
1672 }
1673