/linux/drivers/comedi/drivers/ |
H A D | ni_atmio16d.c | 152 outw(0xFFC2, dev->iobase + AM9513A_COM_REG); in reset_counters() 153 outw(0xFF02, dev->iobase + AM9513A_COM_REG); in reset_counters() 154 outw(0x4, dev->iobase + AM9513A_DATA_REG); in reset_counters() 155 outw(0xFF0A, dev->iobase + AM9513A_COM_REG); in reset_counters() 156 outw(0x3, dev->iobase + AM9513A_DATA_REG); in reset_counters() 157 outw(0xFF42, dev->iobase + AM9513A_COM_REG); in reset_counters() 158 outw(0xFF42, dev->iobase + AM9513A_COM_REG); in reset_counters() 160 outw(0xFFC4, dev->iobase + AM9513A_COM_REG); in reset_counters() 161 outw(0xFF03, dev->iobase + AM9513A_COM_REG); in reset_counters() 162 outw(0x4, dev->iobase + AM9513A_DATA_REG); in reset_counters() [all …]
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H A D | adv_pci_dio.c | 246 unsigned short val = inw(dev->iobase + reg); in process_irq() 273 irqflags = inb(dev->iobase + PCI173X_INT_FLAG_REG); in pci_dio_interrupt() 280 outb(irqflags, dev->iobase + PCI173X_INT_CLR_REG); in pci_dio_interrupt() 356 outb(dev_private->int_rf, dev->iobase + PCI173X_INT_RF_REG); in pci_dio_asy_cmd() 358 outb(dev_private->int_ctrl, dev->iobase + PCI173X_INT_EN_REG); in pci_dio_asy_cmd() 385 outb(dev_private->int_ctrl, dev->iobase + PCI173X_INT_EN_REG); in pci_dio_asy_cancel() 399 unsigned long iobase = dev->iobase + reg; in pci_dio_insn_bits_dirq_b() local 401 data[1] = inb(iobase); in pci_dio_insn_bits_dirq_b() 412 unsigned long iobase = dev->iobase + reg; in pci_dio_insn_bits_di_b() local 414 data[1] = inb(iobase); in pci_dio_insn_bits_di_b() [all …]
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H A D | addi_apci_1564.c | 175 outl(0x0, dev->iobase + APCI1564_DI_IRQ_REG); in apci1564_reset() 176 inl(dev->iobase + APCI1564_DI_INT_STATUS_REG); in apci1564_reset() 177 outl(0x0, dev->iobase + APCI1564_DI_INT_MODE1_REG); in apci1564_reset() 178 outl(0x0, dev->iobase + APCI1564_DI_INT_MODE2_REG); in apci1564_reset() 181 outl(0x0, dev->iobase + APCI1564_DO_REG); in apci1564_reset() 182 outl(0x0, dev->iobase + APCI1564_DO_INT_CTRL_REG); in apci1564_reset() 185 addi_watchdog_reset(dev->iobase + APCI1564_WDOG_IOBASE); in apci1564_reset() 192 unsigned long iobase = devpriv->counters + ADDI_TCW_CTRL_REG; in apci1564_reset() local 195 outl(0x0, iobase + APCI1564_COUNTER(0)); in apci1564_reset() 196 outl(0x0, iobase + APCI1564_COUNTER(1)); in apci1564_reset() [all …]
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H A D | ni_daq_700.c | 84 outb(s->state & 0xff, dev->iobase + DIO_W); in daq700_dio_insn_bits() 88 val |= inb(dev->iobase + DIO_R) << 8; in daq700_dio_insn_bits() 119 status = inb(dev->iobase + STA_R2); in daq700_ai_eoc() 122 status = inb(dev->iobase + STA_R1); in daq700_ai_eoc() 148 outb(r3_bits | (range & 0x03), dev->iobase + CMD_R3); in daq700_ai_rinsn() 152 outb(chan | 0x80, dev->iobase + CMD_R1); in daq700_ai_rinsn() 159 outb(0x00, dev->iobase + CMD_R2); /* enable ADC conversions */ in daq700_ai_rinsn() 160 outb(0x30, dev->iobase + CMO_R); /* mode 0 out0 L, from H */ in daq700_ai_rinsn() 161 outb(0x00, dev->iobase + ADCLEAR_R); /* clear the ADC FIFO */ in daq700_ai_rinsn() 163 inw(dev->iobase + ADFIFO_R); in daq700_ai_rinsn() [all …]
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H A D | dmm32at.c | 166 outb(DMM32AT_FIFO_CTRL_FIFORST, dev->iobase + DMM32AT_FIFO_CTRL_REG); in dmm32at_ai_set_chanspec() 170 dev->iobase + DMM32AT_FIFO_CTRL_REG); in dmm32at_ai_set_chanspec() 172 outb(chan, dev->iobase + DMM32AT_AI_LO_CHAN_REG); in dmm32at_ai_set_chanspec() 173 outb(last_chan, dev->iobase + DMM32AT_AI_HI_CHAN_REG); in dmm32at_ai_set_chanspec() 174 outb(dmm32at_rangebits[range], dev->iobase + DMM32AT_AI_CFG_REG); in dmm32at_ai_set_chanspec() 182 val = inb(dev->iobase + DMM32AT_AI_LSB_REG); in dmm32at_ai_get_sample() 183 val |= (inb(dev->iobase + DMM32AT_AI_MSB_REG) << 8); in dmm32at_ai_get_sample() 196 status = inb(dev->iobase + context); in dmm32at_ai_status() 219 outb(0xff, dev->iobase + DMM32AT_AI_START_CONV_REG); in dmm32at_ai_insn_read() 343 outb(0, dev->iobase + DMM32AT_CTRDIO_CFG_REG); in dmm32at_setaitimer() [all …]
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H A D | addi_apci_3501.c | 100 status = inl(dev->iobase + APCI3501_AO_CTRL_STATUS_REG); in apci3501_wait_for_dac() 124 outl(0, dev->iobase + APCI3501_AO_CTRL_STATUS_REG); in apci3501_ao_insn_write() 128 dev->iobase + APCI3501_AO_CTRL_STATUS_REG); in apci3501_ao_insn_write() 147 dev->iobase + APCI3501_AO_DATA_REG); in apci3501_ao_insn_write() 160 data[1] = inl(dev->iobase + APCI3501_DI_REG) & 0x3; in apci3501_di_insn_bits() 170 s->state = inl(dev->iobase + APCI3501_DO_REG); in apci3501_do_insn_bits() 173 outl(s->state, dev->iobase + APCI3501_DO_REG); in apci3501_do_insn_bits() 180 static void apci3501_eeprom_wait(unsigned long iobase) in apci3501_eeprom_wait() argument 185 val = inb(iobase + AMCC_OP_REG_MCSR_NVCMD); in apci3501_eeprom_wait() 189 static unsigned short apci3501_eeprom_readw(unsigned long iobase, in apci3501_eeprom_readw() argument [all …]
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H A D | pcmmio.c | 188 unsigned long iobase = dev->iobase; in pcmmio_dio_write() local 194 outb(val & 0xff, iobase + PCMMIO_PORT_REG(port + 0)); in pcmmio_dio_write() 195 outb((val >> 8) & 0xff, iobase + PCMMIO_PORT_REG(port + 1)); in pcmmio_dio_write() 196 outb((val >> 16) & 0xff, iobase + PCMMIO_PORT_REG(port + 2)); in pcmmio_dio_write() 198 outb(PCMMIO_PAGE(page), iobase + PCMMIO_PAGE_LOCK_REG); in pcmmio_dio_write() 199 outb(val & 0xff, iobase + PCMMIO_PAGE_REG(0)); in pcmmio_dio_write() 200 outb((val >> 8) & 0xff, iobase + PCMMIO_PAGE_REG(1)); in pcmmio_dio_write() 201 outb((val >> 16) & 0xff, iobase + PCMMIO_PAGE_REG(2)); in pcmmio_dio_write() 210 unsigned long iobase = dev->iobase; in pcmmio_dio_read() local 217 val = inb(iobase + PCMMIO_PORT_REG(port + 0)); in pcmmio_dio_read() [all …]
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H A D | quatech_daqp_cs.c | 169 status = inb(dev->iobase + DAQP_STATUS_REG); in daqp_clear_events() 189 outb(DAQP_CMD_STOP, dev->iobase + DAQP_CMD_REG); in daqp_ai_cancel() 190 outb(0, dev->iobase + DAQP_CTRL_REG); in daqp_ai_cancel() 191 inb(dev->iobase + DAQP_STATUS_REG); in daqp_ai_cancel() 205 val = inb(dev->iobase + DAQP_AI_FIFO_REG); in daqp_ai_get_sample() 206 val |= inb(dev->iobase + DAQP_AI_FIFO_REG) << 8; in daqp_ai_get_sample() 221 status = inb(dev->iobase + DAQP_STATUS_REG); in daqp_interrupt() 246 status = inb(dev->iobase + DAQP_STATUS_REG); in daqp_interrupt() 277 outb(val & 0xff, dev->iobase + DAQP_SCANLIST_REG); in daqp_ai_set_one_scanlist_entry() 278 outb((val >> 8) & 0xff, dev->iobase + DAQP_SCANLIST_REG); in daqp_ai_set_one_scanlist_entry() [all …]
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H A D | dt2817.c | 65 outb(oe, dev->iobase + DT2817_CR); in dt2817_dio_insn_config() 75 unsigned long iobase = dev->iobase + DT2817_DATA; in dt2817_dio_insn_bits() local 82 outb(s->state & 0xff, iobase + 0); in dt2817_dio_insn_bits() 84 outb((s->state >> 8) & 0xff, iobase + 1); in dt2817_dio_insn_bits() 86 outb((s->state >> 16) & 0xff, iobase + 2); in dt2817_dio_insn_bits() 88 outb((s->state >> 24) & 0xff, iobase + 3); in dt2817_dio_insn_bits() 91 val = inb(iobase + 0); in dt2817_dio_insn_bits() 92 val |= (inb(iobase + 1) << 8); in dt2817_dio_insn_bits() 93 val |= (inb(iobase + 2) << 16); in dt2817_dio_insn_bits() 94 val |= (inb(iobase + 3) << 24); in dt2817_dio_insn_bits() [all …]
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H A D | multiq3.c | 77 dev->iobase + MULTIQ3_CTRL_REG); in multiq3_set_ctrl() 87 status = inw(dev->iobase + MULTIQ3_STATUS_REG); in multiq3_ai_status() 111 outw(0, dev->iobase + MULTIQ3_AI_CONV_REG); in multiq3_ai_insn_read() 119 val = inb(dev->iobase + MULTIQ3_AI_REG) << 8; in multiq3_ai_insn_read() 120 val |= inb(dev->iobase + MULTIQ3_AI_REG); in multiq3_ai_insn_read() 143 outw(val, dev->iobase + MULTIQ3_AO_REG); in multiq3_ao_insn_write() 155 data[1] = inw(dev->iobase + MULTIQ3_DI_REG); in multiq3_di_insn_bits() 166 outw(s->state, dev->iobase + MULTIQ3_DO_REG); in multiq3_do_insn_bits() 188 outb(MULTIQ3_BP_RESET, dev->iobase + MULTIQ3_ENC_CTRL_REG); in multiq3_encoder_insn_read() 191 outb(MULTIQ3_TRSFRCNTR_OL, dev->iobase + MULTIQ3_ENC_CTRL_REG); in multiq3_encoder_insn_read() [all …]
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H A D | das08.c | 161 status = inb(dev->iobase + DAS08_STATUS_REG); in das08_ai_eoc() 182 inb(dev->iobase + DAS08_AI_LSB_REG); in das08_ai_insn_read() 183 inb(dev->iobase + DAS08_AI_MSB_REG); in das08_ai_insn_read() 190 outb(devpriv->do_mux_bits, dev->iobase + DAS08_CONTROL_REG); in das08_ai_insn_read() 197 dev->iobase + DAS08_GAIN_REG); in das08_ai_insn_read() 203 if (inb(dev->iobase + DAS08_AI_MSB_REG) & 0x80) in das08_ai_insn_read() 207 outb_p(0, dev->iobase + DAS08_AI_TRIG_REG); in das08_ai_insn_read() 213 msb = inb(dev->iobase + DAS08_AI_MSB_REG); in das08_ai_insn_read() 214 lsb = inb(dev->iobase + DAS08_AI_LSB_REG); in das08_ai_insn_read() 254 data[1] = DAS08_STATUS_DI(inb(dev->iobase + DAS08_STATUS_REG)); in das08_di_insn_bits() [all …]
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H A D | addi_watchdog.c | 18 unsigned long iobase; member 44 outl(reload, spriv->iobase + ADDI_TCW_RELOAD_REG); in addi_watchdog_insn_config() 57 outl(spriv->wdog_ctrl, spriv->iobase + ADDI_TCW_CTRL_REG); in addi_watchdog_insn_config() 71 data[i] = inl(spriv->iobase + ADDI_TCW_STATUS_REG); in addi_watchdog_insn_read() 92 spriv->iobase + ADDI_TCW_CTRL_REG); in addi_watchdog_insn_write() 98 void addi_watchdog_reset(unsigned long iobase) in addi_watchdog_reset() argument 100 outl(0x0, iobase + ADDI_TCW_CTRL_REG); in addi_watchdog_reset() 101 outl(0x0, iobase + ADDI_TCW_RELOAD_REG); in addi_watchdog_reset() 105 int addi_watchdog_init(struct comedi_subdevice *s, unsigned long iobase) in addi_watchdog_init() argument 113 spriv->iobase = iobase; in addi_watchdog_init()
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H A D | adv_pci1710.c | 272 outw(PCI171X_MUX_CHAN(chan), dev->iobase + PCI171X_MUX_REG); in pci1710_ai_setup_chanlist() 273 outw(rangeval, dev->iobase + PCI171X_RANGE_REG); in pci1710_ai_setup_chanlist() 283 outw(devpriv->mux_scan, dev->iobase + PCI171X_MUX_REG); in pci1710_ai_setup_chanlist() 293 status = inw(dev->iobase + PCI171X_STATUS_REG); in pci1710_ai_eoc() 309 sample = inw(dev->iobase + PCI171X_AD_DATA_REG); in pci1710_ai_read_sample() 339 outw(devpriv->ctrl, dev->iobase + PCI171X_CTRL_REG); in pci1710_ai_insn_read() 341 outb(0, dev->iobase + PCI171X_CLRFIFO_REG); in pci1710_ai_insn_read() 342 outb(0, dev->iobase + PCI171X_CLRINT_REG); in pci1710_ai_insn_read() 350 outw(0, dev->iobase + PCI171X_SOFTTRG_REG); in pci1710_ai_insn_read() 365 outw(devpriv->ctrl, dev->iobase + PCI171X_CTRL_REG); in pci1710_ai_insn_read() [all …]
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H A D | ke_counter.c | 53 outb((val >> 24) & 0xff, dev->iobase + KE_SIGN_REG(chan)); in ke_counter_insn_write() 54 outb((val >> 16) & 0xff, dev->iobase + KE_MSB_REG(chan)); in ke_counter_insn_write() 55 outb((val >> 8) & 0xff, dev->iobase + KE_MID_REG(chan)); in ke_counter_insn_write() 56 outb((val >> 0) & 0xff, dev->iobase + KE_LSB_REG(chan)); in ke_counter_insn_write() 73 inb(dev->iobase + KE_LATCH_REG(chan)); in ke_counter_insn_read() 75 val = inb(dev->iobase + KE_LSB_REG(chan)); in ke_counter_insn_read() 76 val |= (inb(dev->iobase + KE_MID_REG(chan)) << 8); in ke_counter_insn_read() 77 val |= (inb(dev->iobase + KE_MSB_REG(chan)) << 16); in ke_counter_insn_read() 78 val |= (inb(dev->iobase + KE_SIGN_REG(chan)) << 24); in ke_counter_insn_read() 91 outb(0, dev->iobase + KE_RESET_REG(chan)); in ke_counter_reset() [all …]
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H A D | das6402.c | 138 outb(DAS6402_MODE_ENHANCED | mode, dev->iobase + DAS6402_MODE_REG); in das6402_set_mode() 144 outb(DAS6402_STATUS_W_EXTEND, dev->iobase + DAS6402_STATUS_REG); in das6402_set_extended() 145 outb(DAS6402_STATUS_W_EXTEND | val, dev->iobase + DAS6402_STATUS_REG); in das6402_set_extended() 146 outb(val, dev->iobase + DAS6402_STATUS_REG); in das6402_set_extended() 153 DAS6402_STATUS_W_CLRXIN, dev->iobase + DAS6402_STATUS_REG); in das6402_clear_all_interrupts() 158 outb(DAS6402_STATUS_W_CLRINT, dev->iobase + DAS6402_STATUS_REG); in das6402_ai_clear_eoc() 166 val = inw(dev->iobase + DAS6402_AI_DATA_REG); in das6402_ai_read_sample() 180 status = inb(dev->iobase + DAS6402_STATUS_REG); in das6402_interrupt() 233 dev->iobase + DAS6402_AI_MUX_REG); in das6402_ai_cmd() 241 DAS6402_CTRL_PACER_TRIG, dev->iobase + DAS6402_CTRL_REG); in das6402_ai_cmd() [all …]
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H A D | pcl724.c | 80 unsigned long iobase) in pcl724_8255mapped_io() argument 82 int movport = I8255_SIZE * (iobase >> 12); in pcl724_8255mapped_io() 84 iobase &= 0x0fff; in pcl724_8255mapped_io() 86 outb(port + movport, iobase); in pcl724_8255mapped_io() 88 outb(data, iobase + 1); in pcl724_8255mapped_io() 91 return inb(iobase + 1); in pcl724_8255mapped_io() 99 unsigned long iobase; in pcl724_attach() local 126 iobase = dev->iobase + (i * 0x1000); in pcl724_attach() 128 iobase); in pcl724_attach()
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/linux/drivers/rtc/ |
H A D | rtc-asm9260.c | 108 void __iomem *iobase; member 120 isr = ioread32(priv->iobase + HW_CIIR); in asm9260_rtc_irq() 126 iowrite32(0, priv->iobase + HW_CIIR); in asm9260_rtc_irq() 141 ctime0 = ioread32(priv->iobase + HW_CTIME0); in asm9260_rtc_read_time() 142 ctime1 = ioread32(priv->iobase + HW_CTIME1); in asm9260_rtc_read_time() 143 ctime2 = ioread32(priv->iobase + HW_CTIME2); in asm9260_rtc_read_time() 145 if (ctime1 != ioread32(priv->iobase + HW_CTIME1)) { in asm9260_rtc_read_time() 150 ctime0 = ioread32(priv->iobase + HW_CTIME0); in asm9260_rtc_read_time() 151 ctime1 = ioread32(priv->iobase + HW_CTIME1); in asm9260_rtc_read_time() 152 ctime2 = ioread32(priv->iobase + HW_CTIME2); in asm9260_rtc_read_time() [all …]
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/linux/drivers/bluetooth/ |
H A D | bt3c_cs.c | 116 static inline void bt3c_address(unsigned int iobase, unsigned short addr) in bt3c_address() argument 118 outb(addr & 0xff, iobase + ADDR_L); in bt3c_address() 119 outb((addr >> 8) & 0xff, iobase + ADDR_H); in bt3c_address() 123 static inline void bt3c_put(unsigned int iobase, unsigned short value) in bt3c_put() argument 125 outb(value & 0xff, iobase + DATA_L); in bt3c_put() 126 outb((value >> 8) & 0xff, iobase + DATA_H); in bt3c_put() 130 static inline void bt3c_io_write(unsigned int iobase, unsigned short addr, unsigned short value) in bt3c_io_write() argument 132 bt3c_address(iobase, addr); in bt3c_io_write() 133 bt3c_put(iobase, value); in bt3c_io_write() 137 static inline unsigned short bt3c_get(unsigned int iobase) in bt3c_get() argument [all …]
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H A D | bluecard_cs.c | 162 unsigned int iobase = info->p_dev->resource[0]->start; in bluecard_activity_led_timeout() local 171 outb(0x08 | 0x20, iobase + 0x30); in bluecard_activity_led_timeout() 177 unsigned int iobase = info->p_dev->resource[0]->start; in bluecard_enable_activity_led() local 187 outb(0x18 | 0x60, iobase + 0x30); in bluecard_enable_activity_led() 190 outb(0x00, iobase + 0x30); in bluecard_enable_activity_led() 202 static int bluecard_write(unsigned int iobase, unsigned int offset, __u8 *buf, int len) in bluecard_write() argument 208 outb_p(actual, iobase + offset); in bluecard_write() 211 outb_p(buf[i], iobase + offset + i + 1); in bluecard_write() 233 unsigned int iobase = info->p_dev->resource[0]->start; in bluecard_write_wakeup() local 266 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup() [all …]
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H A D | dtl1_cs.c | 110 static int dtl1_write(unsigned int iobase, int fifo_size, __u8 *buf, int len) in dtl1_write() argument 115 if (!(inb(iobase + UART_LSR) & UART_LSR_THRE)) in dtl1_write() 121 outb(buf[actual], iobase + UART_TX); in dtl1_write() 147 unsigned int iobase = info->p_dev->resource[0]->start; in dtl1_write_wakeup() local 161 len = dtl1_write(iobase, 32, skb->data, skb->len); in dtl1_write_wakeup() 204 unsigned int iobase; in dtl1_receive() local 213 iobase = info->p_dev->resource[0]->start; in dtl1_receive() 229 skb_put_u8(info->rx_skb, inb(iobase + UART_RX)); in dtl1_receive() 285 } while (inb(iobase + UART_LSR) & UART_LSR_DR); in dtl1_receive() 292 unsigned int iobase; in dtl1_interrupt() local [all …]
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/linux/drivers/irqchip/ |
H A D | irq-sa11x0.c | 28 static void __iomem *iobase; variable 38 reg = readl_relaxed(iobase + ICMR); in sa1100_mask_irq() 40 writel_relaxed(reg, iobase + ICMR); in sa1100_mask_irq() 47 reg = readl_relaxed(iobase + ICMR); in sa1100_unmask_irq() 49 writel_relaxed(reg, iobase + ICMR); in sa1100_unmask_irq() 93 st->icmr = readl_relaxed(iobase + ICMR); in sa1100irq_suspend() 94 st->iclr = readl_relaxed(iobase + ICLR); in sa1100irq_suspend() 95 st->iccr = readl_relaxed(iobase + ICCR); in sa1100irq_suspend() 100 writel_relaxed(st->icmr & 0xfffff000, iobase + ICMR); in sa1100irq_suspend() 110 writel_relaxed(st->iccr, iobase + ICCR); in sa1100irq_resume() [all …]
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/linux/drivers/net/hamradio/ |
H A D | baycom_ser_hdx.c | 78 #define RBR(iobase) (iobase+0) argument 79 #define THR(iobase) (iobase+0) argument 80 #define IER(iobase) (iobase+1) argument 81 #define IIR(iobase) (iobase+2) argument 82 #define FCR(iobase) (iobase+2) argument 83 #define LCR(iobase) (iobase+3) argument 84 #define MCR(iobase) (iobase+4) argument 85 #define LSR(iobase) (iobase+5) argument 86 #define MSR(iobase) (iobase+6) argument 87 #define SCR(iobase) (iobase+7) argument [all …]
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H A D | yam.c | 100 int iobase; member 149 #define RBR(iobase) (iobase+0) argument 150 #define THR(iobase) (iobase+0) argument 151 #define IER(iobase) (iobase+1) argument 152 #define IIR(iobase) (iobase+2) argument 153 #define FCR(iobase) (iobase+2) argument 154 #define LCR(iobase) (iobase+3) argument 155 #define MCR(iobase) (iobase+4) argument 156 #define LSR(iobase) (iobase+5) argument 157 #define MSR(iobase) (iobase+6) argument [all …]
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/linux/drivers/char/tpm/ |
H A D | tpm_tis_synquacer.c | 28 void __iomem *iobase; member 44 *result++ = ioread8(phy->iobase + addr); in tpm_tis_synquacer_read_bytes() 47 result[1] = ioread8(phy->iobase + addr + 1); in tpm_tis_synquacer_read_bytes() 48 result[0] = ioread8(phy->iobase + addr); in tpm_tis_synquacer_read_bytes() 51 result[3] = ioread8(phy->iobase + addr + 3); in tpm_tis_synquacer_read_bytes() 52 result[2] = ioread8(phy->iobase + addr + 2); in tpm_tis_synquacer_read_bytes() 53 result[1] = ioread8(phy->iobase + addr + 1); in tpm_tis_synquacer_read_bytes() 54 result[0] = ioread8(phy->iobase + addr); in tpm_tis_synquacer_read_bytes() 69 iowrite8(*value++, phy->iobase + addr); in tpm_tis_synquacer_write_bytes() 78 iowrite8(value[3], phy->iobase + addr + 3); in tpm_tis_synquacer_write_bytes() [all …]
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/linux/drivers/i2c/busses/ |
H A D | i2c-hisi.c | 92 void __iomem *iobase; member 116 writel_relaxed(mask, ctlr->iobase + HISI_I2C_INT_MASK); in hisi_i2c_enable_int() 121 writel_relaxed((~mask) & HISI_I2C_INT_ALL, ctlr->iobase + HISI_I2C_INT_MASK); in hisi_i2c_disable_int() 126 writel_relaxed(mask, ctlr->iobase + HISI_I2C_INT_CLR); in hisi_i2c_clear_int() 131 writel_relaxed(mask, ctlr->iobase + HISI_I2C_TX_INT_CLR); in hisi_i2c_clear_tx_int() 139 reg = readl(ctlr->iobase + HISI_I2C_FIFO_STATE); in hisi_i2c_handle_errors() 160 reg = readl(ctlr->iobase + HISI_I2C_FRAME_CTRL); in hisi_i2c_start_xfer() 164 writel(reg, ctlr->iobase + HISI_I2C_FRAME_CTRL); in hisi_i2c_start_xfer() 166 reg = readl(ctlr->iobase + HISI_I2C_SLV_ADDR); in hisi_i2c_start_xfer() 169 writel(reg, ctlr->iobase + HISI_I2C_SLV_ADDR); in hisi_i2c_start_xfer() [all …]
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