Searched refs:intr_enable_bit (Results 1 – 9 of 9) sorted by relevance
| /linux/drivers/pinctrl/qcom/ |
| H A D | pinctrl-msm.h | 121 unsigned intr_enable_bit:5; member
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| H A D | pinctrl-ipq8064.c | 193 .intr_enable_bit = 0, \
220 .intr_enable_bit = -1, \
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| H A D | pinctrl-sc8280xp.c | 42 .intr_enable_bit = 0, \
67 .intr_enable_bit = -1, \
91 .intr_enable_bit = -1, \
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| H A D | pinctrl-ipq5018.c | 40 .intr_enable_bit = 0, \
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| H A D | pinctrl-ipq9650.c | 28 .intr_enable_bit = 0, \
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| H A D | pinctrl-maili.c | 45 .intr_enable_bit = 0, \
72 .intr_enable_bit = -1, \
96 .intr_enable_bit = -1, \
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| H A D | pinctrl-x1e80100.c | 45 .intr_enable_bit = 0, \
70 .intr_enable_bit = -1, \
94 .intr_enable_bit = -1, \
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| H A D | pinctrl-msm.c | 877 val &= ~BIT(g->intr_enable_bit); in msm_gpio_irq_mask()
905 val |= BIT(g->intr_enable_bit); in msm_gpio_irq_unmask()
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| H A D | pinctrl-shikra.c | 43 .intr_enable_bit = 0, \
71 .intr_enable_bit = -1, \
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