| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | sdma_v4_4_2.c | 160 uint32_t inst_mask) in sdma_v4_4_2_inst_init_golden_registers() argument
489 uint32_t inst_mask) in sdma_v4_4_2_inst_gfx_stop() argument
496 for_each_inst(i, inst_mask) { in sdma_v4_4_2_inst_gfx_stop()
532 uint32_t inst_mask) in sdma_v4_4_2_inst_rlc_stop() argument
546 uint32_t inst_mask) in sdma_v4_4_2_inst_page_stop() argument
551 for_each_inst(i, inst_mask) { in sdma_v4_4_2_inst_page_stop()
573 bool enable, uint32_t inst_mask) in sdma_v4_4_2_inst_ctx_switch_enable() argument
602 for_each_inst(i, inst_mask) { in sdma_v4_4_2_inst_ctx_switch_enable()
628 uint32_t inst_mask) in sdma_v4_4_2_inst_enable() argument
634 sdma_v4_4_2_inst_gfx_stop(adev, inst_mask); in sdma_v4_4_2_inst_enable()
[all …]
|
| H A D | sdma_v7_1.c | 115 uint32_t inst_mask);
367 uint32_t inst_mask) in sdma_v7_1_inst_gfx_stop() argument
372 for_each_inst(i, inst_mask) { in sdma_v7_1_inst_gfx_stop()
391 uint32_t inst_mask) in sdma_v7_1_inst_rlc_stop() argument
406 bool enable, uint32_t inst_mask) in sdma_v7_1_inst_ctx_switch_enable() argument
410 for_each_inst(i, inst_mask) { in sdma_v7_1_inst_ctx_switch_enable()
426 bool enable, uint32_t inst_mask) in sdma_v7_1_inst_enable() argument
432 sdma_v7_1_inst_gfx_stop(adev, inst_mask); in sdma_v7_1_inst_enable()
433 sdma_v7_1_inst_rlc_stop(adev, inst_mask); in sdma_v7_1_inst_enable()
439 for_each_inst(i, inst_mask) { in sdma_v7_1_inst_enable()
[all …]
|
| H A D | gfxhub_v1_2.c | 641 static int gfxhub_v1_2_xcp_resume(void *handle, uint32_t inst_mask) in gfxhub_v1_2_xcp_resume() argument
651 gfxhub_v1_2_xcc_set_fault_enable_default(adev, value, inst_mask); in gfxhub_v1_2_xcp_resume()
654 return gfxhub_v1_2_xcc_gart_enable(adev, inst_mask); in gfxhub_v1_2_xcp_resume()
659 static int gfxhub_v1_2_xcp_suspend(void *handle, uint32_t inst_mask) in gfxhub_v1_2_xcp_suspend() argument
664 gfxhub_v1_2_xcc_gart_disable(adev, inst_mask); in gfxhub_v1_2_xcp_suspend()
|
| H A D | gfxhub_v12_1.c | 833 static int gfxhub_v12_1_xcp_resume(void *handle, uint32_t inst_mask) in gfxhub_v12_1_xcp_resume() argument
843 gfxhub_v12_1_xcc_set_fault_enable_default(adev, value, inst_mask); in gfxhub_v12_1_xcp_resume()
846 return gfxhub_v12_1_xcc_gart_enable(adev, inst_mask); in gfxhub_v12_1_xcp_resume()
851 static int gfxhub_v12_1_xcp_suspend(void *handle, uint32_t inst_mask) in gfxhub_v12_1_xcp_suspend() argument
856 gfxhub_v12_1_xcc_gart_disable(adev, inst_mask); in gfxhub_v12_1_xcp_suspend()
|
| H A D | sdma_v5_0.c | 562 static void sdma_v5_0_gfx_stop(struct amdgpu_device *adev, uint32_t inst_mask) in sdma_v5_0_gfx_stop() argument
567 for_each_inst(i, inst_mask) { in sdma_v5_0_gfx_stop()
659 uint32_t inst_mask; in sdma_v5_0_enable() local
661 inst_mask = GENMASK(adev->sdma.num_instances - 1, 0); in sdma_v5_0_enable()
663 sdma_v5_0_gfx_stop(adev, 1 << inst_mask); in sdma_v5_0_enable()
|
| H A D | sdma_v5_2.c | 412 static void sdma_v5_2_gfx_stop(struct amdgpu_device *adev, uint32_t inst_mask) in sdma_v5_2_gfx_stop() argument
417 for_each_inst(i, inst_mask) { in sdma_v5_2_gfx_stop()
508 uint32_t inst_mask; in sdma_v5_2_enable() local
510 inst_mask = GENMASK(adev->sdma.num_instances - 1, 0); in sdma_v5_2_enable()
512 sdma_v5_2_gfx_stop(adev, inst_mask); in sdma_v5_2_enable()
|
| H A D | gfx_v9_4_3.c | 4209 static int gfx_v9_4_3_xcp_resume(void *handle, uint32_t inst_mask) in gfx_v9_4_3_xcp_resume() argument
4218 tmp_mask = inst_mask; in gfx_v9_4_3_xcp_resume()
4223 tmp_mask = inst_mask; in gfx_v9_4_3_xcp_resume()
4231 tmp_mask = inst_mask; in gfx_v9_4_3_xcp_resume()
4241 static int gfx_v9_4_3_xcp_suspend(void *handle, uint32_t inst_mask) in gfx_v9_4_3_xcp_suspend() argument
4246 for_each_inst(i, inst_mask) in gfx_v9_4_3_xcp_suspend()
|
| H A D | gfx_v12_1.c | 4426 static int gfx_v12_1_xcp_resume(void *handle, uint32_t inst_mask) in gfx_v12_1_xcp_resume() argument
4435 tmp_mask = inst_mask; in gfx_v12_1_xcp_resume()
4440 tmp_mask = inst_mask; in gfx_v12_1_xcp_resume()
4448 r = gfx_v12_1_xcc_cp_resume(adev, inst_mask); in gfx_v12_1_xcp_resume()
4453 static int gfx_v12_1_xcp_suspend(void *handle, uint32_t inst_mask) in gfx_v12_1_xcp_suspend() argument
4458 for_each_inst(i, inst_mask) in gfx_v12_1_xcp_suspend()
|
| /linux/drivers/perf/ |
| H A D | nvidia_t410_c2c_pmu.c | 339 unsigned long *inst_mask; in nv_c2c_pmu_read_counter() local
351 inst_mask = c2c_pmu->peer_insts[filter_idx]; in nv_c2c_pmu_read_counter()
352 for_each_set_bit(inst_idx, inst_mask, c2c_pmu->data->nr_inst) { in nv_c2c_pmu_read_counter()
|