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Searched refs:inst_mask (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_xcp.c36 int (*run_func)(void *handle, uint32_t inst_mask); in __amdgpu_xcp_run()
60 ret = run_func(xcp_mgr->adev, xcp_ip->inst_mask); in __amdgpu_xcp_run()
128 uint32_t inst_mask; in __amdgpu_xcp_set_unique_id() local
132 if (!amdgpu_xcp_get_inst_details(xcp, AMDGPU_XCP_GFX, &inst_mask) && in __amdgpu_xcp_set_unique_id()
133 inst_mask) { in __amdgpu_xcp_set_unique_id()
134 i = GET_INST(GC, (ffs(inst_mask) - 1)); in __amdgpu_xcp_set_unique_id()
369 (xcp->ip[ip].inst_mask & BIT(instance))) in amdgpu_xcp_get_partition()
381 uint32_t *inst_mask) in amdgpu_xcp_get_inst_details() argument
383 if (!xcp->valid || !inst_mask || !(xcp->ip[ip].valid)) in amdgpu_xcp_get_inst_details()
386 *inst_mask = xcp->ip[ip].inst_mask; in amdgpu_xcp_get_inst_details()
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H A Dmmhub_v4_2_0.c888 static int mmhub_v4_2_0_xcp_resume(void *handle, uint32_t inst_mask) in mmhub_v4_2_0_xcp_resume() argument
898 mmhub_v4_2_0_mid_set_fault_enable_default(adev, value, inst_mask); in mmhub_v4_2_0_xcp_resume()
901 return mmhub_v4_2_0_mid_gart_enable(adev, inst_mask); in mmhub_v4_2_0_xcp_resume()
906 static int mmhub_v4_2_0_xcp_suspend(void *handle, uint32_t inst_mask) in mmhub_v4_2_0_xcp_suspend() argument
911 mmhub_v4_2_0_mid_gart_disable(adev, inst_mask); in mmhub_v4_2_0_xcp_suspend()
H A Damdgpu_kms.c662 u32 count, inst_mask; in amdgpu_info_ioctl() local
716 ret = amdgpu_xcp_get_inst_details(xcp, AMDGPU_XCP_GFX, &inst_mask); in amdgpu_info_ioctl()
719 count = hweight32(inst_mask); in amdgpu_info_ioctl()
722 ret = amdgpu_xcp_get_inst_details(xcp, AMDGPU_XCP_SDMA, &inst_mask); in amdgpu_info_ioctl()
725 count = hweight32(inst_mask); in amdgpu_info_ioctl()
728 ret = amdgpu_xcp_get_inst_details(xcp, AMDGPU_XCP_VCN, &inst_mask); in amdgpu_info_ioctl()
731 count = hweight32(inst_mask) * adev->jpeg.num_jpeg_rings; in amdgpu_info_ioctl()
734 ret = amdgpu_xcp_get_inst_details(xcp, AMDGPU_XCP_VCN, &inst_mask); in amdgpu_info_ioctl()
737 count = hweight32(inst_mask); in amdgpu_info_ioctl()
H A Damdgpu_discovery.c425 adev->vcn.inst_mask &= ~AMDGPU_VCN_HARVEST_VCN1; in amdgpu_discovery_harvest_config_quirk()
742 adev->vcn.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
744 adev->jpeg.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
748 adev->vcn.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
750 adev->jpeg.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
801 adev->vcn.inst_mask &= in amdgpu_discovery_read_from_harvest_table()
803 adev->jpeg.inst_mask &= in amdgpu_discovery_read_from_harvest_table()
1094 harvest = ((1 << inst) & adev->vcn.inst_mask) == 0; in amdgpu_discovery_get_harvest_info()
1410 adev->vcn.inst_mask = 0; in amdgpu_discovery_reg_base_init()
1411 adev->jpeg.inst_mask = 0; in amdgpu_discovery_reg_base_init()
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H A Dsdma_v5_0.c563 static void sdma_v5_0_gfx_stop(struct amdgpu_device *adev, uint32_t inst_mask) in sdma_v5_0_gfx_stop() argument
568 for_each_inst(i, inst_mask) { in sdma_v5_0_gfx_stop()
660 uint32_t inst_mask; in sdma_v5_0_enable() local
662 inst_mask = GENMASK(adev->sdma.num_instances - 1, 0); in sdma_v5_0_enable()
664 sdma_v5_0_gfx_stop(adev, 1 << inst_mask); in sdma_v5_0_enable()
H A Dsdma_v5_2.c413 static void sdma_v5_2_gfx_stop(struct amdgpu_device *adev, uint32_t inst_mask) in sdma_v5_2_gfx_stop() argument
418 for_each_inst(i, inst_mask) { in sdma_v5_2_gfx_stop()
509 uint32_t inst_mask; in sdma_v5_2_enable() local
511 inst_mask = GENMASK(adev->sdma.num_instances - 1, 0); in sdma_v5_2_enable()
513 sdma_v5_2_gfx_stop(adev, inst_mask); in sdma_v5_2_enable()
H A Damdgpu.h1484 #define for_each_inst(i, inst_mask) \ argument
1485 for (i = ffs(inst_mask); i-- != 0; \
1486 i = ffs(inst_mask & BIT_MASK_UPPER(i + 1)))
H A Dgmc_v9_0.c1831 unsigned long inst_mask = adev->aid_mask; in gmc_v9_0_sw_init() local
1927 inst_mask <<= AMDGPU_MMHUB0(0); in gmc_v9_0_sw_init()
1928 bitmap_or(adev->vmhubs_mask, adev->vmhubs_mask, &inst_mask, 32); in gmc_v9_0_sw_init()
H A Damdgpu_ras.c436 uint32_t mask, inst_mask = data->inject.instance_mask; in amdgpu_ras_instance_mask_check() local
439 if (num_xcc <= 1 && inst_mask) { in amdgpu_ras_instance_mask_check()
443 inst_mask); in amdgpu_ras_instance_mask_check()
460 mask = inst_mask; in amdgpu_ras_instance_mask_check()
466 if (inst_mask != data->inject.instance_mask) in amdgpu_ras_instance_mask_check()
469 inst_mask, data->inject.instance_mask); in amdgpu_ras_instance_mask_check()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_12_ppt.c781 u32 inst_mask; in smu_v13_0_12_get_xcp_metrics() local
785 amdgpu_xcp_get_inst_details(xcp, AMDGPU_XCP_VCN, &inst_mask); in smu_v13_0_12_get_xcp_metrics()
787 for_each_inst(k, inst_mask) { in smu_v13_0_12_get_xcp_metrics()
810 amdgpu_xcp_get_inst_details(xcp, AMDGPU_XCP_GFX, &inst_mask); in smu_v13_0_12_get_xcp_metrics()
812 for_each_inst(k, inst_mask) { in smu_v13_0_12_get_xcp_metrics()
H A Dsmu_v13_0_6_ppt.c2574 u32 inst_mask; in smu_v13_0_6_get_xcp_metrics() local
2607 amdgpu_xcp_get_inst_details(xcp, AMDGPU_XCP_VCN, &inst_mask); in smu_v13_0_6_get_xcp_metrics()
2609 for_each_inst(k, inst_mask) { in smu_v13_0_6_get_xcp_metrics()
2636 amdgpu_xcp_get_inst_details(xcp, AMDGPU_XCP_GFX, &inst_mask); in smu_v13_0_6_get_xcp_metrics()
2638 for_each_inst(k, inst_mask) { in smu_v13_0_6_get_xcp_metrics()
3127 static int smu_v13_0_6_reset_sdma(struct smu_context *smu, uint32_t inst_mask) in smu_v13_0_6_reset_sdma() argument
3135 SMU_MSG_ResetSDMA, inst_mask, NULL); in smu_v13_0_6_reset_sdma()
3139 inst_mask); in smu_v13_0_6_reset_sdma()
3149 static int smu_v13_0_6_reset_vcn(struct smu_context *smu, uint32_t inst_mask) in smu_v13_0_6_reset_vcn() argument
3153 ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_ResetVCN, inst_mask, NULL); in smu_v13_0_6_reset_vcn()
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/linux/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Damdgpu_smu.h1552 int (*reset_sdma)(struct smu_context *smu, uint32_t inst_mask);
1557 int (*dpm_reset_vcn)(struct smu_context *smu, uint32_t inst_mask);
1988 int smu_reset_sdma(struct smu_context *smu, uint32_t inst_mask);
1990 int smu_reset_vcn(struct smu_context *smu, uint32_t inst_mask);
/linux/drivers/gpu/drm/amd/pm/swsmu/
H A Damdgpu_smu.c4145 int smu_reset_sdma(struct smu_context *smu, uint32_t inst_mask) in smu_reset_sdma() argument
4150 ret = smu->ppt_funcs->reset_sdma(smu, inst_mask); in smu_reset_sdma()
4160 int smu_reset_vcn(struct smu_context *smu, uint32_t inst_mask) in smu_reset_vcn() argument
4163 smu->ppt_funcs->dpm_reset_vcn(smu, inst_mask); in smu_reset_vcn()