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Searched refs:i2c (Results 1 – 25 of 2173) sorted by relevance

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/linux/drivers/i2c/busses/
H A Di2c-xiic.c245 #define xiic_tx_space(i2c) ((i2c)->tx_msg->len - (i2c)->tx_pos) argument
246 #define xiic_rx_space(i2c) ((i2c)->rx_msg->len - (i2c)->rx_pos) argument
248 static int xiic_start_xfer(struct xiic_i2c *i2c, struct i2c_msg *msgs, int num);
249 static void __xiic_start_xfer(struct xiic_i2c *i2c);
253 struct xiic_i2c *i2c = dev_get_drvdata(dev); in xiic_i2c_runtime_suspend() local
255 clk_disable(i2c->clk); in xiic_i2c_runtime_suspend()
262 struct xiic_i2c *i2c = dev_get_drvdata(dev); in xiic_i2c_runtime_resume() local
265 ret = clk_enable(i2c->clk); in xiic_i2c_runtime_resume()
282 static inline void xiic_setreg8(struct xiic_i2c *i2c, int reg, u8 value) in xiic_setreg8() argument
284 if (i2c->endianness == LITTLE) in xiic_setreg8()
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H A Di2c-pxa.c273 #define _IBMR(i2c) ((i2c)->reg_ibmr) argument
274 #define _IDBR(i2c) ((i2c)->reg_idbr) argument
275 #define _ICR(i2c) ((i2c)->reg_icr) argument
276 #define _ISR(i2c) ((i2c)->reg_isr) argument
277 #define _ISAR(i2c) ((i2c)->reg_isar) argument
278 #define _ILCR(i2c) ((i2c)->reg_ilcr) argument
279 #define _IWCR(i2c) ((i2c)->reg_iwcr) argument
354 static void i2c_pxa_show_state(struct pxa_i2c *i2c, int lno, const char *fname) in i2c_pxa_show_state() argument
356 dev_dbg(&i2c->adap.dev, "state:%s:%d: ISR=%08x, ICR=%08x, IBMR=%02x\n", fname, lno, in i2c_pxa_show_state()
357 readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c))); in i2c_pxa_show_state()
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H A Di2c-s3c2410.c137 static void i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat);
167 static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c *i2c, int ret) in s3c24xx_i2c_master_complete() argument
169 dev_dbg(i2c->dev, "master_complete %d\n", ret); in s3c24xx_i2c_master_complete()
171 i2c->msg_ptr = 0; in s3c24xx_i2c_master_complete()
172 i2c->msg = NULL; in s3c24xx_i2c_master_complete()
173 i2c->msg_idx++; in s3c24xx_i2c_master_complete()
174 i2c->msg_num = 0; in s3c24xx_i2c_master_complete()
176 i2c->msg_idx = ret; in s3c24xx_i2c_master_complete()
178 if (!(i2c->quirks & (QUIRK_POLL | QUIRK_ATOMIC))) in s3c24xx_i2c_master_complete()
179 wake_up(&i2c->wait); in s3c24xx_i2c_master_complete()
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H A DMakefile7 obj-$(CONFIG_I2C_SCMI) += i2c-scmi.o
10 obj-$(CONFIG_I2C_CCGX_UCSI) += i2c-ccgx-ucsi.o
13 obj-$(CONFIG_I2C_ALI1535) += i2c-ali1535.o
14 obj-$(CONFIG_I2C_ALI1563) += i2c-ali1563.o
15 obj-$(CONFIG_I2C_ALI15X3) += i2c-ali15x3.o
16 obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o
17 obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o
18 obj-$(CONFIG_I2C_CHT_WC) += i2c-cht-wc.o
19 obj-$(CONFIG_I2C_I801) += i2c-i801.o
20 obj-$(CONFIG_I2C_ISCH) += i2c-isch.o
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H A Di2c-k1.c123 static void spacemit_i2c_enable(struct spacemit_i2c_dev *i2c) in spacemit_i2c_enable() argument
127 val = readl(i2c->base + SPACEMIT_ICR); in spacemit_i2c_enable()
129 writel(val, i2c->base + SPACEMIT_ICR); in spacemit_i2c_enable()
132 static void spacemit_i2c_disable(struct spacemit_i2c_dev *i2c) in spacemit_i2c_disable() argument
136 val = readl(i2c->base + SPACEMIT_ICR); in spacemit_i2c_disable()
138 writel(val, i2c->base + SPACEMIT_ICR); in spacemit_i2c_disable()
141 static void spacemit_i2c_reset(struct spacemit_i2c_dev *i2c) in spacemit_i2c_reset() argument
143 writel(SPACEMIT_CR_UR, i2c->base + SPACEMIT_ICR); in spacemit_i2c_reset()
145 writel(0, i2c->base + SPACEMIT_ICR); in spacemit_i2c_reset()
148 static int spacemit_i2c_handle_err(struct spacemit_i2c_dev *i2c) in spacemit_i2c_handle_err() argument
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H A Di2c-img-scb.c414 static void img_i2c_writel(struct img_i2c *i2c, u32 offset, u32 value) in img_i2c_writel() argument
416 writel(value, i2c->base + offset); in img_i2c_writel()
419 static u32 img_i2c_readl(struct img_i2c *i2c, u32 offset) in img_i2c_readl() argument
421 return readl(i2c->base + offset); in img_i2c_readl()
436 static void img_i2c_wr_rd_fence(struct img_i2c *i2c) in img_i2c_wr_rd_fence() argument
438 if (i2c->need_wr_rd_fence) { in img_i2c_wr_rd_fence()
439 img_i2c_writel(i2c, SCB_CORE_REV_REG, 0); in img_i2c_wr_rd_fence()
440 img_i2c_writel(i2c, SCB_CORE_REV_REG, 0); in img_i2c_wr_rd_fence()
444 static void img_i2c_switch_mode(struct img_i2c *i2c, enum img_i2c_mode mode) in img_i2c_switch_mode() argument
446 i2c->mode = mode; in img_i2c_switch_mode()
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H A Di2c-jz4780.c171 static inline unsigned short jz4780_i2c_readw(struct jz4780_i2c *i2c, in jz4780_i2c_readw() argument
174 return readw(i2c->iomem + offset); in jz4780_i2c_readw()
177 static inline void jz4780_i2c_writew(struct jz4780_i2c *i2c, in jz4780_i2c_writew() argument
180 writew(val, i2c->iomem + offset); in jz4780_i2c_writew()
183 static int jz4780_i2c_disable(struct jz4780_i2c *i2c) in jz4780_i2c_disable() argument
188 jz4780_i2c_writew(i2c, JZ4780_I2C_ENB, 0); in jz4780_i2c_disable()
191 regval = jz4780_i2c_readw(i2c, JZ4780_I2C_ENSTA); in jz4780_i2c_disable()
198 dev_err(&i2c->adap.dev, "disable failed: ENSTA=0x%04x\n", regval); in jz4780_i2c_disable()
202 static int jz4780_i2c_enable(struct jz4780_i2c *i2c) in jz4780_i2c_enable() argument
207 jz4780_i2c_writew(i2c, JZ4780_I2C_ENB, 1); in jz4780_i2c_enable()
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H A Di2c-digicolor.c71 static void dc_i2c_cmd(struct dc_i2c *i2c, u8 cmd) in dc_i2c_cmd() argument
73 writeb_relaxed(cmd | II_COMMAND_GO, i2c->regs + II_COMMAND); in dc_i2c_cmd()
86 static void dc_i2c_data(struct dc_i2c *i2c, u8 data) in dc_i2c_data() argument
88 writeb_relaxed(data, i2c->regs + II_DATA); in dc_i2c_data()
91 static void dc_i2c_write_byte(struct dc_i2c *i2c, u8 byte) in dc_i2c_write_byte() argument
93 dc_i2c_data(i2c, byte); in dc_i2c_write_byte()
94 dc_i2c_cmd(i2c, II_CMD_SEND_ACK); in dc_i2c_write_byte()
97 static void dc_i2c_write_buf(struct dc_i2c *i2c) in dc_i2c_write_buf() argument
99 dc_i2c_write_byte(i2c, i2c->msg->buf[i2c->msgbuf_ptr++]); in dc_i2c_write_buf()
102 static void dc_i2c_next_read(struct dc_i2c *i2c) in dc_i2c_next_read() argument
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H A Di2c-synquacer.c148 static inline int is_lastmsg(struct synquacer_i2c *i2c) in is_lastmsg() argument
150 return i2c->msg_idx >= (i2c->msg_num - 1); in is_lastmsg()
153 static inline int is_msglast(struct synquacer_i2c *i2c) in is_msglast() argument
155 return i2c->msg_ptr == (i2c->msg->len - 1); in is_msglast()
158 static inline int is_msgend(struct synquacer_i2c *i2c) in is_msgend() argument
160 return i2c->msg_ptr >= i2c->msg->len; in is_msgend()
163 static inline unsigned long calc_timeout_ms(struct synquacer_i2c *i2c, in calc_timeout_ms() argument
176 static void synquacer_i2c_stop(struct synquacer_i2c *i2c, int ret) in synquacer_i2c_stop() argument
183 writeb(0, i2c->base + SYNQUACER_I2C_REG_BCR); in synquacer_i2c_stop()
185 i2c->state = STATE_IDLE; in synquacer_i2c_stop()
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H A Di2c-octeon-core.c31 struct octeon_i2c *i2c = dev_id; in octeon_i2c_isr() local
33 i2c->int_disable(i2c); in octeon_i2c_isr()
34 wake_up(&i2c->queue); in octeon_i2c_isr()
39 static bool octeon_i2c_test_iflg(struct octeon_i2c *i2c) in octeon_i2c_test_iflg() argument
41 return (octeon_i2c_ctl_read(i2c) & TWSI_CTL_IFLG); in octeon_i2c_test_iflg()
50 static int octeon_i2c_wait(struct octeon_i2c *i2c) in octeon_i2c_wait() argument
58 if (i2c->broken_irq_mode) { in octeon_i2c_wait()
59 u64 end = get_jiffies_64() + i2c->adap.timeout; in octeon_i2c_wait()
61 while (!octeon_i2c_test_iflg(i2c) && in octeon_i2c_wait()
65 return octeon_i2c_test_iflg(i2c) ? 0 : -ETIMEDOUT; in octeon_i2c_wait()
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H A Di2c-exynos5.c272 static void exynos5_i2c_clr_pend_irq(struct exynos5_i2c *i2c) in exynos5_i2c_clr_pend_irq() argument
274 writel(readl(i2c->regs + HSI2C_INT_STATUS), in exynos5_i2c_clr_pend_irq()
275 i2c->regs + HSI2C_INT_STATUS); in exynos5_i2c_clr_pend_irq()
288 static int exynos5_i2c_set_timing(struct exynos5_i2c *i2c, bool hs_timings) in exynos5_i2c_set_timing() argument
300 unsigned int clkin = clk_get_rate(i2c->clk); in exynos5_i2c_set_timing()
301 unsigned int op_clk = hs_timings ? i2c->op_clock : in exynos5_i2c_set_timing()
302 (i2c->op_clock >= I2C_MAX_FAST_MODE_PLUS_FREQ) ? I2C_MAX_STANDARD_MODE_FREQ : in exynos5_i2c_set_timing()
303 i2c->op_clock; in exynos5_i2c_set_timing()
320 if (i2c->variant->hw == I2C_TYPE_EXYNOSAUTOV9) { in exynos5_i2c_set_timing()
321 div = ((clkin / (16 * i2c->op_clock)) - 1); in exynos5_i2c_set_timing()
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H A Di2c-mpc.c109 void (*setup)(struct device_node *node, struct mpc_i2c *i2c, u32 clock);
112 static inline void writeccr(struct mpc_i2c *i2c, u32 x) in writeccr() argument
114 writeb(x, i2c->base + MPC_I2C_CR); in writeccr()
122 static void mpc_i2c_fixup(struct mpc_i2c *i2c) in mpc_i2c_fixup() argument
128 writeccr(i2c, 0); in mpc_i2c_fixup()
129 writeb(0, i2c->base + MPC_I2C_SR); /* clear any status bits */ in mpc_i2c_fixup()
130 writeccr(i2c, CCR_MEN | CCR_MSTA); /* START */ in mpc_i2c_fixup()
131 readb(i2c->base + MPC_I2C_DR); /* init xfer */ in mpc_i2c_fixup()
134 writeccr(i2c, CCR_MEN | CCR_MSTA | CCR_RSTA); /* delay SDA */ in mpc_i2c_fixup()
135 readb(i2c->base + MPC_I2C_DR); in mpc_i2c_fixup()
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H A Di2c-lpc2k.c83 static void i2c_lpc2k_reset(struct lpc2k_i2c *i2c) in i2c_lpc2k_reset() argument
86 writel(LPC24XX_CLEAR_ALL, i2c->base + LPC24XX_I2CONCLR); in i2c_lpc2k_reset()
87 writel(0, i2c->base + LPC24XX_I2ADDR); in i2c_lpc2k_reset()
88 writel(LPC24XX_I2EN, i2c->base + LPC24XX_I2CONSET); in i2c_lpc2k_reset()
91 static int i2c_lpc2k_clear_arb(struct lpc2k_i2c *i2c) in i2c_lpc2k_clear_arb() argument
99 writel(LPC24XX_STO, i2c->base + LPC24XX_I2CONSET); in i2c_lpc2k_clear_arb()
102 while (readl(i2c->base + LPC24XX_I2STAT) != M_I2C_IDLE) { in i2c_lpc2k_clear_arb()
105 i2c_lpc2k_reset(i2c); in i2c_lpc2k_clear_arb()
115 static void i2c_lpc2k_pump_msg(struct lpc2k_i2c *i2c) in i2c_lpc2k_pump_msg() argument
124 status = readl(i2c->base + LPC24XX_I2STAT); in i2c_lpc2k_pump_msg()
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H A Di2c-meson.c108 void (*set_clk_div)(struct meson_i2c *i2c, unsigned int freq);
111 static void meson_i2c_set_mask(struct meson_i2c *i2c, int reg, u32 mask, in meson_i2c_set_mask() argument
116 data = readl(i2c->regs + reg); in meson_i2c_set_mask()
119 writel(data, i2c->regs + reg); in meson_i2c_set_mask()
122 static void meson_i2c_reset_tokens(struct meson_i2c *i2c) in meson_i2c_reset_tokens() argument
124 i2c->tokens[0] = 0; in meson_i2c_reset_tokens()
125 i2c->tokens[1] = 0; in meson_i2c_reset_tokens()
126 i2c->num_tokens = 0; in meson_i2c_reset_tokens()
129 static void meson_i2c_add_token(struct meson_i2c *i2c, int token) in meson_i2c_add_token() argument
131 if (i2c->num_tokens < 8) in meson_i2c_add_token()
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H A Di2c-mt65xx.c541 static u16 mtk_i2c_readw(struct mtk_i2c *i2c, enum I2C_REGS_OFFSET reg) in mtk_i2c_readw() argument
543 return readw(i2c->base + i2c->dev_comp->regs[reg]); in mtk_i2c_readw()
546 static void mtk_i2c_writew(struct mtk_i2c *i2c, u16 val, in mtk_i2c_writew() argument
549 writew(val, i2c->base + i2c->dev_comp->regs[reg]); in mtk_i2c_writew()
552 static void mtk_i2c_init_hw(struct mtk_i2c *i2c) in mtk_i2c_init_hw() argument
558 mtk_i2c_writew(i2c, I2C_CHN_CLR_FLAG, OFFSET_START); in mtk_i2c_init_hw()
559 intr_stat_reg = mtk_i2c_readw(i2c, OFFSET_INTR_STAT); in mtk_i2c_init_hw()
560 mtk_i2c_writew(i2c, intr_stat_reg, OFFSET_INTR_STAT); in mtk_i2c_init_hw()
562 if (i2c->dev_comp->apdma_sync) { in mtk_i2c_init_hw()
563 writel(I2C_DMA_WARM_RST, i2c->pdmabase + OFFSET_RST); in mtk_i2c_init_hw()
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H A Di2c-mxs.c69 #define MXS_I2C_DATA(i2c) ((i2c->dev_type == MXS_I2C_V1) ? 0x60 : 0xa0) argument
71 #define MXS_I2C_DEBUG0_CLR(i2c) ((i2c->dev_type == MXS_I2C_V1) ? 0x78 : 0xb8) argument
132 static int mxs_i2c_reset(struct mxs_i2c_dev *i2c) in mxs_i2c_reset() argument
134 int ret = stmp_reset_block(i2c->regs); in mxs_i2c_reset()
145 writel(i2c->timing0, i2c->regs + MXS_I2C_TIMING0); in mxs_i2c_reset()
146 writel(i2c->timing1, i2c->regs + MXS_I2C_TIMING1); in mxs_i2c_reset()
147 writel(i2c->timing2, i2c->regs + MXS_I2C_TIMING2); in mxs_i2c_reset()
149 writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET); in mxs_i2c_reset()
154 static void mxs_i2c_dma_finish(struct mxs_i2c_dev *i2c) in mxs_i2c_dma_finish() argument
156 if (i2c->dma_read) { in mxs_i2c_dma_finish()
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H A Di2c-thunderx-pcidrv.c41 static void thunder_i2c_int_enable(struct octeon_i2c *i2c) in thunder_i2c_int_enable() argument
44 i2c->twsi_base + TWSI_INT_ENA_W1S); in thunder_i2c_int_enable()
50 static void thunder_i2c_int_disable(struct octeon_i2c *i2c) in thunder_i2c_int_disable() argument
53 i2c->twsi_base + TWSI_INT_ENA_W1C); in thunder_i2c_int_disable()
56 static void thunder_i2c_hlc_int_enable(struct octeon_i2c *i2c) in thunder_i2c_hlc_int_enable() argument
59 i2c->twsi_base + TWSI_INT_ENA_W1S); in thunder_i2c_hlc_int_enable()
62 static void thunder_i2c_hlc_int_disable(struct octeon_i2c *i2c) in thunder_i2c_hlc_int_disable() argument
65 i2c->twsi_base + TWSI_INT_ENA_W1C); in thunder_i2c_hlc_int_disable()
85 static void thunder_i2c_clock_enable(struct device *dev, struct octeon_i2c *i2c) in thunder_i2c_clock_enable() argument
91 i2c->clk = clk_get(dev, NULL); in thunder_i2c_clock_enable()
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H A Di2c-viai2c-common.c5 int viai2c_wait_bus_not_busy(struct viai2c *i2c) in viai2c_wait_bus_not_busy() argument
10 while (!(readw(i2c->base + VIAI2C_REG_CSR) & VIAI2C_CSR_READY_MASK)) { in viai2c_wait_bus_not_busy()
12 dev_warn(i2c->dev, "timeout waiting for bus ready\n"); in viai2c_wait_bus_not_busy()
22 static int viai2c_write(struct viai2c *i2c, struct i2c_msg *pmsg, int last) in viai2c_write() argument
24 u16 val, tcr_val = i2c->tcr; in viai2c_write()
26 i2c->last = last; in viai2c_write()
33 i2c->xfered_len = -1; in viai2c_write()
34 writew(0, i2c->base + VIAI2C_REG_CDR); in viai2c_write()
36 writew(pmsg->buf[0] & 0xFF, i2c->base + VIAI2C_REG_CDR); in viai2c_write()
39 if (i2c->platform == VIAI2C_PLAT_WMT && !(pmsg->flags & I2C_M_NOSTART)) { in viai2c_write()
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H A Di2c-mchp-pci1xxxx.c334 static int set_sys_lock(struct pci1xxxx_i2c *i2c) in set_sys_lock() argument
336 void __iomem *p = i2c->i2c_base + SMB_GPR_LOCK_REG; in set_sys_lock()
347 static int release_sys_lock(struct pci1xxxx_i2c *i2c) in release_sys_lock() argument
349 void __iomem *p = i2c->i2c_base + SMB_GPR_LOCK_REG; in release_sys_lock()
364 static void pci1xxxx_ack_high_level_intr(struct pci1xxxx_i2c *i2c, u16 intr_msk) in pci1xxxx_ack_high_level_intr() argument
366 writew(intr_msk, i2c->i2c_base + SMBUS_GEN_INT_STAT_REG_OFF); in pci1xxxx_ack_high_level_intr()
369 static void pci1xxxx_i2c_configure_smbalert_pin(struct pci1xxxx_i2c *i2c, in pci1xxxx_i2c_configure_smbalert_pin() argument
372 void __iomem *p = i2c->i2c_base + SMBALERT_MST_PAD_CTRL_REG_OFF; in pci1xxxx_i2c_configure_smbalert_pin()
385 static void pci1xxxx_i2c_send_start_stop(struct pci1xxxx_i2c *i2c, bool start) in pci1xxxx_i2c_send_start_stop() argument
387 void __iomem *p = i2c->i2c_base + SMB_CORE_CMD_REG_OFF1; in pci1xxxx_i2c_send_start_stop()
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H A Di2c-viai2c-wmt.c42 static int wmt_i2c_reset_hardware(struct viai2c *i2c) in wmt_i2c_reset_hardware() argument
46 err = clk_prepare_enable(i2c->clk); in wmt_i2c_reset_hardware()
48 return dev_err_probe(i2c->dev, err, "failed to enable clock\n"); in wmt_i2c_reset_hardware()
50 err = clk_set_rate(i2c->clk, 20000000); in wmt_i2c_reset_hardware()
52 clk_disable_unprepare(i2c->clk); in wmt_i2c_reset_hardware()
53 return dev_err_probe(i2c->dev, err, "failed to set clock = 20Mhz\n"); in wmt_i2c_reset_hardware()
56 writew(0, i2c->base + VIAI2C_REG_CR); in wmt_i2c_reset_hardware()
57 writew(MCR_APB_166M, i2c->base + VIAI2C_REG_MCR); in wmt_i2c_reset_hardware()
58 writew(VIAI2C_ISR_MASK_ALL, i2c->base + VIAI2C_REG_ISR); in wmt_i2c_reset_hardware()
59 writew(VIAI2C_IMR_ENABLE_ALL, i2c->base + VIAI2C_REG_IMR); in wmt_i2c_reset_hardware()
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/linux/drivers/media/pci/netup_unidvb/
H A Dnetup_unidvb_i2c.c65 irqreturn_t netup_i2c_interrupt(struct netup_i2c *i2c) in netup_i2c_interrupt() argument
71 spin_lock_irqsave(&i2c->lock, flags); in netup_i2c_interrupt()
72 reg = readw(&i2c->regs->twi_ctrl0_stat); in netup_i2c_interrupt()
73 writew(reg & ~TWI_IRQEN, &i2c->regs->twi_ctrl0_stat); in netup_i2c_interrupt()
74 dev_dbg(i2c->adap.dev.parent, in netup_i2c_interrupt()
77 dev_dbg(i2c->adap.dev.parent, in netup_i2c_interrupt()
79 i2c->state = STATE_DONE; in netup_i2c_interrupt()
83 dev_dbg(i2c->adap.dev.parent, in netup_i2c_interrupt()
85 i2c->state = STATE_ERROR; in netup_i2c_interrupt()
89 dev_dbg(i2c->adap.dev.parent, in netup_i2c_interrupt()
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/linux/drivers/media/pci/ddbridge/
H A Dddbridge-i2c.c31 static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd) in ddb_i2c_cmd() argument
33 struct ddb *dev = i2c->dev; in ddb_i2c_cmd()
37 ddbwritel(dev, (adr << 9) | cmd, i2c->regs + I2C_COMMAND); in ddb_i2c_cmd()
38 stat = wait_for_completion_timeout(&i2c->completion, HZ); in ddb_i2c_cmd()
39 val = ddbreadl(dev, i2c->regs + I2C_COMMAND); in ddb_i2c_cmd()
42 dev->nr, i2c->nr, i2c->link); in ddb_i2c_cmd()
47 if (i2c->link) { in ddb_i2c_cmd()
49 DDB_LINK_TAG(i2c->link) | in ddb_i2c_cmd()
53 i2c->link, listat); in ddb_i2c_cmd()
59 i2c->regs + I2C_MONITOR); in ddb_i2c_cmd()
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/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-facebook-cmm.dts331 i2c-mux@77 {
336 i2c-mux-idle-disconnect;
339 imux16: i2c@0 {
344 i2c-mux@70 {
349 i2c-mux-idle-disconnect;
351 imux104: i2c@0 {
356 imux105: i2c@1 {
361 imux106: i2c@2 {
366 imux107: i2c@3 {
371 imux108: i2c@4 {
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/linux/drivers/gpu/drm/xe/
H A Dxe_i2c.c65 struct xe_i2c *i2c = container_of(work, struct xe_i2c, work); in xe_i2c_client_work() local
69 .addr = i2c->ep.addr[1], in xe_i2c_client_work()
72 i2c->client[0] = i2c_new_client_device(i2c->adapter, &info); in xe_i2c_client_work()
77 struct xe_i2c *i2c = container_of(nb, struct xe_i2c, bus_notifier); in xe_i2c_notifier() local
82 adapter && dev->parent == &i2c->pdev->dev) { in xe_i2c_notifier()
83 i2c->adapter = adapter; in xe_i2c_notifier()
84 schedule_work(&i2c->work); in xe_i2c_notifier()
91 static int xe_i2c_register_adapter(struct xe_i2c *i2c) in xe_i2c_register_adapter() argument
93 struct pci_dev *pci = to_pci_dev(i2c->drm_dev); in xe_i2c_register_adapter()
114 if (i2c->adapter_irq) { in xe_i2c_register_adapter()
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/linux/sound/soc/codecs/
H A Dwm2000.c61 struct i2c_client *i2c; member
81 static int wm2000_write(struct i2c_client *i2c, unsigned int reg, in wm2000_write() argument
84 struct wm2000_priv *wm2000 = i2c_get_clientdata(i2c); in wm2000_write()
90 struct i2c_client *i2c = wm2000->i2c; in wm2000_reset() local
92 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_ANC_ENG_CLR); in wm2000_reset()
93 wm2000_write(i2c, WM2000_REG_SYS_CTL2, WM2000_RAM_CLR); in wm2000_reset()
94 wm2000_write(i2c, WM2000_REG_ID1, 0); in wm2000_reset()
99 static int wm2000_poll_bit(struct i2c_client *i2c, in wm2000_poll_bit() argument
102 struct wm2000_priv *wm2000 = i2c_get_clientdata(i2c); in wm2000_poll_bit()
119 static int wm2000_power_up(struct i2c_client *i2c, int analogue) in wm2000_power_up() argument
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