| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_stream.c | 275 if (enable_cursor_offload && dc->hwss.begin_cursor_offload_update) { in program_cursor_attributes() 276 dc->hwss.begin_cursor_offload_update(dc, pipe_ctx); in program_cursor_attributes() 278 dc->hwss.cursor_lock(dc, pipe_to_program, true); in program_cursor_attributes() 280 dc->hwss.cursor_lock(dc, pipe_to_program->next_odm_pipe, true); in program_cursor_attributes() 284 dc->hwss.set_cursor_attribute(pipe_ctx); in program_cursor_attributes() 287 if (dc->hwss.set_cursor_sdr_white_level) in program_cursor_attributes() 288 dc->hwss.set_cursor_sdr_white_level(pipe_ctx); in program_cursor_attributes() 289 if (enable_cursor_offload && dc->hwss.update_cursor_offload_pipe) in program_cursor_attributes() 290 dc->hwss.update_cursor_offload_pipe(dc, pipe_ctx); in program_cursor_attributes() 294 if (enable_cursor_offload && dc->hwss.commit_cursor_offload_update) { in program_cursor_attributes() [all …]
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| H A D | dc.c | 435 if (dc->hwss.set_long_vtotal) in set_long_vtotal() 436 dc->hwss.set_long_vtotal(&pipe, 1, adjust->v_total_min, adjust->v_total_max); in set_long_vtotal() 499 dc->hwss.set_drr(&pipe, in dc_stream_adjust_vmin_vmax() 504 if (dc->hwss.notify_cursor_offload_drr_update) in dc_stream_adjust_vmin_vmax() 505 dc->hwss.notify_cursor_offload_drr_update(dc, dc->current_state, stream); in dc_stream_adjust_vmin_vmax() 886 dc->hwss.program_gamut_remap(pipes); in dc_stream_set_gamut_remap() 907 dc->hwss.program_output_csc(dc, in dc_stream_program_csc_matrix() 942 dc->hwss.set_static_screen_control(pipes_affected, num_pipes_affected, params); in dc_stream_set_static_screen_params() 1223 if (dc->hwss.interdependent_update_lock) in apply_ctx_interdependent_lock() 1224 dc->hwss.interdependent_update_lock(dc, context, lock); in apply_ctx_interdependent_lock() [all …]
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| H A D | dc_vm_helper.c | 42 if (dc->hwss.init_sys_ctx) { in dc_setup_system_context() 43 num_vmids = dc->hwss.init_sys_ctx(dc->hwseq, dc, pa_config); in dc_setup_system_context() 59 dc->hwss.init_vm_ctx(dc->hwseq, dc, va_config, vmid); in dc_setup_vm_context()
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| H A D | dc_hw_sequencer.c | 752 if (dc->hwss.wait_for_dcc_meta_propagation) { in hwss_build_fast_sequence() 758 if (dc->hwss.subvp_pipe_control_lock_fast) { in hwss_build_fast_sequence() 766 if (dc->hwss.dmub_hw_control_lock_fast) { in hwss_build_fast_sequence() 776 if (dc->hwss.pipe_control_lock) { in hwss_build_fast_sequence() 797 if (dc->hwss.set_flip_control_gsl && current_mpc_pipe->plane_state->update_flags.raw) { in hwss_build_fast_sequence() 803 …if (dc->hwss.program_triplebuffer && dc->debug.enable_tri_buf && current_mpc_pipe->plane_state->up… in hwss_build_fast_sequence() 810 … if (dc->hwss.update_plane_addr && current_mpc_pipe->plane_state->update_flags.bits.addr_update) { in hwss_build_fast_sequence() 834 …if (dc->hwss.program_gamut_remap && current_mpc_pipe->plane_state->update_flags.bits.gamut_remap_c… in hwss_build_fast_sequence() 858 dc->hwss.update_visual_confirm_color) { in hwss_build_fast_sequence() 893 if (dc->hwss.pipe_control_lock) { in hwss_build_fast_sequence() [all …]
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| H A D | dc_surface.c | 156 dc->hwss.update_pending_status(pipe_ctx); in dc_plane_get_status() 295 if (dc->hwss.clear_surface_dcc_and_tiling) in dc_plane_force_dcc_and_tiling_disable() 296 dc->hwss.clear_surface_dcc_and_tiling(pipe_ctx, plane_state, clear_tiling); in dc_plane_force_dcc_and_tiling_disable()
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| H A D | dc_resource.c | 4350 if ((dc->hwss.calculate_pix_rate_divider) && (res == DC_OK)) { in dc_validate_with_context() 4352 dc->hwss.calculate_pix_rate_divider(dc, context, add_streams[i]); in dc_validate_with_context()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| H A D | dcn35_hwseq.c | 534 dc->hwss.edp_power_control) { in dcn35_power_down_on_boot() 537 dc->hwss.edp_power_control(edp_link, false); in dcn35_power_down_on_boot() 742 dc->hwss.disable_plane(dc, context, pipe_ctx); in dcn35_init_pipes() 862 dc->hwss.wait_for_mpcc_disconnect(dc, dc->res_pool, pipe_ctx); in dcn35_plane_atomic_disable() 873 dc->hwss.set_flip_control_gsl(pipe_ctx, false); in dcn35_plane_atomic_disable() 1360 if (dc->hwss.calc_blocks_to_ungate) { in dcn35_prepare_bandwidth() 1361 dc->hwss.calc_blocks_to_ungate(dc, context, &pg_update_state); in dcn35_prepare_bandwidth() 1363 if (dc->hwss.root_clock_control) in dcn35_prepare_bandwidth() 1364 dc->hwss.root_clock_control(dc, &pg_update_state, true); in dcn35_prepare_bandwidth() 1366 if (dc->hwss.hw_block_power_up) in dcn35_prepare_bandwidth() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.c | 701 dc->hwss.wait_for_mpcc_disconnect(dc, dc->res_pool, pipe_ctx); in dcn20_plane_atomic_disable() 712 dc->hwss.set_flip_control_gsl(pipe_ctx, false); in dcn20_plane_atomic_disable() 1220 dc->hwss.set_abm_immediate_disable(pipe_ctx); in dcn20_blank_pixel_data() 1234 dc->hwss.set_disp_pattern_generator(dc, in dcn20_blank_pixel_data() 1247 dc->hwss.set_disp_pattern_generator(dc, in dcn20_blank_pixel_data() 1259 dc->hwss.set_pipe(pipe_ctx); in dcn20_blank_pixel_data() 1789 if (dc->hwss.abort_cursor_offload_update) in dcn20_update_dchubp_dpp() 1790 dc->hwss.abort_cursor_offload_update(dc, pipe_ctx); in dcn20_update_dchubp_dpp() 1792 dc->hwss.set_cursor_attribute(pipe_ctx); in dcn20_update_dchubp_dpp() 1793 dc->hwss.set_cursor_position(pipe_ctx); in dcn20_update_dchubp_dpp() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 242 if (dc->hwss.enable_accelerated_mode && dc->debug.disable_boot_optimizations) in dcn401_init_hw() 243 dc->hwss.enable_accelerated_mode(dc, dc->current_state); in dcn401_init_hw() 279 dc->hwss.edp_backlight_control && in dcn401_init_hw() 281 dc->hwss.edp_power_control) { in dcn401_init_hw() 282 dc->hwss.edp_backlight_control(edp_link, false); in dcn401_init_hw() 284 dc->hwss.edp_power_control(edp_link, false); in dcn401_init_hw() 992 if (dc->hwss.program_dmdata_engine) in dcn401_enable_stream() 993 dc->hwss.program_dmdata_engine(pipe_ctx); in dcn401_enable_stream() 996 dc->hwss.update_info_frame(pipe_ctx); in dcn401_enable_stream() 1048 link->dc->hwss.edp_backlight_control && in dcn401_disable_link_output() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| H A D | dcn10_hwseq.c | 128 dc->hwss.calc_vupdate_position(dc, pipe_ctx, &vupdate_start, in dcn10_wait_for_pipe_update_if_needed() 131 dc->hwss.get_position(&pipe_ctx, 1, &position); in dcn10_wait_for_pipe_update_if_needed() 189 dc->hwss.get_position(&pipe_ctx, 1, &position); in dcn10_set_wait_for_update_needed_for_pipe() 192 dc->hwss.calc_vupdate_position(dc, pipe_ctx, &vupdate_start, in dcn10_set_wait_for_update_needed_for_pipe() 246 dc->hwss.pipe_control_lock(dc, pipe_ctx, true); in dcn10_lock_all_pipes() 248 dc->hwss.pipe_control_lock(dc, pipe_ctx, false); in dcn10_lock_all_pipes() 624 if (dc->hwss.log_color_state) in dcn10_log_hw_state() 625 dc->hwss.log_color_state(dc, log_ctx); in dcn10_log_hw_state() 1143 dc->hwss.wait_for_mpcc_disconnect(dc, dc->res_pool, old_pipe_ctx); in false_optc_underflow_wa() 1305 dc->hwss.disable_audio_stream(pipe_ctx); in dcn10_reset_back_end_for_pipe() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/ |
| H A D | clk_mgr.c | 104 if (dc->hwss.exit_optimized_pwr_state) in clk_mgr_exit_optimized_pwr_state() 105 dc->hwss.exit_optimized_pwr_state(dc, dc->current_state); in clk_mgr_exit_optimized_pwr_state() 142 if (dc->hwss.optimize_pwr_state) in clk_mgr_optimize_pwr_state() 143 dc->hwss.optimize_pwr_state(dc, dc->current_state); in clk_mgr_optimize_pwr_state()
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| /linux/drivers/gpu/drm/amd/display/dc/link/ |
| H A D | link_dpms.c | 735 dc->hwss.set_avmute(pipe_ctx, enable); in set_avmute() 1872 link->dc->hwss.edp_power_control(link, false); in disable_link_dp() 1893 link->dc->hwss.disable_link_output(link, link_res, SIGNAL_TYPE_DISPLAY_PORT); in disable_link() 1895 link->dc->hwss.disable_link_output(link, link_res, signal); in disable_link() 1968 dc->hwss.enable_tmds_link_output( in enable_link_hdmi() 2035 link->dc->hwss.edp_power_control(link, true); in enable_link_dp() 2036 link->dc->hwss.edp_wait_for_hpd_ready(link, true); in enable_link_dp() 2121 dc->hwss.enable_lvds_link_output( in enable_link_lvds() 2164 link->dc->hwss.enable_analog_link_output( in enable_link_analog() 2174 link->dc->hwss.enable_dp_link_output(link, in enable_link_virtual() [all …]
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| H A D | Makefile | 49 AMD_DAL_LINK_HWSS = $(addprefix $(AMDDALPATH)/dc/link/hwss/, \
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| H A D | link_detection.c | 1430 link->dc->hwss.edp_power_control(link, true); in link_detect_connection_type() 1431 link->dc->hwss.edp_wait_for_hpd_ready(link, true); in link_detect_connection_type() 1453 link->dc->hwss.edp_power_control(link, false); in link_detect_connection_type()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/ |
| H A D | dcn30_hwseq.c | 621 dc->hwss.disable_writeback(dc, wb_info.dwb_pipe_inst); in dcn30_program_all_writeback_pipes_in_tree() 629 dc->hwss.update_writeback(dc, &wb_info, context); in dcn30_program_all_writeback_pipes_in_tree() 632 dc->hwss.enable_writeback(dc, &wb_info, context); in dcn30_program_all_writeback_pipes_in_tree() 636 dc->hwss.disable_writeback(dc, wb_info.dwb_pipe_inst); in dcn30_program_all_writeback_pipes_in_tree() 757 dc->hwss.edp_backlight_control && in dcn30_init_hw() 759 dc->hwss.edp_power_control) { in dcn30_init_hw() 760 dc->hwss.edp_backlight_control(edp_link, false); in dcn30_init_hw() 762 dc->hwss.edp_power_control(edp_link, false); in dcn30_init_hw() 974 dc->hwss.does_plane_fit_in_mall && in dcn30_apply_idle_power_optimizations() 975 dc->hwss.does_plane_fit_in_mall(dc, plane->plane_size.surface_pitch, in dcn30_apply_idle_power_optimizations()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| H A D | dcn32_hwseq.c | 880 if (dc->hwss.enable_accelerated_mode && dc->debug.disable_boot_optimizations) in dcn32_init_hw() 881 dc->hwss.enable_accelerated_mode(dc, dc->current_state); in dcn32_init_hw() 917 dc->hwss.edp_backlight_control && in dcn32_init_hw() 919 dc->hwss.edp_power_control) { in dcn32_init_hw() 920 dc->hwss.edp_backlight_control(edp_link, false); in dcn32_init_hw() 922 dc->hwss.edp_power_control(edp_link, false); in dcn32_init_hw() 1411 link->dc->hwss.edp_backlight_control && in dcn32_disable_link_output() 1413 link->dc->hwss.edp_backlight_control(link, false); in dcn32_disable_link_output() 1843 dc->hwss.pipe_control_lock(dc, pipe, true); in dcn32_interdependent_update_lock() 1845 dc->hwss.pipe_control_lock(dc, pipe, false); in dcn32_interdependent_update_lock()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | Makefile | 25 DC_LIBS = basics bios dml clk_mgr dce gpio hwss irq link dsc resource optc dpp hubbub dccg hubp dio…
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| H A D | dc.h | 1781 struct hw_sequencer_funcs hwss; member
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| H A D | dcn201_hwseq.c | 346 dc->hwss.disable_plane(dc, context, pipe_ctx); in dcn201_init_hw() 489 dc->hwss.update_visual_confirm_color(dc, pipe_ctx, mpcc_id); in dcn201_update_mpcc() 514 dc->hwss.update_visual_confirm_color(dc, pipe_ctx, mpcc_id); in dcn201_update_mpcc()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| H A D | dce110_hwseq.c | 677 dc->hwss.update_info_frame(pipe_ctx); in dce110_enable_stream() 1166 dc->hwss.disable_audio_stream(pipe_ctx); in dce110_disable_stream() 1220 link->dc->hwss.set_abm_immediate_disable(pipe_ctx); in dce110_blank_stream() 1802 dc->hwss.disable_plane(dc, dc->current_state, in disable_vga_and_power_gate_all_controllers() 2017 dc->hwss.edp_power_control(edp_link_with_sink, false); in dce110_enable_accelerated_mode() 2347 dc->hwss.disable_plane(dc, dc->current_state, pipe_ctx_old); in dce110_reset_hw_ctx_wrap() 3050 dc->hwss.update_plane_addr(dc, pipe_ctx); in dce110_apply_ctx_for_surface() 3295 link->dc->hwss.edp_wait_for_hpd_ready(link, true); in dce110_enable_dp_link_output() 3349 link->dc->hwss.edp_backlight_control && in dce110_disable_link_output() 3351 link->dc->hwss.edp_backlight_control(link, false); in dce110_disable_link_output() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn31/ |
| H A D | dcn31_hwseq.c | 523 dc->hwss.set_abm_immediate_disable(pipe_ctx); in dcn31_reset_back_end_for_pipe() 532 dc->hwss.blank_stream(pipe_ctx); in dcn31_reset_back_end_for_pipe() 575 dc->hwss.disable_audio_stream(pipe_ctx); in dcn31_reset_back_end_for_pipe()
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_debugfs.c | 3933 if (!dc->hwss.log_hw_state) in dtn_log_read() 3936 dc->hwss.log_hw_state(dc, &log_ctx); in dtn_log_read() 3971 if (dc->hwss.log_hw_state) in dtn_log_write() 3972 dc->hwss.log_hw_state(dc, NULL); in dtn_log_write() 4308 if (!dc->hwss.get_dcc_en_bits) { in dcc_en_bits_read() 4313 dc->hwss.get_dcc_en_bits(dc, dcc_en_bits); in dcc_en_bits_read()
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_clock_source.c | 1205 if (clock_source->ctx->dc->hwss.enable_vblanks_synchronization && in get_pixel_clk_frequency_100hz() 1292 if (clock_source->ctx->dc->hwss.enable_vblanks_synchronization && in dcn20_program_pix_clk()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| H A D | dcn31_resource.c | 2249 if (link->dc->hwss.calculate_pix_rate_divider) { in dcn31_update_dc_state_for_encoder_switch() 2252 link->dc->hwss.calculate_pix_rate_divider((struct dc *)link->dc, state, state->streams[i]); in dcn31_update_dc_state_for_encoder_switch()
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