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Searched refs:hwp (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/net/ethernet/freescale/
H A Dfec_ptp.c105 tempval = readl(fep->hwp + FEC_ATIME_CTRL); in fec_ptp_read()
107 writel(tempval, fep->hwp + FEC_ATIME_CTRL); in fec_ptp_read()
112 return readl(fep->hwp + FEC_ATIME); in fec_ptp_read()
145 writel(FEC_T_TF_MASK, fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
151 val = readl(fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
154 writel(val, fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
155 val = readl(fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
197 writel(val, fep->hwp + FEC_TCCR(fep->pps_channel)); in fec_ptp_enable_pps()
203 val = readl(fep->hwp + FEC_ATIME_CTRL); in fec_ptp_enable_pps()
205 writel(val, fep->hwp + FEC_ATIME_CTRL); in fec_ptp_enable_pps()
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/linux/drivers/scsi/csiostor/
H A Dcsio_lnode.h137 struct csio_hw *hwp; /* Pointer to the HW module */ member
191 #define csio_lnode_to_hw(ln) ((ln)->hwp)
204 csio_dbg(_ln->hwp, "%x:%x "_fmt, CSIO_DEVID_HI(_ln), \
208 csio_err(_ln->hwp, "%x:%x "_fmt, CSIO_DEVID_HI(_ln), \
212 csio_warn(_ln->hwp, "%x:%x "_fmt, CSIO_DEVID_HI(_ln), \
H A Dcsio_scsi.c203 struct csio_hw *hw = req->lnode->hwp; in csio_scsi_init_cmd_wr()
258 struct csio_hw *hw = req->lnode->hwp; in csio_scsi_cmd()
362 struct csio_hw *hw = req->lnode->hwp; in csio_scsi_init_read_wr()
415 struct csio_hw *hw = req->lnode->hwp; in csio_scsi_init_write_wr()
483 struct csio_hw *hw = req->lnode->hwp; in csio_scsi_read()
520 struct csio_hw *hw = req->lnode->hwp; in csio_scsi_write()
556 struct csio_hw *hw = req->lnode->hwp; in csio_setup_ddp()
649 struct csio_hw *hw = req->lnode->hwp; in csio_scsi_init_abrt_cls_wr()
677 struct csio_hw *hw = req->lnode->hwp; in csio_scsi_abrt_cls()
705 struct csio_hw *hw = req->lnode->hwp; in csio_scsis_uninit()
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H A Dcsio_lnode.c683 struct csio_hw *hw = ln->hwp; in csio_ln_vnp_read()
720 struct csio_hw *hw = ln->hwp; in csio_fcoe_enable_link()
834 struct csio_hw *hw = ln->hwp; in csio_ln_read_fcf_entry()
1699 io_req->lnode->hwp, io_req->iq_idx)); in csio_ln_prep_ecwr()
/linux/drivers/clk/
H A Dclk-stm32h7.c856 struct clk_hw *hwp; in odf_divider_set_rate() local
860 hwp = clk_hw_get_parent(hw); in odf_divider_set_rate()
862 pll_status = pll_is_enabled(hwp); in odf_divider_set_rate()
865 pll_disable(hwp); in odf_divider_set_rate()
870 pll_enable(hwp); in odf_divider_set_rate()
883 struct clk_hw *hwp; in odf_gate_enable() local
890 hwp = clk_hw_get_parent(hw); in odf_gate_enable()
892 pll_status = pll_is_enabled(hwp); in odf_gate_enable()
895 pll_disable(hwp); in odf_gate_enable()
900 pll_enable(hwp); in odf_gate_enable()
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H A Dclk.c4677 struct clk_hw **hwp; in devm_clk_hw_register() local
4680 hwp = devres_alloc(devm_clk_hw_unregister_cb, sizeof(*hwp), GFP_KERNEL); in devm_clk_hw_register()
4681 if (!hwp) in devm_clk_hw_register()
4686 *hwp = hw; in devm_clk_hw_register()
4687 devres_add(dev, hwp); in devm_clk_hw_register()
4689 devres_free(hwp); in devm_clk_hw_register()
/linux/drivers/isdn/hardware/mISDN/
H A Diohelper.h16 typedef u8 (read_reg_func)(void *hwp, u8 offset);
17 typedef void (write_reg_func)(void *hwp, u8 offset, u8 value);
18 typedef void (fifo_func)(void *hwp, u8 offset, u8 *datap, int size);
/linux/mm/
H A Dmemory-failure.c714 struct hwpoison_walk *hwp) in check_hwpoisoned_pmd_entry() argument
723 if (pfn <= hwp->pfn && hwp->pfn < pfn + HPAGE_PMD_NR) { in check_hwpoisoned_pmd_entry()
724 hwpoison_vaddr = addr + ((hwp->pfn - pfn) << PAGE_SHIFT); in check_hwpoisoned_pmd_entry()
725 set_to_kill(&hwp->tk, hwpoison_vaddr, PAGE_SHIFT); in check_hwpoisoned_pmd_entry()
732 struct hwpoison_walk *hwp) in check_hwpoisoned_pmd_entry() argument
741 struct hwpoison_walk *hwp = walk->private; in hwpoison_pte_range() local
748 ret = check_hwpoisoned_pmd_entry(pmdp, addr, hwp); in hwpoison_pte_range()
760 hwp->pfn, &hwp->tk); in hwpoison_pte_range()
775 struct hwpoison_walk *hwp = walk->private; in hwpoison_hugetlb_range() local
784 hwp->pfn, &hwp->tk); in hwpoison_hugetlb_range()
/linux/drivers/clk/stm32/
H A Dclk-stm32-core.c500 struct clk_hw *hwp = clk_hw_get_parent_by_index(hw, index); in clk_stm32_composite_set_parent() local
502 clk_hw_reparent(other_mux_hw, hwp); in clk_stm32_composite_set_parent()
H A Dclk-stm32mp1.c723 struct clk_hw *hwp; in clk_mmux_set_parent() local
730 hwp = clk_hw_get_parent(hw); in clk_mmux_set_parent()
734 clk_hw_reparent(clk_mmux->mmux->hws[n], hwp); in clk_mmux_set_parent()
/linux/tools/arch/x86/kcpuid/
H A Dcpuid.csv161 0x6, 0, eax, 7, hwp , HWP (Hardware P-states) base registers are supported