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Searched refs:hubp (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn32/
H A Ddcn32_hubp.h47 void hubp32_update_force_pstate_disallow(struct hubp *hubp, bool pstate_disallow);
49 void hubp32_update_force_cursor_pstate_disallow(struct hubp *hubp, bool pstate_disallow);
51 void hubp32_update_mall_sel(struct hubp *hubp, uint32_t mall_sel, bool c_cursor);
53 void hubp32_prepare_subvp_buffering(struct hubp *hubp, bool enable);
55 void hubp32_phantom_hubp_post_enable(struct hubp *hubp);
57 void hubp32_cursor_set_attributes(struct hubp *hubp,
60 void hubp32_init(struct hubp *hubp);
/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn201/
H A Ddcn201_hubp.c43 struct hubp *hubp, in hubp201_program_surface_config() argument
52 hubp1_dcc_control(hubp, dcc->enable, dcc->independent_64b_blks); in hubp201_program_surface_config()
53 hubp1_program_tiling(hubp, tiling_info, format); in hubp201_program_surface_config()
54 hubp1_program_size(hubp, format, plane_size, dcc); in hubp201_program_surface_config()
55 hubp1_program_pixel_format(hubp, format); in hubp201_program_surface_config()
59 struct hubp *hubp, in hubp201_program_deadline() argument
63 hubp1_program_deadline(hubp, dlg_attr, ttu_attr); in hubp201_program_deadline()
66 static void hubp201_program_requestor(struct hubp *hubp, in hubp201_program_requestor() argument
69 struct dcn201_hubp *hubp201 = TO_DCN201_HUBP(hubp); in hubp201_program_requestor()
97 struct hubp *hubp, in hubp201_setup() argument
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H A Ddcn201_hubp.h32 #define TO_DCN201_HUBP(hubp)\ argument
33 container_of(hubp, struct dcn201_hubp, base)
117 struct hubp base;
/linux/drivers/gpu/drm/amd/display/dc/hwss/
H A Dhw_sequencer.h69 struct hubp *hubp; member
162 struct hubp *hubp; member
173 struct hubp *hubp; member
183 struct hubp *hubp; member
430 struct hubp *hubp; member
444 struct hubp *hubp; member
520 struct hubp *hubp; member
526 struct hubp *hubp; member
531 struct hubp *hubp; member
536 struct hubp *hubp; member
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/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_hw_sequencer.c796 …ck_sequence[*num_steps].params.set_flip_control_gsl_params.hubp = current_mpc_pipe->plane_res.hubp; in hwss_build_fast_sequence()
859 …e[*num_steps].params.update_visual_confirm_params.mpcc_id = current_mpc_pipe->plane_res.hubp->inst; in hwss_build_fast_sequence()
865 …ce[*num_steps].params.power_on_mpc_mem_pwr_params.mpcc_id = current_mpc_pipe->plane_res.hubp->inst; in hwss_build_fast_sequence()
961 params->set_flip_control_gsl_params.hubp->funcs->hubp_set_flip_control_surface_gsl( in hwss_execute_sequence()
962 params->set_flip_control_gsl_params.hubp, in hwss_execute_sequence()
1036 params->hubp_wait_pipe_read_start_params.hubp->funcs->hubp_wait_pipe_read_start( in hwss_execute_sequence()
1037 params->hubp_wait_pipe_read_start_params.hubp); in hwss_execute_sequence()
1345 struct hubp *hubp, in hwss_add_hubp_set_flip_control_gsl() argument
1349 seq_state->steps[*seq_state->num_steps].params.set_flip_control_gsl_params.hubp = hubp; in hwss_add_hubp_set_flip_control_gsl()
1585 struct hubp *hubp) in hwss_add_hubp_wait_pipe_read_start() argument
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H A Ddc.c2510 mpcc_id = res_ctx->pipe_ctx[pipe_idx].plane_res.hubp->inst; in dc_acquire_release_mpc_3dlut()
4276 pipe_ctx->plane_res.hubp->inst); in commit_planes_for_stream()
4367 cur_pipe->plane_res.hubp->funcs->validate_dml_output( in commit_planes_for_stream()
4368 cur_pipe->plane_res.hubp, dc->ctx, in commit_planes_for_stream()
5725 struct hubp *hubp; in blank_and_force_memclk() local
5740 hubp = pipe->plane_res.hubp; in blank_and_force_memclk()
5741 hubp->funcs->set_blank_regs(hubp, true); in blank_and_force_memclk()
5755 hubp = pipe->plane_res.hubp; in blank_and_force_memclk()
5756 hubp->funcs->set_blank_regs(hubp, false); in blank_and_force_memclk()
6560 state->hubp[i].valid_stream = false; in dc_capture_register_software_state()
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H A Ddc_stream.c400 (!pipe_ctx->plane_res.mi && !pipe_ctx->plane_res.hubp) || in program_cursor_position()
496 pipe_ctx->plane_res.hubp->mpcc_id); in dc_stream_program_cursor_position()
797 struct hubp *hubp; in dc_stream_set_dynamic_metadata() local
817 hubp = pipe_ctx->plane_res.hubp; in dc_stream_set_dynamic_metadata()
818 if (hubp == NULL) in dc_stream_set_dynamic_metadata()
827 if (hubp->funcs->dmdata_set_attributes != NULL && in dc_stream_set_dynamic_metadata()
829 hubp->funcs->dmdata_set_attributes(hubp, attr); in dc_stream_set_dynamic_metadata()
H A Ddc_surface.c76 if (pipe_ctx->plane_state == plane_state && pipe_ctx->plane_res.hubp) in dc_plane_get_pipe_mask()
77 pipe_mask |= 1 << pipe_ctx->plane_res.hubp->inst; in dc_plane_get_pipe_mask()
H A Ddc_resource.c2614 split_pipe->plane_res.hubp = pool->hubps[i]; in acquire_first_split_pipe()
3787 pipe_ctx->plane_res.hubp = pool->hubps[id_src[i]]; in acquire_resource_from_hw_enabled_state()
3932 pipe_ctx->plane_res.hubp = pool->hubps[pipe_idx]; in acquire_otg_master_pipe_for_stream()
5556 sec_pipe->plane_res.hubp = pool->hubps[pipe_idx]; in dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c377 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn401_get_mcm_lut_xable_from_pipe_ctx()
408 struct hubp *hubp = pipe_ctx->plane_res.hubp; in dcn401_populate_mcm_luts() local
409 int mpcc_id = hubp->inst; in dcn401_populate_mcm_luts()
470 if (hubp->funcs->hubp_enable_3dlut_fl) in dcn401_populate_mcm_luts()
471 hubp->funcs->hubp_enable_3dlut_fl(hubp, false); in dcn401_populate_mcm_luts()
505 if (hubp->funcs->hubp_program_3dlut_fl_addr) in dcn401_populate_mcm_luts()
506 hubp->funcs->hubp_program_3dlut_fl_addr(hubp, mcm_luts.lut3d_data.gpu_mem_params.addr); in dcn401_populate_mcm_luts()
529 if (hubp->funcs->hubp_program_3dlut_fl_mode) in dcn401_populate_mcm_luts()
530 hubp->funcs->hubp_program_3dlut_fl_mode(hubp, mode); in dcn401_populate_mcm_luts()
532 if (hubp->funcs->hubp_program_3dlut_fl_addressing_mode) in dcn401_populate_mcm_luts()
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/linux/drivers/gpu/drm/amd/display/dc/hubp/
H A DMakefile31 AMD_DAL_HUBP_DCN10 = $(addprefix $(AMDDALPATH)/dc/hubp/dcn10/,$(HUBP_DCN10))
38 AMD_DAL_HUBP_DCN20 = $(addprefix $(AMDDALPATH)/dc/hubp/dcn20/,$(HUBP_DCN20))
46 AMD_DAL_HUBP_DCN201 = $(addprefix $(AMDDALPATH)/dc/hubp/dcn201/,$(HUBP_DCN201))
54 AMD_DAL_HUBP_DCN21 = $(addprefix $(AMDDALPATH)/dc/hubp/dcn21/,$(HUBP_DCN21))
61 AMD_DAL_HUBP_DCN30 = $(addprefix $(AMDDALPATH)/dc/hubp/dcn30/,$(HUBP_DCN30))
69 AMD_DAL_HUBP_DCN31 = $(addprefix $(AMDDALPATH)/dc/hubp/dcn31/,$(HUBP_DCN31))
77 AMD_DAL_HUBP_DCN32 = $(addprefix $(AMDDALPATH)/dc/hubp/dcn32/,$(HUBP_DCN32))
85 AMD_DAL_HUBP_DCN35 = $(addprefix $(AMDDALPATH)/dc/hubp/dcn35/,$(HUBP_DCN35))
93 AMD_DAL_HUBP_DCN401 = $(addprefix $(AMDDALPATH)/dc/hubp/dcn401/,$(HUBP_DCN401))
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
H A Ddcn201_hwseq.c149 pipe_ctx->plane_res.hubp->funcs->hubp_program_surface_flip_and_addr( in dcn201_update_plane_addr()
150 pipe_ctx->plane_res.hubp, in dcn201_update_plane_addr()
307 struct hubp *hubp = res_pool->hubps[i]; in dcn201_init_hw() local
313 pipe_ctx->plane_res.hubp = hubp; in dcn201_init_hw()
316 hubp->mpcc_id = dpp->inst; in dcn201_init_hw()
317 hubp->opp_id = OPP_ID_INVALID; in dcn201_init_hw()
318 hubp->power_gated = false; in dcn201_init_hw()
321 hubp->funcs->hubp_init(hubp); in dcn201_init_hw()
346 pipe_ctx->plane_res.hubp = NULL; in dcn201_init_hw()
380 struct hubp *hubp = pipe_ctx->plane_res.hubp; in dcn201_plane_atomic_disconnect() local
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/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
H A Ddcn20_hwseq.c301 if (pipe_ctx && pipe_ctx->plane_res.hubp->funcs->hubp_set_flip_control_surface_gsl) in dcn20_set_flip_control_gsl()
302 pipe_ctx->plane_res.hubp->funcs->hubp_set_flip_control_surface_gsl( in dcn20_set_flip_control_gsl()
303 pipe_ctx->plane_res.hubp, flip_immediate); in dcn20_set_flip_control_gsl()
397 if (pipe_ctx->plane_res.hubp && pipe_ctx->plane_res.hubp->funcs) { in dcn20_program_triple_buffer()
398 pipe_ctx->plane_res.hubp->funcs->hubp_enable_tripleBuffer( in dcn20_program_triple_buffer()
399 pipe_ctx->plane_res.hubp, in dcn20_program_triple_buffer()
713 struct hubp *hubp = pipe_ctx->plane_res.hubp; in dcn20_plane_atomic_disable() local
724 if (hubp->funcs->hubp_update_mall_sel) in dcn20_plane_atomic_disable()
725 hubp->funcs->hubp_update_mall_sel(hubp, 0, false); in dcn20_plane_atomic_disable()
729 hubp->funcs->hubp_clk_cntl(hubp, false); in dcn20_plane_atomic_disable()
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/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn21/
H A Ddcn21_hubp.h32 #define TO_DCN21_HUBP(hubp)\ argument
33 container_of(hubp, struct dcn21_hubp, base)
106 struct hubp base;
123 struct hubp *hubp,
127 struct hubp *hubp,
132 struct hubp *hubp,
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource_helpers.c44 struct hubp *hubp = pipe_ctx->plane_res.hubp; in dcn32_helper_calculate_mall_bytes_for_cursor() local
45 uint32_t cursor_size = hubp->curs_attr.pitch * hubp->curs_attr.height; in dcn32_helper_calculate_mall_bytes_for_cursor()
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc.h2892 } hubp[MAX_PIPES]; member