1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
5 */
6
7 #ifndef ATH12K_CORE_H
8 #define ATH12K_CORE_H
9
10 #include <linux/types.h>
11 #include <linux/interrupt.h>
12 #include <linux/irq.h>
13 #include <linux/bitfield.h>
14 #include <linux/dmi.h>
15 #include <linux/ctype.h>
16 #include <linux/firmware.h>
17 #include <linux/of_reserved_mem.h>
18 #include <linux/panic_notifier.h>
19 #include <linux/average.h>
20 #include <linux/of.h>
21 #include <linux/rhashtable.h>
22 #include "qmi.h"
23 #include "htc.h"
24 #include "wmi.h"
25 #include "hal.h"
26 #include "dp.h"
27 #include "ce.h"
28 #include "mac.h"
29 #include "hw.h"
30 #include "reg.h"
31 #include "dbring.h"
32 #include "fw.h"
33 #include "acpi.h"
34 #include "wow.h"
35 #include "debugfs_htt_stats.h"
36 #include "coredump.h"
37 #include "cmn_defs.h"
38 #include "dp_cmn.h"
39 #include "thermal.h"
40
41 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
42
43 #define ATH12K_TX_MGMT_NUM_PENDING_MAX 512
44
45 #define ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
46
47 /* Pending management packets threshold for dropping probe responses */
48 #define ATH12K_PRB_RSP_DROP_THRESHOLD ((ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
49
50 /* SMBIOS type containing Board Data File Name Extension */
51 #define ATH12K_SMBIOS_BDF_EXT_TYPE 0xF8
52
53 /* SMBIOS type structure length (excluding strings-set) */
54 #define ATH12K_SMBIOS_BDF_EXT_LENGTH 0x9
55
56 /* The magic used by QCA spec */
57 #define ATH12K_SMBIOS_BDF_EXT_MAGIC "BDF_"
58
59 #define ATH12K_INVALID_HW_MAC_ID 0xFF
60 #define ATH12K_CONNECTION_LOSS_HZ (3 * HZ)
61
62 #define ATH12K_MON_TIMER_INTERVAL 10
63 #define ATH12K_RESET_TIMEOUT_HZ (20 * HZ)
64 #define ATH12K_RESET_MAX_FAIL_COUNT_FIRST 3
65 #define ATH12K_RESET_MAX_FAIL_COUNT_FINAL 5
66 #define ATH12K_RESET_FAIL_TIMEOUT_HZ (20 * HZ)
67 #define ATH12K_RECONFIGURE_TIMEOUT_HZ (10 * HZ)
68 #define ATH12K_RECOVER_START_TIMEOUT_HZ (20 * HZ)
69
70 #define ATH12K_INVALID_GROUP_ID 0xFF
71 #define ATH12K_INVALID_DEVICE_ID 0xFF
72
73 #define ATH12K_MAX_MLO_PEERS 256
74 #define ATH12K_MLO_PEER_ID_INVALID 0xFFFF
75 #define ATH12K_MLO_PEER_ID_PENDING 0xFFFE
76
77 #define ATH12K_INVALID_RSSI_FULL -1
78 #define ATH12K_INVALID_RSSI_EMPTY -128
79
80 enum ath12k_bdf_search {
81 ATH12K_BDF_SEARCH_DEFAULT,
82 ATH12K_BDF_SEARCH_BUS_AND_BOARD,
83 };
84
85 enum wme_ac {
86 WME_AC_BE,
87 WME_AC_BK,
88 WME_AC_VI,
89 WME_AC_VO,
90 WME_NUM_AC
91 };
92
93 #define ATH12K_HT_MCS_MAX 7
94 #define ATH12K_VHT_MCS_MAX 9
95 #define ATH12K_HE_MCS_MAX 11
96 #define ATH12K_EHT_MCS_MAX 15
97
98 enum ath12k_crypt_mode {
99 /* Only use hardware crypto engine */
100 ATH12K_CRYPT_MODE_HW,
101 /* Only use software crypto */
102 ATH12K_CRYPT_MODE_SW,
103 };
104
ath12k_tid_to_ac(u32 tid)105 static inline enum wme_ac ath12k_tid_to_ac(u32 tid)
106 {
107 return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
108 ((tid == 1) || (tid == 2)) ? WME_AC_BK :
109 ((tid == 4) || (tid == 5)) ? WME_AC_VI :
110 WME_AC_VO);
111 }
112
ath12k_le32hilo_to_u64(__le32 hi,__le32 lo)113 static inline u64 ath12k_le32hilo_to_u64(__le32 hi, __le32 lo)
114 {
115 u64 hi64 = le32_to_cpu(hi);
116 u64 lo64 = le32_to_cpu(lo);
117
118 return (hi64 << 32) | lo64;
119 }
120
121 enum ath12k_skb_flags {
122 ATH12K_SKB_HW_80211_ENCAP = BIT(0),
123 ATH12K_SKB_CIPHER_SET = BIT(1),
124 ATH12K_SKB_MLO_STA = BIT(2),
125 };
126
127 struct ath12k_skb_cb {
128 dma_addr_t paddr;
129 struct ath12k *ar;
130 struct ieee80211_vif *vif;
131 dma_addr_t paddr_ext_desc;
132 u32 cipher;
133 u8 flags;
134 u8 link_id;
135 };
136
137 struct ath12k_skb_rxcb {
138 dma_addr_t paddr;
139 bool is_first_msdu;
140 bool is_last_msdu;
141 bool is_continuation;
142 bool is_mcbc;
143 bool is_eapol;
144 struct hal_rx_desc *rx_desc;
145 u8 err_rel_src;
146 u8 err_code;
147 u8 hw_link_id;
148 u8 unmapped;
149 u8 is_frag;
150 u8 tid;
151 u16 peer_id;
152 bool is_end_of_ppdu;
153 };
154
155 enum ath12k_hw_rev {
156 ATH12K_HW_QCN9274_HW10,
157 ATH12K_HW_QCN9274_HW20,
158 ATH12K_HW_WCN7850_HW20,
159 ATH12K_HW_IPQ5332_HW10,
160 ATH12K_HW_QCC2072_HW10,
161 ATH12K_HW_IPQ5424_HW10,
162 };
163
164 #define ATH12K_IRQ_NUM_MAX 57
165 #define ATH12K_EXT_IRQ_NUM_MAX 16
166 #define ATH12K_MAX_TCL_RING_NUM 3
167
168 struct ath12k_ext_irq_grp {
169 struct ath12k_base *ab;
170 u32 irqs[ATH12K_EXT_IRQ_NUM_MAX];
171 u32 num_irq;
172 u32 grp_id;
173 u64 timestamp;
174 bool napi_enabled;
175 struct napi_struct napi;
176 struct net_device *napi_ndev;
177 };
178
179 enum ath12k_smbios_cc_type {
180 /* disable country code setting from SMBIOS */
181 ATH12K_SMBIOS_CC_DISABLE = 0,
182
183 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */
184 ATH12K_SMBIOS_CC_ISO = 1,
185
186 /* worldwide regdomain */
187 ATH12K_SMBIOS_CC_WW = 2,
188 };
189
190 struct ath12k_smbios_bdf {
191 struct dmi_header hdr;
192 u8 features_disabled;
193
194 /* enum ath12k_smbios_cc_type */
195 u8 country_code_flag;
196
197 /* To set specific country, you need to set country code
198 * flag=ATH12K_SMBIOS_CC_ISO first, then if country is United
199 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'=
200 * 0x53). To set country to INDONESIA, then country code value =
201 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag =
202 * ATH12K_SMBIOS_CC_WW, then you can use worldwide regulatory
203 * setting.
204 */
205 u16 cc_code;
206
207 u8 bdf_enabled;
208 u8 bdf_ext[];
209 } __packed;
210
211 #define HEHANDLE_CAP_PHYINFO_SIZE 3
212 #define HECAP_PHYINFO_SIZE 9
213 #define HECAP_MACINFO_SIZE 5
214 #define HECAP_TXRX_MCS_NSS_SIZE 2
215 #define HECAP_PPET16_PPET8_MAX_SIZE 25
216
217 #define HE_PPET16_PPET8_SIZE 8
218
219 /* 802.11ax PPE (PPDU packet Extension) threshold */
220 struct he_ppe_threshold {
221 u32 numss_m1;
222 u32 ru_mask;
223 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
224 };
225
226 struct ath12k_he {
227 u8 hecap_macinfo[HECAP_MACINFO_SIZE];
228 u32 hecap_rxmcsnssmap;
229 u32 hecap_txmcsnssmap;
230 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
231 struct he_ppe_threshold hecap_ppet;
232 u32 heop_param;
233 };
234
235 enum {
236 WMI_HOST_TP_SCALE_MAX = 0,
237 WMI_HOST_TP_SCALE_50 = 1,
238 WMI_HOST_TP_SCALE_25 = 2,
239 WMI_HOST_TP_SCALE_12 = 3,
240 WMI_HOST_TP_SCALE_MIN = 4,
241 WMI_HOST_TP_SCALE_SIZE = 5,
242 };
243
244 enum ath12k_scan_state {
245 ATH12K_SCAN_IDLE,
246 ATH12K_SCAN_STARTING,
247 ATH12K_SCAN_RUNNING,
248 ATH12K_SCAN_ABORTING,
249 };
250
251 enum ath12k_11d_state {
252 ATH12K_11D_IDLE,
253 ATH12K_11D_PREPARING,
254 ATH12K_11D_RUNNING,
255 };
256
257 enum ath12k_hw_group_flags {
258 ATH12K_GROUP_FLAG_REGISTERED,
259 ATH12K_GROUP_FLAG_UNREGISTER,
260 };
261
262 enum ath12k_dev_flags {
263 ATH12K_FLAG_CAC_RUNNING,
264 ATH12K_FLAG_CRASH_FLUSH,
265 ATH12K_FLAG_RAW_MODE,
266 ATH12K_FLAG_HW_CRYPTO_DISABLED,
267 ATH12K_FLAG_RECOVERY,
268 ATH12K_FLAG_UNREGISTERING,
269 ATH12K_FLAG_REGISTERED,
270 ATH12K_FLAG_QMI_FAIL,
271 ATH12K_FLAG_HTC_SUSPEND_COMPLETE,
272 ATH12K_FLAG_CE_IRQ_ENABLED,
273 ATH12K_FLAG_EXT_IRQ_ENABLED,
274 ATH12K_FLAG_QMI_FW_READY_COMPLETE,
275 ATH12K_FLAG_FTM_SEGMENTED,
276 ATH12K_FLAG_FIXED_MEM_REGION,
277 };
278
279 struct ath12k_tx_conf {
280 bool changed;
281 u16 ac;
282 struct ieee80211_tx_queue_params tx_queue_params;
283 };
284
285 struct ath12k_key_conf {
286 enum set_key_cmd cmd;
287 struct list_head list;
288 struct ieee80211_sta *sta;
289 struct ieee80211_key_conf *key;
290 };
291
292 struct ath12k_vif_cache {
293 struct ath12k_tx_conf tx_conf;
294 struct ath12k_key_conf key_conf;
295 u32 bss_conf_changed;
296 };
297
298 struct ath12k_rekey_data {
299 u8 kck[NL80211_KCK_LEN];
300 u8 kek[NL80211_KCK_LEN];
301 u64 replay_ctr;
302 bool enable_offload;
303 };
304
305 struct ath12k_link_vif {
306 u32 vdev_id;
307 u32 beacon_interval;
308 u32 dtim_period;
309
310 struct ath12k *ar;
311
312 bool beacon_prot;
313
314 struct wmi_wmm_params_all_arg wmm_params;
315 struct list_head list;
316
317 bool is_created;
318 bool is_started;
319 bool is_up;
320 u8 bssid[ETH_ALEN];
321 struct cfg80211_bitrate_mask bitrate_mask;
322 struct delayed_work connection_loss_work;
323 int num_legacy_stations;
324 int rtscts_prot_mode;
325 int txpower;
326 bool rsnie_present;
327 bool wpaie_present;
328 u8 vdev_stats_id;
329 u32 punct_bitmap;
330 u8 link_id;
331 struct ath12k_vif *ahvif;
332 struct ath12k_rekey_data rekey_data;
333 struct ath12k_link_stats link_stats;
334 spinlock_t link_stats_lock; /* Protects updates to link_stats */
335
336 u8 current_cntdown_counter;
337
338 /* only used in station mode */
339 bool is_sta_assoc_link;
340
341 struct ath12k_reg_tpc_power_info reg_tpc_info;
342
343 bool group_key_valid;
344 struct wmi_vdev_install_key_arg group_key;
345 bool pairwise_key_done;
346 u16 num_stations;
347 bool is_csa_in_progress;
348 struct wiphy_work bcn_tx_work;
349
350 bool set_wds_vdev_param;
351 bool nawds_enabled;
352 };
353
354 struct ath12k_vif {
355 struct ath12k_dp_vif dp_vif;
356
357 enum wmi_vdev_type vdev_type;
358 enum wmi_vdev_subtype vdev_subtype;
359 struct ieee80211_vif *vif;
360 struct ath12k_hw *ah;
361
362 union {
363 struct {
364 u32 uapsd;
365 } sta;
366 struct {
367 /* 127 stations; wmi limit */
368 u8 tim_bitmap[16];
369 u8 tim_len;
370 u32 ssid_len;
371 u8 ssid[IEEE80211_MAX_SSID_LEN];
372 bool hidden_ssid;
373 /* P2P_IE with NoA attribute for P2P_GO case */
374 u32 noa_len;
375 u8 *noa_data;
376 } ap;
377 } u;
378
379 u32 aid;
380 bool ps;
381
382 struct ath12k_link_vif deflink;
383 struct ath12k_link_vif __rcu *link[ATH12K_NUM_MAX_LINKS];
384 struct ath12k_vif_cache *cache[IEEE80211_MLD_MAX_NUM_LINKS];
385 /* indicates bitmap of link vif created in FW */
386 u32 links_map;
387 /* Must be last - ends in a flexible-array member.
388 *
389 * FIXME: Driver should not copy struct ieee80211_chanctx_conf,
390 * especially because it has a flexible array. Find a better way.
391 */
392 struct ieee80211_chanctx_conf chanctx;
393 };
394
395 struct ath12k_vif_iter {
396 u32 vdev_id;
397 struct ath12k *ar;
398 struct ath12k_link_vif *arvif;
399 };
400
401 #define ATH12K_SCAN_TIMEOUT_HZ (20 * HZ)
402
403 #define ATH12K_HE_MCS_NUM 12
404 #define ATH12K_VHT_MCS_NUM 10
405 #define ATH12K_BW_NUM 5
406 #define ATH12K_NSS_NUM 4
407 #define ATH12K_LEGACY_NUM 12
408 #define ATH12K_GI_NUM 4
409 #define ATH12K_HT_MCS_NUM 32
410
411 enum ath12k_pkt_rx_err {
412 ATH12K_PKT_RX_ERR_FCS,
413 ATH12K_PKT_RX_ERR_TKIP,
414 ATH12K_PKT_RX_ERR_CRYPT,
415 ATH12K_PKT_RX_ERR_PEER_IDX_INVAL,
416 ATH12K_PKT_RX_ERR_MAX,
417 };
418
419 enum ath12k_ampdu_subfrm_num {
420 ATH12K_AMPDU_SUBFRM_NUM_10,
421 ATH12K_AMPDU_SUBFRM_NUM_20,
422 ATH12K_AMPDU_SUBFRM_NUM_30,
423 ATH12K_AMPDU_SUBFRM_NUM_40,
424 ATH12K_AMPDU_SUBFRM_NUM_50,
425 ATH12K_AMPDU_SUBFRM_NUM_60,
426 ATH12K_AMPDU_SUBFRM_NUM_MORE,
427 ATH12K_AMPDU_SUBFRM_NUM_MAX,
428 };
429
430 enum ath12k_amsdu_subfrm_num {
431 ATH12K_AMSDU_SUBFRM_NUM_1,
432 ATH12K_AMSDU_SUBFRM_NUM_2,
433 ATH12K_AMSDU_SUBFRM_NUM_3,
434 ATH12K_AMSDU_SUBFRM_NUM_4,
435 ATH12K_AMSDU_SUBFRM_NUM_MORE,
436 ATH12K_AMSDU_SUBFRM_NUM_MAX,
437 };
438
439 enum ath12k_counter_type {
440 ATH12K_COUNTER_TYPE_BYTES,
441 ATH12K_COUNTER_TYPE_PKTS,
442 ATH12K_COUNTER_TYPE_MAX,
443 };
444
445 enum ath12k_stats_type {
446 ATH12K_STATS_TYPE_SUCC,
447 ATH12K_STATS_TYPE_FAIL,
448 ATH12K_STATS_TYPE_RETRY,
449 ATH12K_STATS_TYPE_AMPDU,
450 ATH12K_STATS_TYPE_MAX,
451 };
452
453 struct ath12k_htt_data_stats {
454 u64 legacy[ATH12K_COUNTER_TYPE_MAX][ATH12K_LEGACY_NUM];
455 u64 ht[ATH12K_COUNTER_TYPE_MAX][ATH12K_HT_MCS_NUM];
456 u64 vht[ATH12K_COUNTER_TYPE_MAX][ATH12K_VHT_MCS_NUM];
457 u64 he[ATH12K_COUNTER_TYPE_MAX][ATH12K_HE_MCS_NUM];
458 u64 bw[ATH12K_COUNTER_TYPE_MAX][ATH12K_BW_NUM];
459 u64 nss[ATH12K_COUNTER_TYPE_MAX][ATH12K_NSS_NUM];
460 u64 gi[ATH12K_COUNTER_TYPE_MAX][ATH12K_GI_NUM];
461 u64 transmit_type[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RECEPTION_TYPE_MAX];
462 u64 ru_loc[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RU_ALLOC_TYPE_MAX];
463 };
464
465 struct ath12k_htt_tx_stats {
466 struct ath12k_htt_data_stats stats[ATH12K_STATS_TYPE_MAX];
467 u64 tx_duration;
468 u64 ba_fails;
469 u64 ack_fails;
470 u16 ru_start;
471 u16 ru_tones;
472 u32 mu_group[MAX_MU_GROUP_ID];
473 };
474
475 struct ath12k_per_ppdu_tx_stats {
476 u16 succ_pkts;
477 u16 failed_pkts;
478 u16 retry_pkts;
479 u32 succ_bytes;
480 u32 failed_bytes;
481 u32 retry_bytes;
482 };
483
484 struct ath12k_link_sta {
485 struct ath12k_link_vif *arvif;
486 struct ath12k_sta *ahsta;
487
488 /* link address similar to ieee80211_link_sta */
489 u8 addr[ETH_ALEN];
490
491 u16 tcl_metadata;
492 u16 ast_hash;
493 u16 ast_idx;
494
495 /* the following are protected by ar->data_lock */
496 u32 changed; /* IEEE80211_RC_* */
497 u32 bw;
498 u32 nss;
499 u32 smps;
500
501 struct wiphy_work update_wk;
502 u8 link_id;
503 u32 bw_prev;
504 u32 peer_nss;
505 s8 rssi_beacon;
506 s8 chain_signal[IEEE80211_MAX_CHAINS];
507
508 /* For now the assoc link will be considered primary */
509 bool is_assoc_link;
510
511 /* for firmware use only */
512 u8 link_idx;
513
514 /* peer addr based rhashtable list pointer */
515 struct rhash_head rhash_addr;
516 };
517
518 struct ath12k_sta {
519 struct ath12k_vif *ahvif;
520 enum hal_pn_type pn_type;
521 struct ath12k_link_sta deflink;
522 struct ath12k_link_sta __rcu *link[IEEE80211_MLD_MAX_NUM_LINKS];
523 /* indicates bitmap of link sta created in FW */
524 u16 links_map;
525 u8 assoc_link_id;
526 u16 ml_peer_id;
527 u16 free_logical_link_idx_map;
528
529 enum ieee80211_sta_state state;
530
531 bool enable_4addr;
532 };
533
534 #define ATH12K_HALF_20MHZ_BW 10
535 #define ATH12K_2GHZ_MIN_CENTER 2412
536 #define ATH12K_2GHZ_MAX_CENTER 2484
537 #define ATH12K_5GHZ_MIN_CENTER 4900
538 #define ATH12K_5GHZ_MAX_CENTER 5920
539 #define ATH12K_6GHZ_MIN_CENTER 5935
540 #define ATH12K_6GHZ_MAX_CENTER 7115
541 #define ATH12K_MIN_2GHZ_FREQ (ATH12K_2GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW - 1)
542 #define ATH12K_MAX_2GHZ_FREQ (ATH12K_2GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW + 1)
543 #define ATH12K_MIN_5GHZ_FREQ (ATH12K_5GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW)
544 #define ATH12K_MAX_5GHZ_FREQ (ATH12K_5GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW)
545 #define ATH12K_MIN_6GHZ_FREQ (ATH12K_6GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW)
546 #define ATH12K_MAX_6GHZ_FREQ (ATH12K_6GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW)
547 #define ATH12K_NUM_CHANS 102
548 #define ATH12K_MAX_5GHZ_CHAN 177
549
ath12k_is_2ghz_channel_freq(u32 freq)550 static inline bool ath12k_is_2ghz_channel_freq(u32 freq)
551 {
552 return freq >= ATH12K_MIN_2GHZ_FREQ &&
553 freq <= ATH12K_MAX_2GHZ_FREQ;
554 }
555
556 enum ath12k_hw_state {
557 ATH12K_HW_STATE_OFF,
558 ATH12K_HW_STATE_ON,
559 ATH12K_HW_STATE_RESTARTING,
560 ATH12K_HW_STATE_RESTARTED,
561 ATH12K_HW_STATE_WEDGED,
562 ATH12K_HW_STATE_TM,
563 /* Add other states as required */
564 };
565
566 /* Antenna noise floor */
567 #define ATH12K_DEFAULT_NOISE_FLOOR -95
568
569 struct ath12k_ftm_event_obj {
570 u32 data_pos;
571 u32 expected_seq;
572 u8 *eventdata;
573 };
574
575 struct ath12k_fw_stats {
576 u32 pdev_id;
577 u32 stats_id;
578 struct list_head pdevs;
579 struct list_head vdevs;
580 struct list_head bcn;
581 u32 num_vdev_recvd;
582 };
583
584 struct ath12k_dbg_htt_stats {
585 enum ath12k_dbg_htt_ext_stats_type type;
586 u32 cfg_param[4];
587 u8 reset;
588 struct debug_htt_stats_req *stats_req;
589 };
590
591 struct ath12k_debug {
592 struct dentry *debugfs_pdev;
593 struct dentry *debugfs_pdev_symlink;
594 struct dentry *debugfs_pdev_symlink_default;
595 struct ath12k_dbg_htt_stats htt_stats;
596 enum wmi_halphy_ctrl_path_stats_id tpc_stats_type;
597 bool tpc_request;
598 struct completion tpc_complete;
599 struct wmi_tpc_stats_arg *tpc_stats;
600 u32 rx_filter;
601 bool extd_rx_stats;
602 };
603
604 struct ath12k_pdev_rssi_offsets {
605 s32 temp_offset;
606 s8 min_nf_dbm;
607 /* Cache the sum here to avoid calculating it every time in hot path
608 * noise_floor = min_nf_dbm + temp_offset
609 */
610 s32 noise_floor;
611 };
612
613 #define ATH12K_FLUSH_TIMEOUT (5 * HZ)
614 #define ATH12K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
615
616 struct ath12k {
617 struct ath12k_base *ab;
618 struct ath12k_pdev *pdev;
619 struct ath12k_hw *ah;
620 struct ath12k_wmi_pdev *wmi;
621 struct ath12k_pdev_dp dp;
622 u8 mac_addr[ETH_ALEN];
623 u32 ht_cap_info;
624 u32 vht_cap_info;
625 struct ath12k_he ar_he;
626 bool supports_6ghz;
627 struct {
628 struct completion started;
629 struct completion completed;
630 struct completion on_channel;
631 struct delayed_work timeout;
632 enum ath12k_scan_state state;
633 bool is_roc;
634 int roc_freq;
635 bool roc_notify;
636 struct wiphy_work vdev_clean_wk;
637 struct ath12k_link_vif *arvif;
638 } scan;
639
640 struct {
641 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
642 struct ieee80211_sband_iftype_data
643 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
644 } mac;
645
646 unsigned long dev_flags;
647 unsigned int filter_flags;
648 u32 min_tx_power;
649 u32 max_tx_power;
650 u32 txpower_limit_2g;
651 u32 txpower_limit_5g;
652 u32 txpower_scale;
653 u32 power_scale;
654 u32 chan_tx_pwr;
655 u32 rts_threshold;
656 u32 num_stations;
657 u32 max_num_stations;
658
659 /* protects the radio specific data like debug stats, ppdu_stats_info stats,
660 * vdev_stop_status info, scan data, ath12k_sta info, ath12k_link_vif info,
661 * channel context data, test mode data, regd_channel_update_queue,
662 * peer_delete_waits.
663 */
664 spinlock_t data_lock;
665
666 struct list_head arvifs;
667 /* should never be NULL; needed for regular htt rx */
668 struct ieee80211_channel *rx_channel;
669
670 /* valid during scan; needed for mgmt rx during scan */
671 struct ieee80211_channel *scan_channel;
672
673 u8 cfg_tx_chainmask;
674 u8 cfg_rx_chainmask;
675 u8 num_rx_chains;
676 u8 num_tx_chains;
677 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
678 u8 pdev_idx;
679 u8 lmac_id;
680 u8 hw_link_id;
681 u8 radio_idx;
682
683 struct completion peer_assoc_done;
684 struct list_head peer_delete_waits;
685
686 int install_key_status;
687 struct completion install_key_done;
688
689 int last_wmi_vdev_start_status;
690 struct completion vdev_setup_done;
691 struct completion vdev_delete_done;
692
693 int num_peers;
694 int max_num_peers;
695 u32 num_started_vdevs;
696 u32 num_created_vdevs;
697 unsigned long long allocated_vdev_map;
698
699 struct idr txmgmt_idr;
700 /* protects txmgmt_idr data */
701 spinlock_t txmgmt_idr_lock;
702 atomic_t num_pending_mgmt_tx;
703 wait_queue_head_t txmgmt_empty_waitq;
704
705 /* cycle count is reported twice for each visited channel during scan.
706 * access protected by data_lock
707 */
708 u32 survey_last_rx_clear_count;
709 u32 survey_last_cycle_count;
710
711 /* Channel info events are expected to come in pairs without and with
712 * COMPLETE flag set respectively for each channel visit during scan.
713 *
714 * However there are deviations from this rule. This flag is used to
715 * avoid reporting garbage data.
716 */
717 bool ch_info_can_report_survey;
718 struct completion bss_survey_done;
719
720 struct work_struct regd_update_work;
721 struct work_struct regd_channel_update_work;
722 struct list_head regd_channel_update_queue;
723
724 struct wiphy_work wmi_mgmt_tx_work;
725 struct sk_buff_head wmi_mgmt_tx_queue;
726
727 struct ath12k_wow wow;
728 struct completion target_suspend;
729 bool target_suspend_ack;
730
731 struct ath12k_per_peer_tx_stats cached_stats;
732 u32 last_ppdu_id;
733 u32 cached_ppdu_id;
734 #ifdef CONFIG_ATH12K_DEBUGFS
735 struct ath12k_debug debug;
736 #endif
737
738 bool dfs_block_radar_events;
739 bool monitor_vdev_created;
740 bool monitor_started;
741 int monitor_vdev_id;
742
743 struct wiphy_radio_freq_range freq_range;
744
745 bool nlo_enabled;
746
747 /* Protected by wiphy::mtx lock. */
748 u32 vdev_id_11d_scan;
749 struct completion completed_11d_scan;
750 enum ath12k_11d_state state_11d;
751 u8 alpha2[REG_ALPHA2_LEN];
752 bool regdom_set_by_user;
753 struct completion regd_update_completed;
754
755 struct completion fw_stats_complete;
756 struct completion fw_stats_done;
757
758 struct completion mlo_setup_done;
759 u32 mlo_setup_status;
760 u8 ftm_msgref;
761 struct ath12k_fw_stats fw_stats;
762 unsigned long last_tx_power_update;
763
764 s8 max_allowed_tx_power;
765 struct ath12k_pdev_rssi_offsets rssi_info;
766
767 struct ath12k_thermal thermal;
768
769 /* Protected by ar->data_lock */
770 struct ath12k_incumbent_signal_interference {
771 u32 center_freq;
772 enum nl80211_chan_width width;
773 u32 chan_bw_interference_bitmap;
774 bool handling_in_progress;
775 } incumbent_signal_interference;
776 };
777
778 struct ath12k_hw {
779 struct ieee80211_hw *hw;
780 struct device *dev;
781
782 /* Protect the write operation of the hardware state ath12k_hw::state
783 * between hardware start<=>reconfigure<=>stop transitions.
784 */
785 struct mutex hw_mutex;
786 enum ath12k_hw_state state;
787
788 /* protects survey[] shared across radios of this hw. */
789 spinlock_t survey_lock;
790 struct survey_info survey[ATH12K_NUM_CHANS];
791
792 bool regd_updated;
793 bool use_6ghz_regd;
794 bool host_alloc_ml_id;
795 struct completion peer_ml_id_done;
796
797 u8 num_radio;
798
799 DECLARE_BITMAP(free_ml_peer_id_map, ATH12K_MAX_MLO_PEERS);
800
801 struct ath12k_dp_hw dp_hw;
802
803 /* Keep last */
804 struct ath12k radio[] __aligned(sizeof(void *));
805 };
806
807 struct ath12k_band_cap {
808 u32 phy_id;
809 u32 max_bw_supported;
810 u32 ht_cap_info;
811 u32 he_cap_info[2];
812 u32 he_mcs;
813 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
814 struct ath12k_wmi_ppe_threshold_arg he_ppet;
815 u16 he_6ghz_capa;
816 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE];
817 u32 eht_cap_phy_info[WMI_MAX_EHTCAP_PHY_SIZE];
818 u32 eht_mcs_20_only;
819 u32 eht_mcs_80;
820 u32 eht_mcs_160;
821 u32 eht_mcs_320;
822 struct ath12k_wmi_ppe_threshold_arg eht_ppet;
823 u32 eht_cap_info_internal;
824 };
825
826 struct ath12k_pdev_cap {
827 u32 supported_bands;
828 u32 ampdu_density;
829 u32 vht_cap;
830 u32 vht_mcs;
831 u32 he_mcs;
832 u32 tx_chain_mask;
833 u32 rx_chain_mask;
834 u32 tx_chain_mask_shift;
835 u32 rx_chain_mask_shift;
836 struct ath12k_band_cap band[NUM_NL80211_BANDS];
837 u32 eml_cap;
838 u32 mld_cap;
839 bool nss_ratio_enabled;
840 u8 nss_ratio_info;
841 };
842
843 struct mlo_timestamp {
844 u32 info;
845 u32 sync_timestamp_lo_us;
846 u32 sync_timestamp_hi_us;
847 u32 mlo_offset_lo;
848 u32 mlo_offset_hi;
849 u32 mlo_offset_clks;
850 u32 mlo_comp_clks;
851 u32 mlo_comp_timer;
852 };
853
854 struct ath12k_pdev {
855 struct ath12k *ar;
856 u32 pdev_id;
857 u32 hw_link_id;
858 struct ath12k_pdev_cap cap;
859 u8 mac_addr[ETH_ALEN];
860 struct mlo_timestamp timestamp;
861 };
862
863 struct ath12k_fw_pdev {
864 u32 pdev_id;
865 u32 phy_id;
866 u32 supported_bands;
867 };
868
869 struct ath12k_board_data {
870 const struct firmware *fw;
871 const void *data;
872 size_t len;
873 };
874
875 struct ath12k_reg_freq {
876 u32 start_freq;
877 u32 end_freq;
878 };
879
880 struct ath12k_mlo_memory {
881 struct target_mem_chunk chunk[ATH12K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01];
882 int mlo_mem_size;
883 bool init_done;
884 };
885
886 struct ath12k_hw_link {
887 u8 device_id;
888 u8 pdev_idx;
889 };
890
891 /* Holds info on the group of devices that are registered as a single
892 * wiphy, protected with struct ath12k_hw_group::mutex.
893 */
894 struct ath12k_hw_group {
895 /* Keep dp_hw_grp as the first member to allow efficient
896 * usage of cache lines for DP fields
897 */
898 struct ath12k_dp_hw_group dp_hw_grp;
899 struct ath12k_hw_link hw_links[ATH12K_GROUP_MAX_RADIO];
900 struct list_head list;
901 u8 id;
902 u8 num_devices;
903 u8 num_probed;
904 u8 num_started;
905 unsigned long flags;
906 struct ath12k_base *ab[ATH12K_MAX_DEVICES];
907
908 /* protects access to this struct */
909 struct mutex mutex;
910
911 /* Holds information of wiphy (hw) registration.
912 *
913 * In Multi/Single Link Operation case, all pdevs are registered as
914 * a single wiphy. In other (legacy/Non-MLO) cases, each pdev is
915 * registered as separate wiphys.
916 */
917 struct ath12k_hw *ah[ATH12K_GROUP_MAX_RADIO];
918 u8 num_hw;
919 bool mlo_capable;
920 struct device_node *wsi_node[ATH12K_MAX_DEVICES];
921 struct ath12k_mlo_memory mlo_mem;
922 bool hw_link_id_init_done;
923 };
924
925 /* Holds WSI info specific to each device, excluding WSI group info */
926 struct ath12k_wsi_info {
927 u32 index;
928 u32 hw_link_id_base;
929 };
930
931 struct ath12k_dp_profile_params {
932 u32 tx_comp_ring_size;
933 u32 rxdma_monitor_buf_ring_size;
934 u32 rxdma_monitor_dst_ring_size;
935 u32 num_pool_tx_desc;
936 u32 rx_desc_count;
937 u32 rx_release_ring_size;
938 };
939
940 struct ath12k_mem_profile_based_param {
941 u32 num_vdevs;
942 u32 max_client_single;
943 u32 max_client_dbs;
944 u32 max_client_dbs_sbs;
945 struct ath12k_dp_profile_params dp_params;
946 };
947
948 enum ath12k_device_family {
949 ATH12K_DEVICE_FAMILY_START,
950 ATH12K_DEVICE_FAMILY_WIFI7 = ATH12K_DEVICE_FAMILY_START,
951 ATH12K_DEVICE_FAMILY_MAX,
952 };
953
954 /* Master structure to hold the hw data which may be used in core module */
955 struct ath12k_base {
956 enum ath12k_hw_rev hw_rev;
957 struct platform_device *pdev;
958 struct device *dev;
959 struct ath12k_qmi qmi;
960 struct ath12k_wmi_base wmi_ab;
961 struct completion fw_ready;
962 u8 device_id;
963 int num_radios;
964 /* HW channel counters frequency value in hertz common to all MACs */
965 u32 cc_freq_hz;
966
967 struct ath12k_dump_file_data *dump_data;
968 size_t ath12k_coredump_len;
969 struct work_struct dump_work;
970
971 struct ath12k_htc htc;
972
973 struct ath12k_dp *dp;
974
975 void __iomem *mem;
976 unsigned long mem_len;
977
978 void __iomem *mem_ce;
979 u32 ce_remap_base_addr;
980 u32 cmem_offset;
981 bool ce_remap;
982
983 struct {
984 enum ath12k_bus bus;
985 const struct ath12k_hif_ops *ops;
986 } hif;
987
988 struct {
989 struct completion wakeup_completed;
990 u32 wmi_conf_rx_decap_mode;
991 } wow;
992
993 struct ath12k_ce ce;
994 struct timer_list rx_replenish_retry;
995 struct ath12k_hal hal;
996 /* To synchronize core_start/core_stop */
997 struct mutex core_lock;
998 /* Protects data like peers */
999 spinlock_t base_lock;
1000
1001 /* Single pdev device (struct ath12k_hw_params::single_pdev_only):
1002 *
1003 * Firmware maintains data for all bands but advertises a single
1004 * phy to the host which is stored as a single element in this
1005 * array.
1006 *
1007 * Other devices:
1008 *
1009 * This array will contain as many elements as the number of
1010 * radios.
1011 */
1012 struct ath12k_pdev pdevs[MAX_RADIOS];
1013
1014 /* struct ath12k_hw_params::single_pdev_only devices use this to
1015 * store phy specific data
1016 */
1017 struct ath12k_fw_pdev fw_pdev[MAX_RADIOS];
1018 u8 fw_pdev_count;
1019
1020 struct ath12k_pdev __rcu *pdevs_active[MAX_RADIOS];
1021
1022 struct ath12k_wmi_hal_reg_capabilities_ext_arg hal_reg_cap[MAX_RADIOS];
1023 unsigned long long free_vdev_map;
1024 unsigned long long free_vdev_stats_id_map;
1025 wait_queue_head_t peer_mapping_wq;
1026 u8 mac_addr[ETH_ALEN];
1027 bool wmi_ready;
1028 u32 wlan_init_status;
1029 int irq_num[ATH12K_IRQ_NUM_MAX];
1030 struct ath12k_ext_irq_grp ext_irq_grp[ATH12K_EXT_IRQ_GRP_NUM_MAX];
1031 struct napi_struct *napi;
1032 struct ath12k_wmi_target_cap_arg target_caps;
1033 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
1034 bool pdevs_macaddr_valid;
1035
1036 const struct ath12k_hw_params *hw_params;
1037
1038 const struct firmware *cal_file;
1039
1040 /* Below regd's are protected by ab->data_lock */
1041 /* This is the regd set for every radio
1042 * by the firmware during initialization
1043 */
1044 struct ieee80211_regdomain *default_regd[MAX_RADIOS];
1045 /* This regd is set during dynamic country setting
1046 * This may or may not be used during the runtime
1047 */
1048 struct ieee80211_regdomain *new_regd[MAX_RADIOS];
1049
1050 struct ath12k_reg_info *reg_info[MAX_RADIOS];
1051
1052 /* Current DFS Regulatory */
1053 enum ath12k_dfs_region dfs_region;
1054 #ifdef CONFIG_ATH12K_DEBUGFS
1055 struct dentry *debugfs_soc;
1056 #endif
1057
1058 unsigned long dev_flags;
1059 struct completion driver_recovery;
1060 struct workqueue_struct *workqueue;
1061 struct work_struct restart_work;
1062 struct workqueue_struct *workqueue_aux;
1063 struct work_struct reset_work;
1064 atomic_t reset_count;
1065 atomic_t recovery_count;
1066 bool is_reset;
1067 struct completion reset_complete;
1068 /* continuous recovery fail count */
1069 atomic_t fail_cont_count;
1070 unsigned long reset_fail_timeout;
1071 struct work_struct update_11d_work;
1072 u8 new_alpha2[2];
1073 struct {
1074 /* protected by data_lock */
1075 u32 fw_crash_counter;
1076 } stats;
1077 u32 pktlog_defs_checksum;
1078
1079 struct ath12k_dbring_cap *db_caps;
1080 u32 num_db_cap;
1081
1082 struct completion htc_suspend;
1083
1084 u64 fw_soc_drop_count;
1085 bool static_window_map;
1086
1087 struct work_struct rfkill_work;
1088 /* true means radio is on */
1089 bool rfkill_radio_on;
1090
1091 struct {
1092 enum ath12k_bdf_search bdf_search;
1093 u32 vendor;
1094 u32 device;
1095 u32 subsystem_vendor;
1096 u32 subsystem_device;
1097 } id;
1098
1099 struct {
1100 u32 api_version;
1101
1102 const struct firmware *fw;
1103 const u8 *amss_data;
1104 size_t amss_len;
1105 const u8 *amss_dualmac_data;
1106 size_t amss_dualmac_len;
1107 const u8 *m3_data;
1108 size_t m3_len;
1109 const u8 *aux_uc_data;
1110 size_t aux_uc_len;
1111
1112 DECLARE_BITMAP(fw_features, ATH12K_FW_FEATURE_COUNT);
1113 bool fw_features_valid;
1114 } fw;
1115
1116 struct completion restart_completed;
1117
1118 #ifdef CONFIG_ACPI
1119
1120 struct {
1121 bool started;
1122 u32 func_bit;
1123 bool acpi_tas_enable;
1124 bool acpi_bios_sar_enable;
1125 bool acpi_disable_11be;
1126 bool acpi_disable_rfkill;
1127 bool acpi_cca_enable;
1128 bool acpi_band_edge_enable;
1129 bool acpi_enable_bdf;
1130 u32 bit_flag;
1131 char bdf_string[ATH12K_ACPI_BDF_MAX_LEN];
1132 u8 tas_cfg[ATH12K_ACPI_DSM_TAS_CFG_SIZE];
1133 u8 tas_sar_power_table[ATH12K_ACPI_DSM_TAS_DATA_SIZE];
1134 u8 bios_sar_data[ATH12K_ACPI_DSM_BIOS_SAR_DATA_SIZE];
1135 u8 geo_offset_data[ATH12K_ACPI_DSM_GEO_OFFSET_DATA_SIZE];
1136 u8 cca_data[ATH12K_ACPI_DSM_CCA_DATA_SIZE];
1137 u8 band_edge_power[ATH12K_ACPI_DSM_BAND_EDGE_DATA_SIZE];
1138 } acpi;
1139
1140 #endif /* CONFIG_ACPI */
1141
1142 struct notifier_block panic_nb;
1143
1144 struct ath12k_hw_group *ag;
1145 struct ath12k_wsi_info wsi_info;
1146 enum ath12k_qmi_firmware_mode fw_mode;
1147 struct ath12k_ftm_event_obj ftm_event_obj;
1148 bool hw_group_ref;
1149
1150 /* Denote whether MLO is possible within the device */
1151 bool single_chip_mlo_support;
1152
1153 struct ath12k_reg_freq reg_freq_2ghz;
1154 struct ath12k_reg_freq reg_freq_5ghz;
1155 struct ath12k_reg_freq reg_freq_6ghz;
1156 const struct ath12k_mem_profile_based_param *profile_param;
1157 enum ath12k_qmi_mem_mode target_mem_mode;
1158
1159 /* FIXME: Define this field in a ag equivalent object available
1160 * during the initial phase of probe later.
1161 */
1162 const struct ieee80211_ops *ath12k_ops;
1163
1164 struct rhashtable *rhead_sta_addr;
1165 struct rhashtable_params rhash_sta_addr_param;
1166
1167 /* must be last */
1168 u8 drv_priv[] __aligned(sizeof(void *));
1169 };
1170
1171 struct ath12k_pdev_map {
1172 struct ath12k_base *ab;
1173 u8 pdev_idx;
1174 };
1175
1176 struct ath12k_fw_stats_vdev {
1177 struct list_head list;
1178
1179 u32 vdev_id;
1180 u32 beacon_snr;
1181 u32 data_snr;
1182 u32 num_tx_frames[WLAN_MAX_AC];
1183 u32 num_rx_frames;
1184 u32 num_tx_frames_retries[WLAN_MAX_AC];
1185 u32 num_tx_frames_failures[WLAN_MAX_AC];
1186 u32 num_rts_fail;
1187 u32 num_rts_success;
1188 u32 num_rx_err;
1189 u32 num_rx_discard;
1190 u32 num_tx_not_acked;
1191 u32 tx_rate_history[MAX_TX_RATE_VALUES];
1192 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
1193 };
1194
1195 struct ath12k_fw_stats_bcn {
1196 struct list_head list;
1197
1198 u32 vdev_id;
1199 u32 tx_bcn_succ_cnt;
1200 u32 tx_bcn_outage_cnt;
1201 };
1202
1203 struct ath12k_fw_stats_pdev {
1204 struct list_head list;
1205
1206 /* PDEV stats */
1207 s32 ch_noise_floor;
1208 u32 tx_frame_count;
1209 u32 rx_frame_count;
1210 u32 rx_clear_count;
1211 u32 cycle_count;
1212 u32 phy_err_count;
1213 u32 chan_tx_power;
1214 u32 ack_rx_bad;
1215 u32 rts_bad;
1216 u32 rts_good;
1217 u32 fcs_bad;
1218 u32 no_beacons;
1219 u32 mib_int_count;
1220
1221 /* PDEV TX stats */
1222 s32 comp_queued;
1223 s32 comp_delivered;
1224 s32 msdu_enqued;
1225 s32 mpdu_enqued;
1226 s32 wmm_drop;
1227 s32 local_enqued;
1228 s32 local_freed;
1229 s32 hw_queued;
1230 s32 hw_reaped;
1231 s32 underrun;
1232 s32 tx_abort;
1233 s32 mpdus_requed;
1234 u32 tx_ko;
1235 u32 data_rc;
1236 u32 self_triggers;
1237 u32 sw_retry_failure;
1238 u32 illgl_rate_phy_err;
1239 u32 pdev_cont_xretry;
1240 u32 pdev_tx_timeout;
1241 u32 pdev_resets;
1242 u32 stateless_tid_alloc_failure;
1243 u32 phy_underrun;
1244 u32 txop_ovf;
1245
1246 /* PDEV RX stats */
1247 s32 mid_ppdu_route_change;
1248 s32 status_rcvd;
1249 s32 r0_frags;
1250 s32 r1_frags;
1251 s32 r2_frags;
1252 s32 r3_frags;
1253 s32 htt_msdus;
1254 s32 htt_mpdus;
1255 s32 loc_msdus;
1256 s32 loc_mpdus;
1257 s32 oversize_amsdu;
1258 s32 phy_errs;
1259 s32 phy_err_drop;
1260 s32 mpdu_errs;
1261 };
1262
1263 int ath12k_core_qmi_firmware_ready(struct ath12k_base *ab);
1264 void ath12k_core_hw_group_cleanup(struct ath12k_hw_group *ag);
1265 int ath12k_core_pre_init(struct ath12k_base *ab);
1266 int ath12k_core_init(struct ath12k_base *ath12k);
1267 void ath12k_core_deinit(struct ath12k_base *ath12k);
1268 struct ath12k_base *ath12k_core_alloc(struct device *dev, size_t priv_size,
1269 enum ath12k_bus bus);
1270 void ath12k_core_free(struct ath12k_base *ath12k);
1271 int ath12k_core_fetch_board_data_api_1(struct ath12k_base *ab,
1272 struct ath12k_board_data *bd,
1273 char *filename);
1274 int ath12k_core_fetch_bdf(struct ath12k_base *ath12k,
1275 struct ath12k_board_data *bd);
1276 void ath12k_core_free_bdf(struct ath12k_base *ab, struct ath12k_board_data *bd);
1277 int ath12k_core_fetch_regdb(struct ath12k_base *ab, struct ath12k_board_data *bd);
1278 int ath12k_core_check_dt(struct ath12k_base *ath12k);
1279 int ath12k_core_check_smbios(struct ath12k_base *ab);
1280 void ath12k_core_halt(struct ath12k *ar);
1281 int ath12k_core_resume_early(struct ath12k_base *ab);
1282 int ath12k_core_resume(struct ath12k_base *ab);
1283 int ath12k_core_suspend(struct ath12k_base *ab);
1284 int ath12k_core_suspend_late(struct ath12k_base *ab);
1285 void ath12k_core_hw_group_unassign(struct ath12k_base *ab);
1286 u8 ath12k_get_num_partner_link(struct ath12k *ar);
1287
1288 const struct firmware *ath12k_core_firmware_request(struct ath12k_base *ab,
1289 const char *filename);
1290 u32 ath12k_core_get_max_station_per_radio(struct ath12k_base *ab);
1291 u32 ath12k_core_get_max_peers_per_radio(struct ath12k_base *ab);
1292
1293 void ath12k_core_hw_group_set_mlo_capable(struct ath12k_hw_group *ag);
1294 void ath12k_fw_stats_init(struct ath12k *ar);
1295 void ath12k_fw_stats_bcn_free(struct list_head *head);
1296 void ath12k_fw_stats_free(struct ath12k_fw_stats *stats);
1297 void ath12k_fw_stats_reset(struct ath12k *ar);
1298 enum ath12k_qmi_mem_mode ath12k_core_get_memory_mode(struct ath12k_base *ab);
1299
ath12k_scan_state_str(enum ath12k_scan_state state)1300 static inline const char *ath12k_scan_state_str(enum ath12k_scan_state state)
1301 {
1302 switch (state) {
1303 case ATH12K_SCAN_IDLE:
1304 return "idle";
1305 case ATH12K_SCAN_STARTING:
1306 return "starting";
1307 case ATH12K_SCAN_RUNNING:
1308 return "running";
1309 case ATH12K_SCAN_ABORTING:
1310 return "aborting";
1311 }
1312
1313 return "unknown";
1314 }
1315
ATH12K_SKB_CB(struct sk_buff * skb)1316 static inline struct ath12k_skb_cb *ATH12K_SKB_CB(struct sk_buff *skb)
1317 {
1318 BUILD_BUG_ON(sizeof(struct ath12k_skb_cb) >
1319 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
1320 return (struct ath12k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
1321 }
1322
ATH12K_SKB_RXCB(struct sk_buff * skb)1323 static inline struct ath12k_skb_rxcb *ATH12K_SKB_RXCB(struct sk_buff *skb)
1324 {
1325 BUILD_BUG_ON(sizeof(struct ath12k_skb_rxcb) > sizeof(skb->cb));
1326 return (struct ath12k_skb_rxcb *)skb->cb;
1327 }
1328
ath12k_vif_to_ahvif(struct ieee80211_vif * vif)1329 static inline struct ath12k_vif *ath12k_vif_to_ahvif(struct ieee80211_vif *vif)
1330 {
1331 return (struct ath12k_vif *)vif->drv_priv;
1332 }
1333
ath12k_sta_to_ahsta(struct ieee80211_sta * sta)1334 static inline struct ath12k_sta *ath12k_sta_to_ahsta(struct ieee80211_sta *sta)
1335 {
1336 return (struct ath12k_sta *)sta->drv_priv;
1337 }
1338
ath12k_ahsta_to_sta(struct ath12k_sta * ahsta)1339 static inline struct ieee80211_sta *ath12k_ahsta_to_sta(struct ath12k_sta *ahsta)
1340 {
1341 return container_of((void *)ahsta, struct ieee80211_sta, drv_priv);
1342 }
1343
ath12k_ahvif_to_vif(struct ath12k_vif * ahvif)1344 static inline struct ieee80211_vif *ath12k_ahvif_to_vif(struct ath12k_vif *ahvif)
1345 {
1346 return container_of((void *)ahvif, struct ieee80211_vif, drv_priv);
1347 }
1348
ath12k_ab_to_ar(struct ath12k_base * ab,int mac_id)1349 static inline struct ath12k *ath12k_ab_to_ar(struct ath12k_base *ab,
1350 int mac_id)
1351 {
1352 return ab->pdevs[ath12k_hw_mac_id_to_pdev_id(ab->hw_params, mac_id)].ar;
1353 }
1354
ath12k_core_create_firmware_path(struct ath12k_base * ab,const char * filename,void * buf,size_t buf_len)1355 static inline void ath12k_core_create_firmware_path(struct ath12k_base *ab,
1356 const char *filename,
1357 void *buf, size_t buf_len)
1358 {
1359 const char *fw_name = NULL;
1360
1361 of_property_read_string(ab->dev->of_node, "firmware-name", &fw_name);
1362
1363 if (fw_name && strncmp(filename, "board", 5))
1364 snprintf(buf, buf_len, "%s/%s/%s/%s", ATH12K_FW_DIR,
1365 ab->hw_params->fw.dir, fw_name, filename);
1366 else
1367 snprintf(buf, buf_len, "%s/%s/%s", ATH12K_FW_DIR,
1368 ab->hw_params->fw.dir, filename);
1369 }
1370
ath12k_bus_str(enum ath12k_bus bus)1371 static inline const char *ath12k_bus_str(enum ath12k_bus bus)
1372 {
1373 switch (bus) {
1374 case ATH12K_BUS_PCI:
1375 return "pci";
1376 case ATH12K_BUS_AHB:
1377 return "ahb";
1378 }
1379
1380 return "unknown";
1381 }
1382
ath12k_hw_to_ah(struct ieee80211_hw * hw)1383 static inline struct ath12k_hw *ath12k_hw_to_ah(struct ieee80211_hw *hw)
1384 {
1385 return hw->priv;
1386 }
1387
ath12k_ah_to_ar(struct ath12k_hw * ah,u8 radio_idx)1388 static inline struct ath12k *ath12k_ah_to_ar(struct ath12k_hw *ah, u8 radio_idx)
1389 {
1390 if (WARN(radio_idx >= ah->num_radio,
1391 "bad radio index %d, use default radio\n", radio_idx))
1392 radio_idx = 0;
1393
1394 return &ah->radio[radio_idx];
1395 }
1396
ath12k_ar_to_ah(struct ath12k * ar)1397 static inline struct ath12k_hw *ath12k_ar_to_ah(struct ath12k *ar)
1398 {
1399 return ar->ah;
1400 }
1401
ath12k_ar_to_hw(struct ath12k * ar)1402 static inline struct ieee80211_hw *ath12k_ar_to_hw(struct ath12k *ar)
1403 {
1404 return ar->ah->hw;
1405 }
1406
1407 #define for_each_ar(ah, ar, index) \
1408 for ((index) = 0; ((index) < (ah)->num_radio && \
1409 ((ar) = &(ah)->radio[(index)])); (index)++)
1410
ath12k_ag_to_ah(struct ath12k_hw_group * ag,int idx)1411 static inline struct ath12k_hw *ath12k_ag_to_ah(struct ath12k_hw_group *ag, int idx)
1412 {
1413 return ag->ah[idx];
1414 }
1415
ath12k_ag_set_ah(struct ath12k_hw_group * ag,int idx,struct ath12k_hw * ah)1416 static inline void ath12k_ag_set_ah(struct ath12k_hw_group *ag, int idx,
1417 struct ath12k_hw *ah)
1418 {
1419 ag->ah[idx] = ah;
1420 }
1421
ath12k_ab_to_ag(struct ath12k_base * ab)1422 static inline struct ath12k_hw_group *ath12k_ab_to_ag(struct ath12k_base *ab)
1423 {
1424 return ab->ag;
1425 }
1426
ath12k_ag_to_ab(struct ath12k_hw_group * ag,u8 device_id)1427 static inline struct ath12k_base *ath12k_ag_to_ab(struct ath12k_hw_group *ag,
1428 u8 device_id)
1429 {
1430 return ag->ab[device_id];
1431 }
1432
ath12k_pdev_get_noise_floor(struct ath12k * ar)1433 static inline s32 ath12k_pdev_get_noise_floor(struct ath12k *ar)
1434 {
1435 lockdep_assert_held(&ar->data_lock);
1436
1437 return ar->rssi_info.noise_floor;
1438 }
1439
1440 /* The @ab->dp NULL check or assertion is intentionally omitted because
1441 * @ab->dp is guaranteed to be non-NULL after a successful probe and
1442 * remains valid until teardown. Invoking this before allocation or
1443 * after teardown is considered invalid usage.
1444 */
ath12k_ab_to_dp(struct ath12k_base * ab)1445 static inline struct ath12k_dp *ath12k_ab_to_dp(struct ath12k_base *ab)
1446 {
1447 return ab->dp;
1448 }
1449
ath12k_pdev_dp_to_ar(struct ath12k_pdev_dp * dp)1450 static inline struct ath12k *ath12k_pdev_dp_to_ar(struct ath12k_pdev_dp *dp)
1451 {
1452 return container_of(dp, struct ath12k, dp);
1453 }
1454 #endif /* _CORE_H_ */
1455