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Searched refs:host (Results 1 – 25 of 2159) sorted by relevance

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/linux/drivers/scsi/arm/
H A Dacornscsi.c170 static void acornscsi_done(AS_Host *host, struct scsi_cmnd **SCpntp,
172 static int acornscsi_reconnect_finish(AS_Host *host);
173 static void acornscsi_dma_cleanup(AS_Host *host);
174 static void acornscsi_abortcmd(AS_Host *host);
189 static inline void sbic_arm_write(AS_Host *host, unsigned int reg, unsigned int value) in sbic_arm_write() argument
191 writeb(reg, host->base + SBIC_REGIDX); in sbic_arm_write()
192 writeb(value, host->base + SBIC_REGVAL); in sbic_arm_write()
195 static inline int sbic_arm_read(AS_Host *host, unsigned int reg) in sbic_arm_read() argument
198 return readl(host->base + SBIC_REGIDX) & 255; in sbic_arm_read()
199 writeb(reg, host->base + SBIC_REGIDX); in sbic_arm_read()
[all …]
/linux/drivers/scsi/
H A Dinitio.c117 static struct scsi_ctrl_blk *initio_find_busy_scb(struct initio_host * host, u16 tarlun);
118 static struct scsi_ctrl_blk *initio_find_done_scb(struct initio_host * host);
120 static int tulip_main(struct initio_host * host);
122 static int initio_next_state(struct initio_host * host);
123 static int initio_state_1(struct initio_host * host);
124 static int initio_state_2(struct initio_host * host);
125 static int initio_state_3(struct initio_host * host);
126 static int initio_state_4(struct initio_host * host);
127 static int initio_state_5(struct initio_host * host);
128 static int initio_state_6(struct initio_host * host);
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H A Da100u2w.c85 static struct orc_scb *__orc_alloc_scb(struct orc_host * host);
86 static void inia100_scb_handler(struct orc_host *host, struct orc_scb *scb);
139 static u8 wait_chip_ready(struct orc_host * host) in wait_chip_ready() argument
144 if (inb(host->base + ORC_HCTRL) & HOSTSTOP) /* Wait HOSTSTOP set */ in wait_chip_ready()
151 static u8 wait_firmware_ready(struct orc_host * host) in wait_firmware_ready() argument
156 if (inb(host->base + ORC_HSTUS) & RREADY) /* Wait READY set */ in wait_firmware_ready()
164 static u8 wait_scsi_reset_done(struct orc_host * host) in wait_scsi_reset_done() argument
169 if (!(inb(host->base + ORC_HCTRL) & SCSIRST)) /* Wait SCSIRST done */ in wait_scsi_reset_done()
177 static u8 wait_HDO_off(struct orc_host * host) in wait_HDO_off() argument
182 if (!(inb(host->base + ORC_HCTRL) & HDO)) /* Wait HDO off */ in wait_HDO_off()
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/linux/drivers/mmc/host/
H A Ddw_mmc.c117 spin_lock_bh(&slot->host->lock); in dw_mci_req_show()
143 spin_unlock_bh(&slot->host->lock); in dw_mci_req_show()
151 struct dw_mci *host = s->private; in dw_mci_regs_show() local
153 pm_runtime_get_sync(host->dev); in dw_mci_regs_show()
155 seq_printf(s, "STATUS:\t0x%08x\n", mci_readl(host, STATUS)); in dw_mci_regs_show()
156 seq_printf(s, "RINTSTS:\t0x%08x\n", mci_readl(host, RINTSTS)); in dw_mci_regs_show()
157 seq_printf(s, "CMD:\t0x%08x\n", mci_readl(host, CMD)); in dw_mci_regs_show()
158 seq_printf(s, "CTRL:\t0x%08x\n", mci_readl(host, CTRL)); in dw_mci_regs_show()
159 seq_printf(s, "INTMASK:\t0x%08x\n", mci_readl(host, INTMASK)); in dw_mci_regs_show()
160 seq_printf(s, "CLKENA:\t0x%08x\n", mci_readl(host, CLKENA)); in dw_mci_regs_show()
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H A Dmtk-sd.c726 static void msdc_reset_hw(struct msdc_host *host) in msdc_reset_hw() argument
730 sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_RST); in msdc_reset_hw()
731 readl_poll_timeout_atomic(host->base + MSDC_CFG, val, !(val & MSDC_CFG_RST), 0, 0); in msdc_reset_hw()
733 sdr_set_bits(host->base + MSDC_FIFOCS, MSDC_FIFOCS_CLR); in msdc_reset_hw()
734 readl_poll_timeout_atomic(host->base + MSDC_FIFOCS, val, in msdc_reset_hw()
737 val = readl(host->base + MSDC_INT); in msdc_reset_hw()
738 writel(val, host->base + MSDC_INT); in msdc_reset_hw()
741 static void msdc_cmd_next(struct msdc_host *host,
743 static void __msdc_enable_sdio_irq(struct msdc_host *host, int enb);
761 static inline void msdc_dma_setup(struct msdc_host *host, struct msdc_dma *dma, in msdc_dma_setup() argument
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H A Dmmci.c49 static void mmci_variant_init(struct mmci_host *host);
50 static void ux500_variant_init(struct mmci_host *host);
51 static void ux500v2_variant_init(struct mmci_host *host);
373 struct mmci_host *host = mmc_priv(mmc); in mmci_card_busy() local
377 spin_lock_irqsave(&host->lock, flags); in mmci_card_busy()
378 if (readl(host->base + MMCISTATUS) & host->variant->busy_detect_flag) in mmci_card_busy()
380 spin_unlock_irqrestore(&host->lock, flags); in mmci_card_busy()
385 static void mmci_reg_delay(struct mmci_host *host) in mmci_reg_delay() argument
394 if (host->cclk < 25000000) in mmci_reg_delay()
403 void mmci_write_clkreg(struct mmci_host *host, u32 clk) in mmci_write_clkreg() argument
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H A Dtoshsd.c35 static void toshsd_init(struct toshsd_host *host) in toshsd_init() argument
38 pci_write_config_byte(host->pdev, SD_PCICFG_CLKSTOP, in toshsd_init()
40 pci_write_config_byte(host->pdev, SD_PCICFG_CARDDETECT, 2); in toshsd_init()
43 iowrite16(0, host->ioaddr + SD_SOFTWARERESET); /* assert */ in toshsd_init()
45 iowrite16(1, host->ioaddr + SD_SOFTWARERESET); /* deassert */ in toshsd_init()
49 iowrite16(0, host->ioaddr + SD_CARDCLOCKCTRL); in toshsd_init()
50 iowrite32(0, host->ioaddr + SD_CARDSTATUS); in toshsd_init()
51 iowrite32(0, host->ioaddr + SD_ERRORSTATUS0); in toshsd_init()
52 iowrite16(0, host->ioaddr + SD_STOPINTERNAL); in toshsd_init()
55 iowrite16(0x100, host->ioaddr + SDIO_BASE + SDIO_CLOCKNWAITCTRL); in toshsd_init()
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H A Drenesas_sdhi_core.c61 static void renesas_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width) in renesas_sdhi_sdbuf_width() argument
69 switch (sd_ctrl_read16(host, CTL_VERSION)) { in renesas_sdhi_sdbuf_width()
90 sd_ctrl_write16(host, CTL_HOST_MODE, val); in renesas_sdhi_sdbuf_width()
93 static int renesas_sdhi_clk_enable(struct tmio_mmc_host *host) in renesas_sdhi_clk_enable() argument
95 struct mmc_host *mmc = host->mmc; in renesas_sdhi_clk_enable()
96 struct renesas_sdhi *priv = host_to_priv(host); in renesas_sdhi_clk_enable()
119 renesas_sdhi_sdbuf_width(host, 16); in renesas_sdhi_clk_enable()
124 static unsigned int renesas_sdhi_clk_update(struct tmio_mmc_host *host, in renesas_sdhi_clk_update() argument
127 struct renesas_sdhi *priv = host_to_priv(host); in renesas_sdhi_clk_update()
139 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2) || mmc_doing_tune(host->mmc)) in renesas_sdhi_clk_update()
[all …]
H A Dcavium-thunderx.c21 static void thunder_mmc_acquire_bus(struct cvm_mmc_host *host) in thunder_mmc_acquire_bus() argument
23 down(&host->mmc_serializer); in thunder_mmc_acquire_bus()
26 static void thunder_mmc_release_bus(struct cvm_mmc_host *host) in thunder_mmc_release_bus() argument
28 up(&host->mmc_serializer); in thunder_mmc_release_bus()
31 static void thunder_mmc_int_enable(struct cvm_mmc_host *host, u64 val) in thunder_mmc_int_enable() argument
33 writeq(val, host->base + MIO_EMM_INT(host)); in thunder_mmc_int_enable()
34 writeq(val, host->base + MIO_EMM_INT_EN_SET(host)); in thunder_mmc_int_enable()
37 static int thunder_mmc_register_interrupts(struct cvm_mmc_host *host, in thunder_mmc_register_interrupts() argument
50 0, cvm_mmc_irq_names[i], host); in thunder_mmc_register_interrupts()
63 struct cvm_mmc_host *host; in thunder_mmc_probe() local
[all …]
H A Dcavium.c165 static void check_switch_errors(struct cvm_mmc_host *host) in check_switch_errors() argument
169 emm_switch = readq(host->base + MIO_EMM_SWITCH(host)); in check_switch_errors()
171 dev_err(host->dev, "Switch power class error\n"); in check_switch_errors()
173 dev_err(host->dev, "Switch hs timing error\n"); in check_switch_errors()
175 dev_err(host->dev, "Switch bus width error\n"); in check_switch_errors()
200 static void do_switch(struct cvm_mmc_host *host, u64 emm_switch) in do_switch() argument
212 writeq(emm_switch, host->base + MIO_EMM_SWITCH(host)); in do_switch()
215 writeq(emm_switch, host->base + MIO_EMM_SWITCH(host)); in do_switch()
219 rsp_sts = readq(host->base + MIO_EMM_RSP_STS(host)); in do_switch()
225 check_switch_errors(host); in do_switch()
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H A Dmmci_stm32_sdmmc.c69 int (*tuning_prepare)(struct mmci_host *host);
81 static int sdmmc_idma_validate_data(struct mmci_host *host, in sdmmc_idma_validate_data() argument
84 struct sdmmc_idma *idma = host->dma_priv; in sdmmc_idma_validate_data()
85 struct device *dev = mmc_dev(host->mmc); in sdmmc_idma_validate_data()
97 host->variant->stm32_idmabsize_align)) { in sdmmc_idma_validate_data()
98 dev_dbg(mmc_dev(host->mmc), in sdmmc_idma_validate_data()
106 dev_dbg(mmc_dev(host->mmc), in sdmmc_idma_validate_data()
117 host->mmc->max_req_size, in sdmmc_idma_validate_data()
131 static int _sdmmc_idma_prep_data(struct mmci_host *host, in _sdmmc_idma_prep_data() argument
134 struct sdmmc_idma *idma = host->dma_priv; in _sdmmc_idma_prep_data()
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H A Dmvsdio.c56 static int mvsd_setup_data(struct mvsd_host *host, struct mmc_data *data) in mvsd_setup_data() argument
58 void __iomem *iobase = host->base; in mvsd_setup_data()
77 dev_warn(host->dev, "FIFO_EMPTY bit missing\n"); in mvsd_setup_data()
82 dev_dbg(host->dev, "*** wait for FIFO_EMPTY bit " in mvsd_setup_data()
88 tmout = DIV_ROUND_UP(data->timeout_ns, host->ns_per_clk); in mvsd_setup_data()
96 dev_dbg(host->dev, "data %s at 0x%08x: blocks=%d blksz=%d tmout=%u (%d)\n", in mvsd_setup_data()
101 host->ctrl &= ~MVSD_HOST_CTRL_TMOUT_MASK; in mvsd_setup_data()
102 host->ctrl |= MVSD_HOST_CTRL_TMOUT(tmout_index); in mvsd_setup_data()
103 mvsd_write(MVSD_HOST_CTRL, host->ctrl); in mvsd_setup_data()
117 host->pio_size = data->blocks * data->blksz; in mvsd_setup_data()
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H A Dtifm_sd.c113 static void tifm_sd_read_fifo(struct tifm_sd *host, struct page *pg, in tifm_sd_read_fifo() argument
116 struct tifm_dev *sock = host->dev; in tifm_sd_read_fifo()
121 if (host->cmd_flags & DATA_CARRY) { in tifm_sd_read_fifo()
122 buf[pos++] = host->bounce_buf_data[0]; in tifm_sd_read_fifo()
123 host->cmd_flags &= ~DATA_CARRY; in tifm_sd_read_fifo()
130 host->bounce_buf_data[0] = (val >> 8) & 0xff; in tifm_sd_read_fifo()
131 host->cmd_flags |= DATA_CARRY; in tifm_sd_read_fifo()
139 static void tifm_sd_write_fifo(struct tifm_sd *host, struct page *pg, in tifm_sd_write_fifo() argument
142 struct tifm_dev *sock = host->dev; in tifm_sd_write_fifo()
147 if (host->cmd_flags & DATA_CARRY) { in tifm_sd_write_fifo()
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H A Dsdhci-of-dwcmshc.c236 int (*init)(struct device *dev, struct sdhci_host *host, struct dwcmshc_priv *dwc_priv);
237 void (*postinit)(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv);
272 static void dwcmshc_adma_write_desc(struct sdhci_host *host, void **desc, in dwcmshc_adma_write_desc() argument
278 sdhci_adma_write_desc(host, desc, addr, len, cmd); in dwcmshc_adma_write_desc()
284 sdhci_adma_write_desc(host, desc, addr, tmplen, cmd); in dwcmshc_adma_write_desc()
288 sdhci_adma_write_desc(host, desc, addr, len, cmd); in dwcmshc_adma_write_desc()
291 static unsigned int dwcmshc_get_max_clock(struct sdhci_host *host) in dwcmshc_get_max_clock() argument
293 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); in dwcmshc_get_max_clock()
296 return sdhci_pltfm_clk_get_max_clock(host); in dwcmshc_get_max_clock()
301 static unsigned int rk35xx_get_max_clock(struct sdhci_host *host) in rk35xx_get_max_clock() argument
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H A Dsdhci-pci-arasan.c93 static int arasan_phy_addr_poll(struct sdhci_host *host, u32 offset, u32 mask) in arasan_phy_addr_poll() argument
101 val = sdhci_readw(host, PHY_ADDR_REG); in arasan_phy_addr_poll()
109 static int arasan_phy_write(struct sdhci_host *host, u8 data, u8 offset) in arasan_phy_write() argument
111 sdhci_writew(host, data, PHY_DAT_REG); in arasan_phy_write()
112 sdhci_writew(host, (PHY_WRITE | offset), PHY_ADDR_REG); in arasan_phy_write()
113 return arasan_phy_addr_poll(host, PHY_ADDR_REG, PHY_BUSY); in arasan_phy_write()
116 static int arasan_phy_read(struct sdhci_host *host, u8 offset, u8 *data) in arasan_phy_read() argument
120 sdhci_writew(host, 0, PHY_DAT_REG); in arasan_phy_read()
121 sdhci_writew(host, offset, PHY_ADDR_REG); in arasan_phy_read()
122 ret = arasan_phy_addr_poll(host, PHY_ADDR_REG, PHY_BUSY); in arasan_phy_read()
[all …]
/linux/drivers/mmc/core/
H A Dcore.c81 static void mmc_should_fail_request(struct mmc_host *host, in mmc_should_fail_request() argument
96 !should_fail(&host->fail_mmc_request, data->blksz * data->blocks)) in mmc_should_fail_request()
105 static inline void mmc_should_fail_request(struct mmc_host *host, in mmc_should_fail_request() argument
118 void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq) in mmc_command_done() argument
126 mmc_hostname(host), mrq->cmd->opcode); in mmc_command_done()
138 void mmc_request_done(struct mmc_host *host, struct mmc_request *mrq) in mmc_request_done() argument
145 !host->retune_crc_disable && in mmc_request_done()
149 mmc_retune_needed(host); in mmc_request_done()
151 if (err && cmd->retries && mmc_host_is_spi(host)) { in mmc_request_done()
156 if (host->ongoing_mrq == mrq) in mmc_request_done()
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H A Dsdio_irq.c30 static int sdio_get_pending_irqs(struct mmc_host *host, u8 *pending) in sdio_get_pending_irqs() argument
32 struct mmc_card *card = host->card; in sdio_get_pending_irqs()
35 WARN_ON(!host->claimed); in sdio_get_pending_irqs()
45 !(host->caps & MMC_CAP_SDIO_IRQ)) { in sdio_get_pending_irqs()
58 static int process_sdio_pending_irqs(struct mmc_host *host) in process_sdio_pending_irqs() argument
60 struct mmc_card *card = host->card; in process_sdio_pending_irqs()
62 bool sdio_irq_pending = host->sdio_irq_pending; in process_sdio_pending_irqs()
71 host->sdio_irq_pending = false; in process_sdio_pending_irqs()
84 ret = sdio_get_pending_irqs(host, &pending); in process_sdio_pending_irqs()
113 static void sdio_run_irqs(struct mmc_host *host) in sdio_run_irqs() argument
[all …]
/linux/fs/lockd/
H A Dhost.c37 #define for_each_host(host, chain, table) \ argument
40 hlist_for_each_entry((host), (chain), h_hash)
42 #define for_each_host_safe(host, next, chain, table) \ argument
45 hlist_for_each_entry_safe((host), (next), \
114 struct nlm_host *host = NULL; in nlm_alloc_host() local
129 host = kmalloc(sizeof(*host), GFP_KERNEL); in nlm_alloc_host()
130 if (unlikely(host == NULL)) { in nlm_alloc_host()
136 memcpy(nlm_addr(host), ni->sap, ni->salen); in nlm_alloc_host()
137 host->h_addrlen = ni->salen; in nlm_alloc_host()
138 rpc_set_port(nlm_addr(host), 0); in nlm_alloc_host()
[all …]
/linux/drivers/memstick/host/
H A Djmb38x_ms.c154 static unsigned int jmb38x_ms_read_data(struct jmb38x_ms_host *host, in jmb38x_ms_read_data() argument
159 while (host->io_pos && length) { in jmb38x_ms_read_data()
160 buf[off++] = host->io_word[0] & 0xff; in jmb38x_ms_read_data()
161 host->io_word[0] >>= 8; in jmb38x_ms_read_data()
163 host->io_pos--; in jmb38x_ms_read_data()
169 while (!(STATUS_FIFO_EMPTY & readl(host->addr + STATUS))) { in jmb38x_ms_read_data()
172 *(unsigned int *)(buf + off) = __raw_readl(host->addr + DATA); in jmb38x_ms_read_data()
178 && !(STATUS_FIFO_EMPTY & readl(host->addr + STATUS))) { in jmb38x_ms_read_data()
179 host->io_word[0] = readl(host->addr + DATA); in jmb38x_ms_read_data()
180 for (host->io_pos = 4; host->io_pos; --host->io_pos) { in jmb38x_ms_read_data()
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H A Dtifm_ms.c82 static unsigned int tifm_ms_read_data(struct tifm_ms *host, in tifm_ms_read_data() argument
85 struct tifm_dev *sock = host->dev; in tifm_ms_read_data()
88 while (host->io_pos && length) { in tifm_ms_read_data()
89 buf[off++] = host->io_word & 0xff; in tifm_ms_read_data()
90 host->io_word >>= 8; in tifm_ms_read_data()
92 host->io_pos--; in tifm_ms_read_data()
109 host->io_word = readl(sock->addr + SOCK_MS_DATA); in tifm_ms_read_data()
110 for (host->io_pos = 4; host->io_pos; --host->io_pos) { in tifm_ms_read_data()
111 buf[off++] = host->io_word & 0xff; in tifm_ms_read_data()
112 host->io_word >>= 8; in tifm_ms_read_data()
[all …]
/linux/drivers/mtd/nand/raw/
H A Dhisi504_nand.c144 static inline unsigned int hinfc_read(struct hinfc_host *host, unsigned int reg) in hinfc_read() argument
146 return readl(host->iobase + reg); in hinfc_read()
149 static inline void hinfc_write(struct hinfc_host *host, unsigned int value, in hinfc_write() argument
152 writel(value, host->iobase + reg); in hinfc_write()
155 static void wait_controller_finished(struct hinfc_host *host) in wait_controller_finished() argument
161 val = hinfc_read(host, HINFC504_STATUS); in wait_controller_finished()
162 if (host->command == NAND_CMD_ERASE2) { in wait_controller_finished()
166 val = hinfc_read(host, HINFC504_STATUS); in wait_controller_finished()
176 dev_err(host->dev, "Wait NAND controller exec cmd timeout.\n"); in wait_controller_finished()
179 static void hisi_nfc_dma_transfer(struct hinfc_host *host, int todev) in hisi_nfc_dma_transfer() argument
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H A Dlpc32xx_mlc.c231 static void lpc32xx_nand_setup(struct lpc32xx_nand_host *host) in lpc32xx_nand_setup() argument
236 writel(MLCCMD_RESET, MLC_CMD(host->io_base)); in lpc32xx_nand_setup()
240 clkrate = clk_get_rate(host->clk); in lpc32xx_nand_setup()
246 writew(MLCLOCKPR_MAGIC, MLC_LOCK_PR(host->io_base)); in lpc32xx_nand_setup()
250 writel(tmp, MLC_ICR(host->io_base)); in lpc32xx_nand_setup()
254 writew(MLCLOCKPR_MAGIC, MLC_LOCK_PR(host->io_base)); in lpc32xx_nand_setup()
258 tmp |= MLCTIMEREG_TCEA_DELAY(clkrate / host->ncfg->tcea_delay + 1); in lpc32xx_nand_setup()
259 tmp |= MLCTIMEREG_BUSY_DELAY(clkrate / host->ncfg->busy_delay + 1); in lpc32xx_nand_setup()
260 tmp |= MLCTIMEREG_NAND_TA(clkrate / host->ncfg->nand_ta + 1); in lpc32xx_nand_setup()
261 tmp |= MLCTIMEREG_RD_HIGH(clkrate / host->ncfg->rd_high + 1); in lpc32xx_nand_setup()
[all …]
H A Dmxc_nand.c28 #define NFC_V1_V2_BUF_SIZE (host->regs + 0x00)
29 #define NFC_V1_V2_BUF_ADDR (host->regs + 0x04)
30 #define NFC_V1_V2_FLASH_ADDR (host->regs + 0x06)
31 #define NFC_V1_V2_FLASH_CMD (host->regs + 0x08)
32 #define NFC_V1_V2_CONFIG (host->regs + 0x0a)
33 #define NFC_V1_V2_ECC_STATUS_RESULT (host->regs + 0x0c)
34 #define NFC_V1_V2_RSLTMAIN_AREA (host->regs + 0x0e)
35 #define NFC_V21_RSLTSPARE_AREA (host->regs + 0x10)
36 #define NFC_V1_V2_WRPROT (host->regs + 0x12)
37 #define NFC_V1_UNLOCKSTART_BLKADDR (host->regs + 0x14)
[all …]
/linux/drivers/gpu/host1x/
H A Ddev.c294 static void host1x_setup_virtualization_tables(struct host1x *host) in host1x_setup_virtualization_tables() argument
296 const struct host1x_info *info = host->info; in host1x_setup_virtualization_tables()
305 host1x_hypervisor_writel(host, entry->offset, entry->base); in host1x_setup_virtualization_tables()
306 host1x_hypervisor_writel(host, entry->limit, entry->base + 4); in host1x_setup_virtualization_tables()
311 host1x_hypervisor_writel(host, 0xff, info->streamid_vm_table.base + 4 * i); in host1x_setup_virtualization_tables()
316 host1x_hypervisor_writel(host, 0xff, info->classid_vm_table.base + 4 * i); in host1x_setup_virtualization_tables()
321 host1x_hypervisor_writel(host, 0x1, info->mmio_vm_table.base + 4 * i); in host1x_setup_virtualization_tables()
364 static struct iommu_domain *host1x_iommu_attach(struct host1x *host) in host1x_iommu_attach() argument
366 struct iommu_domain *domain = iommu_get_domain_for_dev(host->dev); in host1x_iommu_attach()
370 if (host->dev->archdata.mapping) { in host1x_iommu_attach()
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H A Ddev.h33 int (*init)(struct host1x_channel *channel, struct host1x *host,
56 void (*show_channel_cdma)(struct host1x *host,
59 void (*show_channel_fifo)(struct host1x *host,
62 void (*show_mlocks)(struct host1x *host, struct output *output);
74 void (*enable_protection)(struct host1x *host);
78 int (*init_host_sync)(struct host1x *host, u32 cpm);
80 struct host1x *host, unsigned int id, u32 thresh);
81 void (*enable_syncpt_intr)(struct host1x *host, unsigned int id);
82 void (*disable_syncpt_intr)(struct host1x *host, unsigned int id);
83 void (*disable_all_syncpt_intrs)(struct host1x *host);
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