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Searched refs:hose (Results 1 – 25 of 82) sorted by relevance

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/linux/arch/powerpc/sysdev/
H A Dfsl_pci.c68 static int fsl_pcie_check_link(struct pci_controller *hose) in fsl_pcie_check_link() argument
72 if (hose->indirect_type & PPC_INDIRECT_TYPE_FSL_CFG_REG_LINK) { in fsl_pcie_check_link()
73 if (hose->ops->read == fsl_indirect_read_config) in fsl_pcie_check_link()
74 __indirect_read_config(hose, hose->first_busno, 0, in fsl_pcie_check_link()
77 early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val); in fsl_pcie_check_link()
81 struct ccsr_pci __iomem *pci = hose->private_data; in fsl_pcie_check_link()
95 struct pci_controller *hose = pci_bus_to_host(bus); in fsl_indirect_read_config() local
97 if (fsl_pcie_check_link(hose)) in fsl_indirect_read_config()
98 hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK; in fsl_indirect_read_config()
100 hose->indirect_type &= ~PPC_INDIRECT_TYPE_NO_PCIE_LINK; in fsl_indirect_read_config()
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H A Dindirect_pci.c18 int __indirect_read_config(struct pci_controller *hose, in __indirect_read_config() argument
26 if (hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK) { in __indirect_read_config()
27 if (bus_number != hose->first_busno) in __indirect_read_config()
34 if (ppc_md.pci_exclude_device(hose, bus_number, devfn)) in __indirect_read_config()
37 if (hose->indirect_type & PPC_INDIRECT_TYPE_SET_CFG_TYPE) in __indirect_read_config()
38 if (bus_number != hose->first_busno) in __indirect_read_config()
41 bus_no = (bus_number == hose->first_busno) ? in __indirect_read_config()
42 hose->self_busno : bus_number; in __indirect_read_config()
44 if (hose->indirect_type & PPC_INDIRECT_TYPE_EXT_REG) in __indirect_read_config()
49 if (hose->indirect_type & PPC_INDIRECT_TYPE_BIG_ENDIAN) in __indirect_read_config()
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/linux/arch/sh/drivers/pci/
H A Dpci.c31 static void pcibios_scanbus(struct pci_channel *hose) in pcibios_scanbus() argument
45 for (i = 0; i < hose->nr_resources; i++) { in pcibios_scanbus()
46 res = hose->resources + i; in pcibios_scanbus()
51 offset = hose->io_offset; in pcibios_scanbus()
53 offset = hose->mem_offset; in pcibios_scanbus()
59 bridge->sysdata = hose; in pcibios_scanbus()
61 bridge->ops = hose->pci_ops; in pcibios_scanbus()
71 hose->bus = bridge->bus; in pcibios_scanbus()
73 need_domain_info = need_domain_info || hose->index; in pcibios_scanbus()
74 hose->need_domain_info = need_domain_info; in pcibios_scanbus()
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H A Dcommon.c11 static struct pci_dev *fake_pci_dev(struct pci_channel *hose, in fake_pci_dev() argument
18 dev.sysdata = hose; in fake_pci_dev()
21 bus.sysdata = hose; in fake_pci_dev()
22 bus.ops = hose->pci_ops; in fake_pci_dev()
34 int __init early_##rw##_config_##size(struct pci_channel *hose, \
38 fake_pci_dev(hose, top_bus, bus, devfn), \
49 int __init pci_is_66mhz_capable(struct pci_channel *hose, in EARLY_PCI_OP()
63 ret = early_read_config_word(hose, top_bus, current_bus, in EARLY_PCI_OP()
74 early_read_config_word(hose, top_bus, current_bus, in EARLY_PCI_OP()
91 struct pci_channel *hose = from_timer(hose, t, err_timer); in pcibios_enable_err() local
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H A Dpci-sh7780.c94 struct pci_channel *hose = dev_id; in sh7780_pci_err_irq() local
100 addr = __raw_readl(hose->reg_base + SH4_PCIALR); in sh7780_pci_err_irq()
105 status = __raw_readw(hose->reg_base + PCI_STATUS); in sh7780_pci_err_irq()
111 cmd = pcibios_handle_status_errors(addr, status, hose); in sh7780_pci_err_irq()
113 __raw_writew(cmd, hose->reg_base + PCI_STATUS); in sh7780_pci_err_irq()
119 status = __raw_readl(hose->reg_base + SH4_PCIAINT); in sh7780_pci_err_irq()
127 __raw_writel(cmd, hose->reg_base + SH4_PCIAINT); in sh7780_pci_err_irq()
132 status = __raw_readl(hose->reg_base + SH4_PCIINT); in sh7780_pci_err_irq()
140 __raw_writel(cmd, hose->reg_base + SH4_PCIINT); in sh7780_pci_err_irq()
147 struct pci_channel *hose = dev_id; in sh7780_pci_serr_irq() local
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/linux/arch/alpha/kernel/
H A Dsys_rawhide.c47 rawhide_update_irq_hw(int hose, int mask) in rawhide_update_irq_hw() argument
49 *(vuip)MCPCIA_INT_MASK0(MCPCIA_HOSE2MID(hose)) = mask; in rawhide_update_irq_hw()
51 *(vuip)MCPCIA_INT_MASK0(MCPCIA_HOSE2MID(hose)); in rawhide_update_irq_hw()
60 unsigned int mask, hose; in rawhide_enable_irq() local
64 hose = irq / 24; in rawhide_enable_irq()
65 if (!hose_exists(hose)) /* if hose non-existent, exit */ in rawhide_enable_irq()
68 irq -= hose * 24; in rawhide_enable_irq()
72 mask |= cached_irq_masks[hose]; in rawhide_enable_irq()
73 cached_irq_masks[hose] = mask; in rawhide_enable_irq()
74 rawhide_update_irq_hw(hose, mask); in rawhide_enable_irq()
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H A Dpci.c99 struct pci_controller *hose = dev->sysdata; in quirk_cypress() local
100 struct pci_iommu_arena *pci = hose->sg_pci; in quirk_cypress()
131 struct pci_controller *hose = dev->sysdata; in pcibios_align_resource() local
137 if (start - hose->io_space->start < PCIBIOS_MIN_IO) in pcibios_align_resource()
138 start = PCIBIOS_MIN_IO + hose->io_space->start; in pcibios_align_resource()
148 if (start - hose->mem_space->start < PCIBIOS_MIN_MEM) in pcibios_align_resource()
149 start = PCIBIOS_MIN_MEM + hose->mem_space->start; in pcibios_align_resource()
170 if (hose->sparse_mem_base && size <= 7 * 16*MB) { in pcibios_align_resource()
323 struct pci_controller *hose; in common_init_pci() local
334 for (next_busno = 0, hose in common_init_pci()
392 struct pci_controller *hose; alloc_pci_controller() local
424 struct pci_controller *hose; SYSCALL_DEFINE3() local
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H A Dcore_mcpcia.c88 struct pci_controller *hose) in conf_read() argument
91 unsigned long mid = MCPCIA_HOSE2MID(hose->index); in conf_read()
136 struct pci_controller *hose) in conf_write() argument
139 unsigned long mid = MCPCIA_HOSE2MID(hose->index); in conf_write()
171 struct pci_controller *hose, unsigned long *pci_addr, in mk_conf_addr() argument
179 bus, devfn, hose->index, where, pci_addr, type1)); in mk_conf_addr()
188 addr |= hose->config_space_base; in mk_conf_addr()
199 struct pci_controller *hose = bus->sysdata; in mcpcia_read_config() local
203 if (mk_conf_addr(bus, devfn, where, hose, &addr, &type1)) in mcpcia_read_config()
207 w = conf_read(addr, type1, hose); in mcpcia_read_config()
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H A Dconsole.c42 struct pci_controller *hose = NULL; in locate_and_init_vga() local
50 if (!hose) in locate_and_init_vga()
51 hose = dev->sysdata; in locate_and_init_vga()
53 hose = sel_func(hose, dev->sysdata); in locate_and_init_vga()
57 if (!hose || (conswitchp == &vga_con && pci_vga_hose == hose)) in locate_and_init_vga()
61 alpha_vga.start += hose->io_space->start; in locate_and_init_vga()
62 alpha_vga.end += hose->io_space->start; in locate_and_init_vga()
63 request_resource(hose->io_space, &alpha_vga); in locate_and_init_vga()
66 pci_vga_hose = hose; in locate_and_init_vga()
78 struct pci_controller *hose; in find_console_vga_hose() local
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H A Dcore_marvel.c207 struct pci_controller *hose = alloc_pci_controller(); in io7_init_hose()
212 hose->index = hose_index++; /* arbitrary */ in io7_init_hose()
215 * We don't have an isa or legacy hose, but glibc expects to be in io7_init_hose()
219 * sparse access, we need to point the pci_isa_hose at a real hose in io7_init_hose()
222 if (hose->index == 0) in io7_init_hose()
223 pci_isa_hose = hose; in io7_init_hose()
226 io7_port->hose = hose; in io7_init_hose()
227 hose->sysdata = io7_port; in io7_init_hose()
229 hose in io7_init_hose()
209 struct pci_controller *hose = alloc_pci_controller(); io7_init_hose() local
380 struct pci_controller *hose = NULL; marvel_find_console_vga_hose() local
503 build_conf_addr(struct pci_controller * hose,u8 bus,unsigned int devfn,int where) build_conf_addr() argument
512 struct pci_controller *hose = pbus->sysdata; mk_conf_addr() local
607 marvel_pci_tbi(struct pci_controller * hose,dma_addr_t start,dma_addr_t end) marvel_pci_tbi() argument
686 struct pci_controller *hose; marvel_ioremap() local
1024 struct pci_controller *hose; marvel_agp_info() local
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H A Dcore_titan.c118 struct pci_controller *hose = pbus->sysdata; in mk_conf_addr() local
131 addr |= hose->config_space_base; in mk_conf_addr()
202 titan_pci_tbi(struct pci_controller *hose, dma_addr_t start, dma_addr_t end) in titan_pci_tbi() argument
205 (hose->index & 1) ? TITAN_pachip1 : TITAN_pachip0; in titan_pci_tbi()
212 if (hose->index & 2) in titan_pci_tbi()
249 struct pci_controller *hose; in titan_init_one_pachip_port() local
251 hose = alloc_pci_controller(); in titan_init_one_pachip_port()
253 pci_isa_hose = hose; in titan_init_one_pachip_port()
254 hose->io_space = alloc_resource(); in titan_init_one_pachip_port()
255 hose->mem_space = alloc_resource(); in titan_init_one_pachip_port()
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H A Dcore_tsunami.c95 struct pci_controller *hose = pbus->sysdata; in mk_conf_addr() local
108 addr |= hose->config_space_base; in mk_conf_addr()
178 tsunami_pci_tbi(struct pci_controller *hose, dma_addr_t start, dma_addr_t end) in tsunami_pci_tbi() argument
180 tsunami_pchip *pchip = hose->index ? TSUNAMI_pchip1 : TSUNAMI_pchip0; in tsunami_pci_tbi()
249 struct pci_controller *hose; in tsunami_init_one_pchip() local
254 hose = alloc_pci_controller(); in tsunami_init_one_pchip()
256 pci_isa_hose = hose; in tsunami_init_one_pchip()
257 hose->io_space = alloc_resource(); in tsunami_init_one_pchip()
258 hose->mem_space = alloc_resource(); in tsunami_init_one_pchip()
264 hose->sparse_mem_base = 0; in tsunami_init_one_pchip()
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H A Dcore_wildfire.c65 struct pci_controller *hose; in wildfire_init_hose() local
68 hose = alloc_pci_controller(); in wildfire_init_hose()
69 hose->io_space = alloc_resource(); in wildfire_init_hose()
70 hose->mem_space = alloc_resource(); in wildfire_init_hose()
73 hose->sparse_mem_base = 0; in wildfire_init_hose()
74 hose->sparse_io_base = 0; in wildfire_init_hose()
75 hose->dense_mem_base = WILDFIRE_MEM(qbbno, hoseno); in wildfire_init_hose()
76 hose->dense_io_base = WILDFIRE_IO(qbbno, hoseno); in wildfire_init_hose()
78 hose->config_space_base = WILDFIRE_CONF(qbbno, hoseno); in wildfire_init_hose()
79 hose->index = (qbbno << 3) + hoseno; in wildfire_init_hose()
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H A Dcore_polaris.c149 struct pci_controller *hose; in polaris_init_arch() local
163 pci_isa_hose = hose = alloc_pci_controller(); in polaris_init_arch()
164 hose->io_space = &ioport_resource; in polaris_init_arch()
165 hose->mem_space = &iomem_resource; in polaris_init_arch()
166 hose->index = 0; in polaris_init_arch()
168 hose->sparse_mem_base = 0; in polaris_init_arch()
169 hose->dense_mem_base = POLARIS_DENSE_MEM_BASE - IDENT_ADDR; in polaris_init_arch()
170 hose->sparse_io_base = 0; in polaris_init_arch()
171 hose->dense_io_base = POLARIS_DENSE_IO_BASE - IDENT_ADDR; in polaris_init_arch()
173 hose->sg_isa = hose->sg_pci = NULL; in polaris_init_arch()
/linux/arch/powerpc/platforms/powermac/
H A Dpci.c140 struct pci_controller *hose; in macrisc_cfg_map_bus() local
142 hose = pci_bus_to_host(bus); in macrisc_cfg_map_bus()
143 if (hose == NULL) in macrisc_cfg_map_bus()
146 if (bus->number == hose->first_busno) { in macrisc_cfg_map_bus()
155 out_le32(hose->cfg_addr, caddr); in macrisc_cfg_map_bus()
156 } while (in_le32(hose->cfg_addr) != caddr); in macrisc_cfg_map_bus()
159 return hose->cfg_data + offset; in macrisc_cfg_map_bus()
204 static void __init setup_chaos(struct pci_controller *hose, in setup_chaos() argument
208 hose->ops = &chaos_pci_ops; in setup_chaos()
209 hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000); in setup_chaos()
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/linux/arch/powerpc/kernel/
H A Dpci_64.c42 struct pci_controller *hose, *tmp; in pcibios_init() local
57 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) in pcibios_init()
58 pcibios_scan_phb(hose); in pcibios_init()
64 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) in pcibios_init()
65 pci_bus_add_devices(hose->bus); in pcibios_init()
80 struct pci_controller *hose; in pcibios_unmap_io_space() local
110 hose = pci_bus_to_host(bus); in pcibios_unmap_io_space()
112 pr_debug("IO unmapping for PHB %pOF\n", hose->dn); in pcibios_unmap_io_space()
113 pr_debug(" alloc=0x%p\n", hose->io_base_alloc); in pcibios_unmap_io_space()
115 iounmap(hose->io_base_alloc); in pcibios_unmap_io_space()
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H A Dpci_32.c115 struct pci_controller *hose, *tmp; in pcibios_make_OF_bus_map() local
131 /* For each hose, we begin searching bridges */ in pcibios_make_OF_bus_map()
132 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { in pcibios_make_OF_bus_map()
133 struct device_node* node = hose->dn; in pcibios_make_OF_bus_map()
137 make_one_node_map(node, hose->first_busno); in pcibios_make_OF_bus_map()
230 void pcibios_setup_phb_io_space(struct pci_controller *hose) in pci_create_OF_bus_map()
233 struct resource *res = &hose->io_resource; in pcibios_setup_phb_io_space() argument
236 io_offset = pcibios_io_space_offset(hose); in pcibios_setup_phb_io_space()
243 struct pci_controller *hose, *tmp;
263 list_for_each_entry_safe(hose, tm in pcibios_init()
246 struct pci_controller *hose, *tmp; pcibios_init() local
312 struct pci_controller *hose, *tmp; pci_bus_to_hose() local
329 struct pci_controller* hose; SYSCALL_DEFINE3() local
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/linux/arch/mips/pci/
H A Dpci-legacy.c58 struct pci_controller *hose = dev->sysdata; in pcibios_align_resource()
63 if (start < PCIBIOS_MIN_IO + hose->io_resource->start) in pcibios_align_resource()
64 start = PCIBIOS_MIN_IO + hose->io_resource->start; in pcibios_align_resource()
73 if (start < PCIBIOS_MIN_MEM + hose->mem_resource->start) in pcibios_scanbus()
74 start = PCIBIOS_MIN_MEM + hose->mem_resource->start; in pcibios_scanbus()
80 static void pcibios_scanbus(struct pci_controller *hose) in pcibios_scanbus()
93 if (hose->get_busno && pci_has_flag(PCI_PROBE_ONLY)) in pcibios_scanbus()
94 next_busno = (*hose->get_busno)(); in pcibios_scanbus()
97 hose->mem_resource, hose in pcibios_scanbus()
50 struct pci_controller *hose = dev->sysdata; pcibios_align_resource() local
72 pcibios_scanbus(struct pci_controller * hose) pcibios_scanbus() argument
137 pci_load_of_ranges(struct pci_controller * hose,struct device_node * node) pci_load_of_ranges() argument
173 struct pci_controller *hose = bus->sysdata; pcibios_get_phb_of_node() local
181 register_pci_controller(struct pci_controller * hose) register_pci_controller() argument
231 struct pci_controller *hose; pcibios_init() local
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/linux/arch/powerpc/platforms/pasemi/
H A Dpci.c40 static void volatile __iomem *pa_pxp_cfg_addr(struct pci_controller *hose, in pa_pxp_cfg_addr() argument
43 return hose->cfg_data + PA_PXP_CFA(bus, devfn, offset); in pa_pxp_cfg_addr()
61 struct pci_controller *hose; in workaround_5945() local
69 hose = pci_bus_to_host(bus); in workaround_5945()
71 addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset & ~0x3); in workaround_5945()
78 dummy = pa_pxp_cfg_addr(hose, bus->number, devfn, 0x10); in workaround_5945()
159 struct pci_controller *hose; in pa_pxp_read_config() local
162 hose = pci_bus_to_host(bus); in pa_pxp_read_config()
163 if (!hose) in pa_pxp_read_config()
172 addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset); in pa_pxp_read_config()
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/linux/arch/powerpc/platforms/52xx/
H A Dmpc52xx_pci.c111 struct pci_controller *hose = pci_bus_to_host(bus); in mpc52xx_pci_read_config() local
115 if (ppc_md.pci_exclude_device(hose, bus->number, devfn)) in mpc52xx_pci_read_config()
118 out_be32(hose->cfg_addr, in mpc52xx_pci_read_config()
131 value = in_8(((u8 __iomem *)hose->cfg_data) + in mpc52xx_pci_read_config()
135 value = in_le16(((u16 __iomem *)hose->cfg_data) + in mpc52xx_pci_read_config()
140 value = in_le16((u16 __iomem *)hose->cfg_data) | in mpc52xx_pci_read_config()
141 (in_le16(((u16 __iomem *)hose->cfg_data) + 1) << 16); in mpc52xx_pci_read_config()
148 value = in_le32(hose->cfg_data); in mpc52xx_pci_read_config()
158 out_be32(hose->cfg_addr, 0); in mpc52xx_pci_read_config()
168 struct pci_controller *hose = pci_bus_to_host(bus); in mpc52xx_pci_write_config() local
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/linux/arch/powerpc/platforms/chrp/
H A Dpci.c38 struct pci_controller *hose = pci_bus_to_host(bus); in gg2_read_config() local
46 cfg_data = hose->cfg_data + ((bus->number<<16) | (devfn<<8) | off); in gg2_read_config()
65 struct pci_controller *hose = pci_bus_to_host(bus); in gg2_write_config() local
73 cfg_data = hose->cfg_data + ((bus->number<<16) | (devfn<<8) | off); in gg2_write_config()
100 struct pci_controller *hose = pci_bus_to_host(bus); in rtas_read_config() local
102 | (((bus->number - hose->first_busno) & 0xff) << 16) in rtas_read_config()
103 | (hose->global_number << 24); in rtas_read_config()
115 struct pci_controller *hose = pci_bus_to_host(bus); in rtas_write_config() local
117 | (((bus->number - hose->first_busno) & 0xff) << 16) in rtas_write_config()
118 | (hose->global_number << 24); in rtas_write_config()
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/linux/arch/powerpc/platforms/powernv/
H A Deeh-powernv.c69 struct pci_controller *hose = filp->private_data; in pnv_eeh_ei_write() local
91 pe = eeh_pe_get(hose, pe_no); in pnv_eeh_ei_write()
107 struct pci_controller *hose = data; in pnv_eeh_dbgfs_set() local
108 struct pnv_phb *phb = hose->private_data; in pnv_eeh_dbgfs_set()
116 struct pci_controller *hose = data; in pnv_eeh_dbgfs_get() local
117 struct pnv_phb *phb = hose->private_data; in pnv_eeh_dbgfs_get()
147 struct pci_controller *hose; in pnv_eeh_enable_phbs() local
150 list_for_each_entry(hose, &hose_list, list_node) { in pnv_eeh_enable_phbs()
151 phb = hose->private_data; in pnv_eeh_enable_phbs()
174 struct pci_controller *hose; in pnv_eeh_post_init() local
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H A Dpci-cxl.c15 struct pci_controller *hose = pci_bus_to_host(dev->bus); in pnv_phb_to_cxl_mode() local
16 struct pnv_phb *phb = hose->private_data; in pnv_phb_to_cxl_mode()
41 struct pci_controller *hose = pci_bus_to_host(dev->bus); in pnv_cxl_alloc_hwirqs() local
42 struct pnv_phb *phb = hose->private_data; in pnv_cxl_alloc_hwirqs()
56 struct pci_controller *hose = pci_bus_to_host(dev->bus); in pnv_cxl_release_hwirqs() local
57 struct pnv_phb *phb = hose->private_data; in pnv_cxl_release_hwirqs()
66 struct pci_controller *hose = pci_bus_to_host(dev->bus); in pnv_cxl_release_hwirq_ranges() local
67 struct pnv_phb *phb = hose->private_data; in pnv_cxl_release_hwirq_ranges()
86 struct pci_controller *hose = pci_bus_to_host(dev->bus); in pnv_cxl_alloc_hwirq_ranges() local
87 struct pnv_phb *phb = hose->private_data; in pnv_cxl_alloc_hwirq_ranges()
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H A Dpci-ioda.c133 __func__, rc, phb->hose->global_number, pe_no); in pnv_ioda_init_pe()
142 __func__, pe_no, phb->hose->global_number); in pnv_ioda_reserve_pe()
149 __func__, pe_no, phb->hose->global_number); in pnv_ioda_reserve_pe()
233 r = &phb->hose->mem_resources[1]; in pnv_ioda2_init_m64()
356 struct pci_controller *hose = phb->hose; in pnv_ioda_parse_m64_window() local
357 struct device_node *dn = hose->dn; in pnv_ioda_parse_m64_window()
393 __func__, m64_range[1], phb->hose->global_number); in pnv_ioda_parse_m64_window()
399 __func__, phb->hose->global_number); in pnv_ioda_parse_m64_window()
404 res = &hose->mem_resources[1]; in pnv_ioda_parse_m64_window()
410 hose->mem_offset[1] = res->start - pci_addr; in pnv_ioda_parse_m64_window()
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/linux/arch/sh/include/asm/
H A Dpci.h41 extern int register_pci_controller(struct pci_channel *hose);
45 extern int early_read_config_byte(struct pci_channel *hose, int top_bus,
47 extern int early_read_config_word(struct pci_channel *hose, int top_bus,
49 extern int early_read_config_dword(struct pci_channel *hose, int top_bus,
51 extern int early_write_config_byte(struct pci_channel *hose, int top_bus,
53 extern int early_write_config_word(struct pci_channel *hose, int top_bus,
55 extern int early_write_config_dword(struct pci_channel *hose, int top_bus,
57 extern void pcibios_enable_timers(struct pci_channel *hose);
59 unsigned int status, struct pci_channel *hose);
60 extern int pci_is_66mhz_capable(struct pci_channel *hose,
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