65 	struct pci_controller *hose;  in wildfire_init_hose()  local
68 	hose = alloc_pci_controller();  in wildfire_init_hose()
69 	hose->io_space = alloc_resource();  in wildfire_init_hose()
70 	hose->mem_space = alloc_resource();  in wildfire_init_hose()
73         hose->sparse_mem_base = 0;  in wildfire_init_hose()
74         hose->sparse_io_base  = 0;  in wildfire_init_hose()
75         hose->dense_mem_base  = WILDFIRE_MEM(qbbno, hoseno);  in wildfire_init_hose()
76         hose->dense_io_base   = WILDFIRE_IO(qbbno, hoseno);  in wildfire_init_hose()
78 	hose->config_space_base = WILDFIRE_CONF(qbbno, hoseno);  in wildfire_init_hose()
79 	hose->index = (qbbno << 3) + hoseno;  in wildfire_init_hose()
81 	hose->io_space->start = WILDFIRE_IO(qbbno, hoseno) - WILDFIRE_IO_BIAS;  in wildfire_init_hose()
82 	hose->io_space->end = hose->io_space->start + WILDFIRE_IO_SPACE - 1;  in wildfire_init_hose()
83 	hose->io_space->name = pci_io_names[hoseno];  in wildfire_init_hose()
84 	hose->io_space->flags = IORESOURCE_IO;  in wildfire_init_hose()
86 	hose->mem_space->start = WILDFIRE_MEM(qbbno, hoseno)-WILDFIRE_MEM_BIAS;  in wildfire_init_hose()
87 	hose->mem_space->end = hose->mem_space->start + 0xffffffff;  in wildfire_init_hose()
88 	hose->mem_space->name = pci_mem_names[hoseno];  in wildfire_init_hose()
89 	hose->mem_space->flags = IORESOURCE_MEM;  in wildfire_init_hose()
91 	if (request_resource(&ioport_resource, hose->io_space) < 0)  in wildfire_init_hose()
94 	if (request_resource(&iomem_resource, hose->mem_space) < 0)  in wildfire_init_hose()
114 	hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000,  in wildfire_init_hose()
116 	hose->sg_pci = iommu_arena_new(hose, 0xc0000000, 0x08000000,  in wildfire_init_hose()
121 	pci->pci_window[0].wbase.csr = hose->sg_isa->dma_base | 3;  in wildfire_init_hose()
122 	pci->pci_window[0].wmask.csr = (hose->sg_isa->size - 1) & 0xfff00000;  in wildfire_init_hose()
123 	pci->pci_window[0].tbase.csr = virt_to_phys(hose->sg_isa->ptes);  in wildfire_init_hose()
133 	pci->pci_window[3].wbase.csr = hose->sg_pci->dma_base | 3;  in wildfire_init_hose()
134 	pci->pci_window[3].wmask.csr = (hose->sg_pci->size - 1) & 0xfff00000;  in wildfire_init_hose()
135 	pci->pci_window[3].tbase.csr = virt_to_phys(hose->sg_pci->ptes);  in wildfire_init_hose()
137 	wildfire_pci_tbi(hose, 0, 0); /* Flush TLB at the end. */  in wildfire_init_hose()
347 wildfire_pci_tbi(struct pci_controller *hose, dma_addr_t start, dma_addr_t end)  in wildfire_pci_tbi()  argument
349 	int qbbno = hose->index >> 3;  in wildfire_pci_tbi()
350 	int hoseno = hose->index & 7;  in wildfire_pci_tbi()
361 	struct pci_controller *hose = pbus->sysdata;  in mk_conf_addr()  local
374 	addr |= hose->config_space_base;  in mk_conf_addr()