Searched refs:hart (Results 1 – 8 of 8) sorted by relevance
/linux/arch/riscv/kernel/ |
H A D | smpboot.c | 73 unsigned long hart; in acpi_parse_rintc() local 90 hart = processor->hart_id; in acpi_parse_rintc() 91 if (hart == INVALID_HARTID) { in acpi_parse_rintc() 96 if (hart == cpuid_to_hartid_map(0)) { in acpi_parse_rintc() 107 cpuid_to_hartid_map(cpu_count) = hart; in acpi_parse_rintc() 124 unsigned long hart; in of_parse_and_init_cpus() local 130 rc = riscv_early_of_processor_hartid(dn, &hart); in of_parse_and_init_cpus() 134 if (hart == cpuid_to_hartid_map(0)) { in of_parse_and_init_cpus() 142 cpuid, hart); in of_parse_and_init_cpus() 146 cpuid_to_hartid_map(cpuid) = hart; in of_parse_and_init_cpus()
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H A D | cpu.c | 30 int riscv_of_processor_hartid(struct device_node *node, unsigned long *hart) in riscv_of_processor_hartid() argument 34 *hart = (unsigned long)of_get_cpu_hwid(node, 0); in riscv_of_processor_hartid() 35 if (*hart == ~0UL) { in riscv_of_processor_hartid() 40 cpu = riscv_hartid_to_cpuid(*hart); in riscv_of_processor_hartid() 50 int __init riscv_early_of_processor_hartid(struct device_node *node, unsigned long *hart) in riscv_early_of_processor_hartid() argument 59 *hart = (unsigned long)of_get_cpu_hwid(node, 0); in riscv_early_of_processor_hartid() 60 if (*hart == ~0UL) { in riscv_early_of_processor_hartid() 66 pr_info("CPU with hartid=%lu is not available\n", *hart); in riscv_early_of_processor_hartid() 74 pr_warn("CPU with hartid=%lu does not support rv32i", *hart); in riscv_early_of_processor_hartid() 79 pr_warn("CPU with hartid=%lu does not support rv64i", *hart); in riscv_early_of_processor_hartid() [all …]
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/linux/Documentation/translations/zh_CN/arch/riscv/ |
H A D | boot.rst | 70 - ``RISCV_BOOT_SPINWAIT``:固件在内核中释放所有的hart,一个hart赢 71 得抽奖并执行早期启动代码,而其他的hart则停在那里等待初始化完成。这种 73 - ``有序启动``:固件只释放一个将执行初始化阶段的hart,然后使用SBI HSM 74 扩展启动所有其他的hart。有序启动方法是启动RISC-V内核的首选启动方法,
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/linux/Documentation/arch/riscv/ |
H A D | uabi.rst | 45 "isa" and "hart isa" lines in /proc/cpuinfo 50 "hart isa" line, in contrast, describes the set of extensions recognized by the 51 kernel on the particular hart being described, even if those extensions may not
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H A D | boot.rst | 68 - ``RISCV_BOOT_SPINWAIT``: the firmware releases all harts in the kernel, one hart 72 - ``Ordered booting``: the firmware releases only one hart that will execute the
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/linux/tools/perf/pmu-events/arch/riscv/ |
H A D | mapfile.csv | 6 # MARCHID base microarchitecture of the hart
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/linux/arch/riscv/kvm/ |
H A D | aia_device.c | 240 u32 hart = 0, group = 0; in aia_imsic_hart_index() local 243 hart = (addr >> (aia->nr_guest_bits + IMSIC_MMIO_PAGE_SHIFT)) & in aia_imsic_hart_index() 249 return (group << aia->nr_hart_bits) | hart; in aia_imsic_hart_index()
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/linux/arch/riscv/ |
H A D | Kconfig | 680 which allow a hart to enter a low-power state or to trap to the 1010 Since spinwait is incompatible with sparse hart IDs, it requires 1011 NR_CPUS be large enough to contain the physical hart ID of the first 1012 hart to enter Linux.
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