| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/ |
| H A D | dml21_translation_helper.c | 93 …timing->h_active = stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_… in populate_dml21_timing_config_from_stream_state()
109 …timing->h_blank_end = hblank_start - stream->timing.h_addressable - pipe_ctx->dsc_padding_params.d… in populate_dml21_timing_config_from_stream_state()
112 if (hblank_start < stream->timing.h_addressable) in populate_dml21_timing_config_from_stream_state()
370 surface->plane0.width = stream->timing.h_addressable; in populate_dml21_dummy_surface_cfg()
372 surface->plane1.width = stream->timing.h_addressable; in populate_dml21_dummy_surface_cfg()
388 if (stream->timing.h_addressable > 3840) in populate_dml21_dummy_plane_cfg()
391 width = stream->timing.h_addressable; // 4K max in populate_dml21_dummy_plane_cfg()
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| /linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| H A D | dce110_timing_generator.c | 295 uint32_t h_sync_start = dc_crtc_timing->h_addressable + hsync_offset; in dce110_timing_generator_program_timing_generator()
310 bp_params.h_addressable = in dce110_timing_generator_program_timing_generator()
311 patched_crtc_timing.h_addressable; in dce110_timing_generator_program_timing_generator()
610 uint32_t h_sync_start = timing->h_addressable + hsync_offset; in dce110_timing_generator_program_blanking()
669 tmp = tmp + timing->h_addressable + in dce110_timing_generator_program_blanking()
1129 h_sync_start = timing->h_addressable + hsync_offset; in dce110_timing_generator_validate_timing()
1148 h_blank = (timing->h_total - timing->h_addressable - in dce110_timing_generator_validate_timing()
1159 timing->h_addressable - in dce110_timing_generator_validate_timing()
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| H A D | dce110_timing_generator_v.c | 251 uint32_t h_sync_start = timing->h_addressable + hsync_offset; in dce110_timing_generator_v_program_blanking()
288 tmp = tmp + timing->h_addressable + in dce110_timing_generator_v_program_blanking()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource_helpers.c | 265 …if (pipe_ctx->stream->timing.v_addressable == 1080 && pipe_ctx->stream->timing.h_addressable == 19… in override_det_for_subvp()
278 …if (pipe_ctx->stream->timing.v_addressable == 1080 && pipe_ctx->stream->timing.h_addressable == 19… in override_det_for_subvp()
595 if (pipe->stream->timing.h_addressable == width && in dcn32_check_native_scaling_for_res()
624 if (pipe->stream->timing.v_addressable == 1080 && pipe->stream->timing.h_addressable == 1920) in disallow_subvp_in_active_plus_blank()
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| /linux/drivers/gpu/drm/amd/display/dc/optc/dcn201/ |
| H A D | dcn201_optc.c | 82 h_blank = (timing->h_total - timing->h_addressable - in optc201_validate_timing()
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| /linux/drivers/gpu/drm/amd/display/include/ |
| H A D | bios_parser_types.h | 174 uint32_t h_addressable; member
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| /linux/drivers/gpu/drm/amd/display/dc/link/hwss/ |
| H A D | link_hwss_hpo_dp.c | 61 timing->h_total - timing->h_addressable), in set_hpo_dp_hblank_min_symbol_width()
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| /linux/drivers/gpu/drm/amd/display/dc/bios/ |
| H A D | command_table.c | 2147 params.usH_Disp = cpu_to_le16((uint16_t)(bp_params->h_addressable)); in set_crtc_timing_v1()
2220 params.usH_Size = cpu_to_le16((uint16_t)bp_params->h_addressable); in set_crtc_using_dtd_timing_v3()
2223 cpu_to_le16((uint16_t)(bp_params->h_total - bp_params->h_addressable)); in set_crtc_using_dtd_timing_v3()
2233 cpu_to_le16((uint16_t)(bp_params->h_sync_start - bp_params->h_addressable)); in set_crtc_using_dtd_timing_v3()
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| /linux/drivers/gpu/drm/amd/display/dc/dce120/ |
| H A D | dce120_timing_generator.c | 440 uint32_t h_sync_start = timing->h_addressable + hsync_offset; in dce120_timing_generator_program_blanking()
468 tmp2 = tmp1 + timing->h_addressable + in dce120_timing_generator_program_blanking()
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_stream_encoder.c | 462 hw_crtc_timing.h_addressable - hw_crtc_timing.h_border_right; in dce110_stream_encoder_dp_set_stream_attribute()
497 hw_crtc_timing.h_addressable + hw_crtc_timing.h_border_right, in dce110_stream_encoder_dp_set_stream_attribute()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_hw_types.h | 908 uint32_t h_addressable; member
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc.c | 731 param.windowa_x_end = pipe->stream->timing.h_addressable; in dc_stream_configure_crc()
735 param.windowb_x_end = pipe->stream->timing.h_addressable; in dc_stream_configure_crc()
1866 if (crtc_timing->h_addressable != hw_crtc_timing.h_addressable) { in dc_validate_boot_timing()
2295 context->streams[i]->timing.h_addressable, in dc_commit_state_no_check()
7028 state->opp[i].oppbuf_active_width = timing->h_addressable; in dc_capture_register_software_state()
7086 state->optc[i].otg_h_blank_start = timing->h_addressable; in dc_capture_register_software_state()
7088 state->optc[i].otg_h_sync_start = timing->h_addressable + timing->h_front_porch; in dc_capture_register_software_state()
7089 …state->optc[i].otg_h_sync_end = timing->h_addressable + timing->h_front_porch + timing->h_sync_wid… in dc_capture_register_software_state()
7124 state->optc[i].optc_dsc_slice_width = timing->h_addressable / timing->dsc_cfg.num_slices_h; in dc_capture_register_software_state()
7139 …tc_segment_width = (pipe_ctx->next_odm_pipe) ? (timing->h_addressable / 2) : timing->h_addressable; in dc_capture_register_software_state()
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| H A D | dc_resource.c | 653 if (stream1->timing.h_addressable in resource_are_streams_timing_synchronizable()
654 != stream2->timing.h_addressable) in resource_are_streams_timing_synchronizable()
2190 h_active = timing->h_addressable + in resource_get_odm_slice_dst_width()
5504 h_blank_end = h_blank_start - stream->timing.h_addressable; in is_h_timing_divisible_by_2()
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| /linux/drivers/gpu/drm/amd/display/dc/link/ |
| H A D | link_dpms.c | 836 …dsc_cfg.pic_width = (stream->timing.h_addressable + pipe_ctx->dsc_padding_params.dsc_hactive_paddi… in link_set_dsc_on_stream()
970 …dsc_cfg.pic_width = stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h… in link_set_dsc_pps_packet()
1915 bool is_vga_mode = (stream->timing.h_addressable == 640) in enable_link_hdmi()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| H A D | dce110_hwseq.c | 681 timing->h_addressable in dce110_enable_stream()
1318 uint32_t h_active = crtc_timing->h_addressable + crtc_timing->h_border_left in populate_audio_dp_link_info()
1392 stream->timing.h_addressable in build_audio_output()
2270 params.source_view_width = pipe_ctx->stream->timing.h_addressable; in enable_fbc()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| H A D | dcn_calcs.c | 434 - pipe->stream->timing.h_addressable in pipe_ctx_to_e2e_pipe_params()
920 v->viewport_width[input_idx] = pipe->stream->timing.h_addressable; in dcn_validate_bandwidth()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| H A D | dcn32_clk_mgr.c | 496 if (pipe->stream->timing.h_addressable == width && in dcn32_check_native_scaling()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| H A D | dcn20_resource.c | 1663 …dsc_cfg.pic_width = (stream->timing.h_addressable + pipe_ctx->dsc_padding_params.dsc_hactive_paddi… in dcn20_validate_dsc()
1930 if (pipe->stream->timing.h_addressable > 7680 && in dcn20_validate_apply_pipe_split_flags()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dce110/ |
| H A D | dce110_resource.c | 991 context->streams[0]->timing.h_addressable, in dce110_validate_bandwidth()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 829 …patched_crtc_timing.h_addressable = patched_crtc_timing.h_addressable + pipe_ctx->dsc_padding_para… in dcn401_enable_stream_timing()
938 timing->h_addressable in dcn401_enable_stream_calc()
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn20/ |
| H A D | dcn20_hubp.c | 1108 hubp->cur_rect.w = param->stream->timing.h_addressable; in hubp2_cursor_set_position()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.c | 771 flow_ctrl_cnt = stream->timing.h_total - stream->timing.h_addressable - in calc_mpc_flow_ctrl_cnt()
3080 timing->h_addressable in dcn20_enable_stream()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
| H A D | dcn401_clk_mgr.c | 401 if (pipe->stream->timing.h_addressable == width && in dcn401_check_native_scaling()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| H A D | dcn32_hwseq.c | 1064 …dsc_cfg.pic_width = (stream->timing.h_addressable + pipe_ctx->dsc_padding_params.dsc_hactive_paddi… in dcn32_update_dsc_on_stream()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| H A D | dcn35_hwseq.c | 359 …dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.… in update_dsc_on_stream()
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