Searched refs:gpuvm_max_page_table_levels (Results 1 – 4 of 4) sorted by relevance
52 out->gpuvm_max_page_table_levels = 4; in dml2_init_ip_params()128 out->gpuvm_max_page_table_levels = 1; in dml2_init_ip_params()190 out->gpuvm_max_page_table_levels = 4; in dml2_init_ip_params()639 out->gpuvm_max_page_table_levels = in_ip_params->gpuvm_max_page_table_levels; in dml2_translate_ip_params()1320 dml_dispcfg->plane.GPUVMMaxPageTableLevels = dml2->v20.dml_core_ctx.ip.gpuvm_max_page_table_levels; in map_dc_state_into_dml_display_cfg()
394 dml_uint_t gpuvm_max_page_table_levels; member
267 unsigned int gpuvm_max_page_table_levels; member
1356 …late_vm_and_row_bytes_params.GPUVMMaxPageTableLevels = p->display_cfg->gpuvm_max_page_table_levels; in dcn5_calculate_vm_row_and_swath()1437 …late_vm_and_row_bytes_params.GPUVMMaxPageTableLevels = p->display_cfg->gpuvm_max_page_table_levels; in dcn5_calculate_vm_row_and_swath()2754 …OSE("DML::%s: GPUVMPageTableLevels = %u\n", __func__, p->display_cfg->gpuvm_max_page_table_levels); in dcn5_calculate_prefetch_schedule()2788 …aLatencyPrefetch + math_max2(s->trip_to_mem * (p->display_cfg->gpuvm_max_page_table_levels * (s->H… in dcn5_calculate_prefetch_schedule()2888 …OSE("DML::%s: GPUVMPageTableLevels = %u\n", __func__, p->display_cfg->gpuvm_max_page_table_levels); in dcn5_calculate_prefetch_schedule()2915 if (p->display_cfg->gpuvm_max_page_table_levels >= 3) { in dcn5_calculate_prefetch_schedule()2916 …raLatencyPrefetch + s->trip_to_mem * (double)((p->display_cfg->gpuvm_max_page_table_levels - 2) * … in dcn5_calculate_prefetch_schedule()2917 …} else if (p->display_cfg->gpuvm_max_page_table_levels == 1 && !dcc_mrq_enable && !p->setup_for_td… in dcn5_calculate_prefetch_schedule()2926 if (p->mrq_present || p->display_cfg->gpuvm_max_page_table_levels >= 3) in dcn5_calculate_prefetch_schedule()2958 …extra_tdpe_bytes = (unsigned int)math_max2(0, (p->display_cfg->gpuvm_max_page_table_levels - 1) * … in dcn5_calculate_prefetch_schedule()[all …]