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Searched refs:gpuvm_max_page_table_levels (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/
H A Ddcn42_soc_bb.h214 .gpuvm_max_page_table_levels = 1,
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/
H A Ddml_top_display_cfg_types.h454 unsigned int gpuvm_max_page_table_levels; member
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c58 .gpuvm_max_page_table_levels = 1,
202 .gpuvm_max_page_table_levels = 1,
301 .gpuvm_max_page_table_levels = 1,
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/
H A Ddml21_translation_helper.c802 if (dml_ctx->v21.dml_init.soc_bb.gpuvm_max_page_table_levels) in dml21_map_dc_state_into_dml_display_cfg()
803 dml_dispcfg->gpuvm_max_page_table_levels = dml_ctx->v21.dml_init.soc_bb.gpuvm_max_page_table_levels; in dml21_map_dc_state_into_dml_display_cfg()
805 dml_dispcfg->gpuvm_max_page_table_levels = 4; in dml21_map_dc_state_into_dml_display_cfg()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddml2_translation_helper.c52 out->gpuvm_max_page_table_levels = 4; in dml2_init_ip_params()
128 out->gpuvm_max_page_table_levels = 1; in dml2_init_ip_params()
190 out->gpuvm_max_page_table_levels = 4; in dml2_init_ip_params()
638 out->gpuvm_max_page_table_levels = in_ip_params->gpuvm_max_page_table_levels; in dml2_translate_ip_params()
1319 dml_dispcfg->plane.GPUVMMaxPageTableLevels = dml2->v20.dml_core_ctx.ip.gpuvm_max_page_table_levels; in map_dc_state_into_dml_display_cfg()
H A Ddisplay_mode_core_structs.h394 dml_uint_t gpuvm_max_page_table_levels; member
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_structs.h267 unsigned int gpuvm_max_page_table_levels; member
H A Ddisplay_mode_vba.c489 mode_lib->vba.GPUVMMaxPageTableLevels = ip->gpuvm_max_page_table_levels; in fetch_ip_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c88 .gpuvm_max_page_table_levels = 4,
155 .gpuvm_max_page_table_levels = 4,
557 .gpuvm_max_page_table_levels = 1,
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn201/
H A Ddcn201_resource.c80 .gpuvm_max_page_table_levels = 4,
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn4_calcs.c2942 scratch->calculate_vm_and_row_bytes_params.GPUVMMaxPageTableLevels = p->display_cfg->gpuvm_max_page_table_levels; in CalculateVMRowAndSwath()
3020 scratch->calculate_vm_and_row_bytes_params.GPUVMMaxPageTableLevels = p->display_cfg->gpuvm_max_page_table_levels; in CalculateVMRowAndSwath()
5210 DML_LOG_VERBOSE("DML::%s: GPUVMPageTableLevels = %u\n", __func__, p->display_cfg->gpuvm_max_page_table_levels); in CalculatePrefetchSchedule()
5245 *p->Tvm_trips = p->ExtraLatencyPrefetch + math_max2(s->trip_to_mem * (p->display_cfg->gpuvm_max_page_table_levels * (s->HostVMDynamicLevelsTrips + 1)), p->Turg); in CalculatePrefetchSchedule()
5330 DML_LOG_VERBOSE("DML::%s: GPUVMPageTableLevels = %u\n", __func__, p->display_cfg->gpuvm_max_page_table_levels); in CalculatePrefetchSchedule()
5358 if (p->display_cfg->gpuvm_max_page_table_levels >= 3) { in CalculatePrefetchSchedule()
5359 *p->Tno_bw = p->ExtraLatencyPrefetch + s->trip_to_mem * (double)((p->display_cfg->gpuvm_max_page_table_levels - 2) * (s->HostVMDynamicLevelsTrips + 1)); in CalculatePrefetchSchedule()
5360 } else if (p->display_cfg->gpuvm_max_page_table_levels == 1 && !dcc_mrq_enable && !p->setup_for_tdlut) { in CalculatePrefetchSchedule()
5369 if (p->mrq_present || p->display_cfg->gpuvm_max_page_table_levels >= 3) in CalculatePrefetchSchedule()
5384 extra_tdpe_bytes = (unsigned int)math_max2(0, (p->display_cfg->gpuvm_max_page_table_levels in CalculatePrefetchSchedule()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c59 .gpuvm_max_page_table_levels = 4,