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Searched refs:gpu_write64 (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/msm/adreno/
H A Da8xx_gpu.c653 gpu_write64(gpu, REG_A6XX_RBBM_SECVID_TSB_TRUSTED_BASE, 0x00000000); in hw_init()
662 gpu_write64(gpu, REG_A8XX_UCHE_CCHE_GC_GMEM_RANGE_MIN, gmem_range_min); in hw_init()
663 gpu_write64(gpu, REG_A8XX_SP_HLSQ_GC_GMEM_RANGE_MIN, gmem_range_min); in hw_init()
666 gpu_write64(gpu, REG_A8XX_UCHE_TRAP_BASE, adreno_gpu->uche_trap_base); in hw_init()
667 gpu_write64(gpu, REG_A8XX_UCHE_WRITE_THRU_BASE, adreno_gpu->uche_trap_base); in hw_init()
668 gpu_write64(gpu, REG_A8XX_UCHE_CCHE_TRAP_BASE, adreno_gpu->uche_trap_base); in hw_init()
669 gpu_write64(gpu, REG_A8XX_UCHE_CCHE_WRITE_THRU_BASE, adreno_gpu->uche_trap_base); in hw_init()
756 gpu_write64(gpu, REG_A8XX_CP_SQE_INSTR_BASE, a6xx_gpu->sqe_iova); in hw_init()
758 gpu_write64(gpu, REG_A8XX_CP_AQE_INSTR_BASE_0, a6xx_gpu->aqe_iova); in hw_init()
761 gpu_write64(gpu, REG_A6XX_CP_RB_BASE, gpu->rb[0]->iova); in hw_init()
[all …]
H A Da5xx_gpu.c755 gpu_write64(gpu, REG_A5XX_UCHE_TRAP_BASE, adreno_gpu->uche_trap_base); in a5xx_hw_init()
756 gpu_write64(gpu, REG_A5XX_UCHE_WRITE_THRU_BASE, adreno_gpu->uche_trap_base); in a5xx_hw_init()
759 gpu_write64(gpu, REG_A5XX_UCHE_GMEM_RANGE_MIN, 0x00100000); in a5xx_hw_init()
760 gpu_write64(gpu, REG_A5XX_UCHE_GMEM_RANGE_MAX, in a5xx_hw_init()
892 gpu_write64(gpu, REG_A5XX_RBBM_SECVID_TSB_TRUSTED_BASE_LO, 0x00000000); in a5xx_hw_init()
926 gpu_write64(gpu, REG_A5XX_CP_ME_INSTR_BASE_LO, a5xx_gpu->pm4_iova); in a5xx_hw_init()
927 gpu_write64(gpu, REG_A5XX_CP_PFP_INSTR_BASE_LO, a5xx_gpu->pfp_iova); in a5xx_hw_init()
930 gpu_write64(gpu, REG_A5XX_CP_RB_BASE, gpu->rb[0]->iova); in a5xx_hw_init()
943 gpu_write64(gpu, REG_A5XX_CP_RB_RPTR_ADDR, in a5xx_hw_init()
1474 gpu_write64(gpu, REG_A5XX_CP_CRASH_SCRIPT_BASE_LO, dumper->iova); in a5xx_crashdumper_run()
H A Da5xx_preempt.c153 gpu_write64(gpu, REG_A5XX_CP_CONTEXT_SWITCH_RESTORE_ADDR_LO, in a5xx_preempt_trigger()
240 gpu_write64(gpu, REG_A5XX_CP_CONTEXT_SWITCH_SMMU_INFO_LO, 0); in a5xx_preempt_hw_init()
H A Da6xx_gpu.c1220 gpu_write64(gpu, REG_A6XX_RBBM_SECVID_TSB_TRUSTED_BASE, 0x00000000); in hw_init()
1271 gpu_write64(gpu, REG_A6XX_UCHE_TRAP_BASE, adreno_gpu->uche_trap_base); in hw_init()
1272 gpu_write64(gpu, REG_A6XX_UCHE_WRITE_THRU_BASE, adreno_gpu->uche_trap_base); in hw_init()
1274 gpu_write64(gpu, REG_A6XX_UCHE_WRITE_RANGE_MAX, adreno_gpu->uche_trap_base + 0xfc0); in hw_init()
1275 gpu_write64(gpu, REG_A6XX_UCHE_TRAP_BASE, adreno_gpu->uche_trap_base); in hw_init()
1276 gpu_write64(gpu, REG_A6XX_UCHE_WRITE_THRU_BASE, adreno_gpu->uche_trap_base); in hw_init()
1286 gpu_write64(gpu, REG_A6XX_UCHE_GMEM_RANGE_MIN, gmem_range_min); in hw_init()
1288 gpu_write64(gpu, REG_A6XX_UCHE_GMEM_RANGE_MAX, in hw_init()
1443 gpu_write64(gpu, REG_A6XX_CP_SQE_INSTR_BASE, a6xx_gpu->sqe_iova); in hw_init()
1446 gpu_write64(gpu, REG_A6XX_CP_RB_BASE, gpu->rb[0]->iova); in hw_init()
[all …]
H A Da6xx_gpu_state.c163 gpu_write64(gpu, REG_A6XX_CP_CRASH_DUMP_SCRIPT_BASE, dumper->iova); in a6xx_crashdumper_run()
/linux/drivers/gpu/drm/panthor/
H A Dpanthor_gpu.c227 gpu_write64(gpu->iomem, pwroff_reg, mask); in panthor_gpu_block_power_off()
271 gpu_write64(gpu->iomem, pwron_reg, mask); in panthor_gpu_block_power_on()
H A Dpanthor_mmu.c616 gpu_write64(mmu->iomem, AS_TRANSTAB(as_nr), transtab); in panthor_mmu_as_enable()
617 gpu_write64(mmu->iomem, AS_MEMATTR(as_nr), memattr); in panthor_mmu_as_enable()
618 gpu_write64(mmu->iomem, AS_TRANSCFG(as_nr), transcfg); in panthor_mmu_as_enable()
654 gpu_write64(mmu->iomem, AS_TRANSTAB(as_nr), 0); in panthor_mmu_as_disable()
655 gpu_write64(mmu->iomem, AS_MEMATTR(as_nr), 0); in panthor_mmu_as_disable()
656 gpu_write64(mmu->iomem, AS_TRANSCFG(as_nr), AS_TRANSCFG_ADRMODE_UNMAPPED); in panthor_mmu_as_disable()
1815 gpu_write64(ptdev->mmu->iomem, AS_LOCKADDR(vm->as.id), in panthor_vm_lock_region()
H A Dpanthor_device.h653 static inline void gpu_write64(void __iomem *iomem, u32 reg, u64 data) in gpu_write64() function
H A Dpanthor_pwr.c85 gpu_write64(pwr->iomem, PWR_CMDARG, args); in panthor_pwr_write_command()
/linux/drivers/gpu/drm/msm/
H A Dmsm_gpu.h692 static inline void gpu_write64(struct msm_gpu *gpu, u32 reg, u64 val) in gpu_write64() function