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Searched refs:gb_addr_config (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dni.c867 u32 gb_addr_config = 0; in cayman_gpu_init() local
900 gb_addr_config = CAYMAN_GB_ADDR_CONFIG_GOLDEN; in cayman_gpu_init()
974 gb_addr_config = ARUBA_GB_ADDR_CONFIG_GOLDEN; in cayman_gpu_init()
1005 tmp = (gb_addr_config & NUM_PIPES_MASK) >> NUM_PIPES_SHIFT; in cayman_gpu_init()
1007 tmp = (gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT; in cayman_gpu_init()
1009 tmp = (gb_addr_config & NUM_SHADER_ENGINES_MASK) >> NUM_SHADER_ENGINES_SHIFT; in cayman_gpu_init()
1011 tmp = (gb_addr_config & NUM_GPUS_MASK) >> NUM_GPUS_SHIFT; in cayman_gpu_init()
1013 tmp = (gb_addr_config & MULTI_GPU_TILE_SIZE_MASK) >> MULTI_GPU_TILE_SIZE_SHIFT; in cayman_gpu_init()
1015 tmp = (gb_addr_config & ROW_SIZE_MASK) >> ROW_SIZE_SHIFT; in cayman_gpu_init()
1061 ((gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT) << 8; in cayman_gpu_init()
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/linux/drivers/gpu/drm/amd/amdgpu/
H A Duvd_v3_1.c274 WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v3_1_mc_resume()
275 WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v3_1_mc_resume()
276 WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v3_1_mc_resume()
H A Dgfx_v9_0.c2025 u32 gb_addr_config; in gfx_v9_0_gpu_early_init() local
2035 gb_addr_config = VEGA10_GB_ADDR_CONFIG_GOLDEN; in gfx_v9_0_gpu_early_init()
2043 gb_addr_config = VEGA12_GB_ADDR_CONFIG_GOLDEN; in gfx_v9_0_gpu_early_init()
2053 gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG); in gfx_v9_0_gpu_early_init()
2054 gb_addr_config &= ~0xf3e777ff; in gfx_v9_0_gpu_early_init()
2055 gb_addr_config |= 0x22014042; in gfx_v9_0_gpu_early_init()
2069 gb_addr_config = RAVEN2_GB_ADDR_CONFIG_GOLDEN; in gfx_v9_0_gpu_early_init()
2071 gb_addr_config = RAVEN_GB_ADDR_CONFIG_GOLDEN; in gfx_v9_0_gpu_early_init()
2080 gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG); in gfx_v9_0_gpu_early_init()
2081 gb_addr_config &= ~0xf3e777ff; in gfx_v9_0_gpu_early_init()
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H A Dsoc24.c144 adev->gfx.config.gb_addr_config) in soc24_get_register_value()
145 return adev->gfx.config.gb_addr_config; in soc24_get_register_value()
H A Dgfx_v8_0.c1648 u32 gb_addr_config; in gfx_v8_0_gpu_early_init() local
1670 gb_addr_config = TOPAZ_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1687 gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1702 gb_addr_config = POLARIS11_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1717 gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1734 gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1751 gb_addr_config = CARRIZO_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1768 gb_addr_config = CARRIZO_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1785 gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1840 gb_addr_config = REG_SET_FIELD(gb_addr_config, GB_ADDR_CONFIG, ROW_SIZE, 0); in gfx_v8_0_gpu_early_init()
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H A Djpeg_v4_0_5.c452 adev->gfx.config.gb_addr_config, indirect); in jpeg_v4_0_5_start_dpg_mode()
537 adev->gfx.config.gb_addr_config); in jpeg_v4_0_5_start()
H A Dgfx_v12_1.c2924 u32 gb_addr_config; in get_gb_addr_config() local
2926 gb_addr_config = RREG32_SOC15(GC, GET_INST(GC, 0), regGB_ADDR_CONFIG_READ); in get_gb_addr_config()
2927 if (gb_addr_config == 0) in get_gb_addr_config()
2931 1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG_READ, NUM_PKRS); in get_gb_addr_config()
2933 adev->gfx.config.gb_addr_config = gb_addr_config; in get_gb_addr_config()
2936 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
2943 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
2946 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
2949 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
2952 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
H A Dsoc21.c317 if (reg_offset == SOC15_REG_OFFSET(GC, 0, regGB_ADDR_CONFIG) && adev->gfx.config.gb_addr_config) in soc21_get_register_value()
318 return adev->gfx.config.gb_addr_config; in soc21_get_register_value()
H A Dgfx_v12_0.c3624 u32 gb_addr_config; in get_gb_addr_config() local
3626 gb_addr_config = RREG32_SOC15(GC, 0, regGB_ADDR_CONFIG); in get_gb_addr_config()
3627 if (gb_addr_config == 0) in get_gb_addr_config()
3631 1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PKRS); in get_gb_addr_config()
3633 adev->gfx.config.gb_addr_config = gb_addr_config; in get_gb_addr_config()
3636 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
3643 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
3646 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
3649 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
3652 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
H A Dgfx_v9_4_3.c863 adev->gfx.config.gb_addr_config = GOLDEN_GB_ADDR_CONFIG; in gfx_v9_4_3_gpu_early_init()
867 adev->gfx.config.gb_addr_config, in gfx_v9_4_3_gpu_early_init()
876 adev->gfx.config.gb_addr_config, in gfx_v9_4_3_gpu_early_init()
881 adev->gfx.config.gb_addr_config, in gfx_v9_4_3_gpu_early_init()
886 adev->gfx.config.gb_addr_config, in gfx_v9_4_3_gpu_early_init()
891 adev->gfx.config.gb_addr_config, in gfx_v9_4_3_gpu_early_init()
896 adev->gfx.config.gb_addr_config, in gfx_v9_4_3_gpu_early_init()
H A Dgfx_v11_0.c4807 u32 gb_addr_config; in get_gb_addr_config() local
4809 gb_addr_config = RREG32_SOC15(GC, 0, regGB_ADDR_CONFIG); in get_gb_addr_config()
4810 if (gb_addr_config == 0) in get_gb_addr_config()
4814 1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PKRS); in get_gb_addr_config()
4816 adev->gfx.config.gb_addr_config = gb_addr_config; in get_gb_addr_config()
4819 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
4826 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
4829 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
4832 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
4835 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
H A Dvcn_v5_0_0.c524 adev->gfx.config.gb_addr_config, 0, indirect); in vcn_v5_0_0_mc_resume_dpg_mode()
887 adev->gfx.config.gb_addr_config); in vcn_v5_0_0_start()
H A Djpeg_v4_0_3.c580 adev->gfx.config.gb_addr_config); in jpeg_v4_0_3_start_inst()
582 adev->gfx.config.gb_addr_config); in jpeg_v4_0_3_start_inst()
H A Djpeg_v4_0.c406 adev->gfx.config.gb_addr_config); in jpeg_v4_0_start()
H A Dgfx_v10_0.c4583 u32 gb_addr_config = 0; in gfx_v10_0_gpu_early_init() local
4594 gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG); in gfx_v10_0_gpu_early_init()
4609 gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG); in gfx_v10_0_gpu_early_init()
4611 1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PKRS); in gfx_v10_0_gpu_early_init()
4620 gb_addr_config = CYAN_SKILLFISH_GB_ADDR_CONFIG_GOLDEN; in gfx_v10_0_gpu_early_init()
4628 adev->gfx.config.gb_addr_config = gb_addr_config; in gfx_v10_0_gpu_early_init()
4631 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in gfx_v10_0_gpu_early_init()
4638 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in gfx_v10_0_gpu_early_init()
4641 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in gfx_v10_0_gpu_early_init()
4644 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in gfx_v10_0_gpu_early_init()
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H A Djpeg_v5_0_1.c397 adev->gfx.config.gb_addr_config); in jpeg_v5_0_1_init_inst()
H A Dvcn_v2_0.c435 WREG32_SOC15(UVD, 0, mmUVD_GFX10_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in vcn_v2_0_mc_resume()
533 UVD, 0, mmUVD_GFX10_ADDR_CONFIG), adev->gfx.config.gb_addr_config, 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_plane.c922 u32 gb_addr_config; in amdgpu_dm_plane_add_gfx11_modifiers() local
932 gb_addr_config = RREG32_SOC15(GC, 0, regGB_ADDR_CONFIG); in amdgpu_dm_plane_add_gfx11_modifiers()
933 ASSERT(gb_addr_config != 0); in amdgpu_dm_plane_add_gfx11_modifiers()
935 num_pkrs = 1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PKRS); in amdgpu_dm_plane_add_gfx11_modifiers()
937 num_pipes = 1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PIPES); in amdgpu_dm_plane_add_gfx11_modifiers()