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Searched refs:for_each_inst (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfxhub_v1_2.c50 for_each_inst(i, xcc_mask) { in gfxhub_v1_2_xcc_setup_vm_pt_regs()
92 for_each_inst(i, xcc_mask) { in gfxhub_v1_2_xcc_init_gart_aperture_regs()
133 for_each_inst(i, xcc_mask) { in gfxhub_v1_2_xcc_init_system_aperture_regs()
202 for_each_inst(i, xcc_mask) { in gfxhub_v1_2_xcc_init_tlb_regs()
228 for_each_inst(i, xcc_mask) { in gfxhub_v1_2_xcc_init_cache_regs()
277 for_each_inst(i, xcc_mask) { in gfxhub_v1_2_xcc_enable_system_domain()
296 for_each_inst(i, xcc_mask) { in gfxhub_v1_2_xcc_disable_identity_aperture()
343 for_each_inst(j, xcc_mask) { in gfxhub_v1_2_xcc_setup_vmid_config()
406 for_each_inst(j, xcc_mask) { in gfxhub_v1_2_xcc_program_invalidation()
452 for_each_inst(j, xcc_mask) { in gfxhub_v1_2_xcc_gart_disable()
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H A Dgfxhub_v12_1.c68 for_each_inst(i, xcc_mask) { in gfxhub_v12_1_xcc_setup_vm_pt_regs()
109 for_each_inst(i, xcc_mask) { in gfxhub_v12_1_xcc_init_gart_aperture_regs()
154 for_each_inst(i, xcc_mask) { in gfxhub_v12_1_xcc_init_system_aperture_regs()
258 for_each_inst(i, xcc_mask) { in gfxhub_v12_1_xcc_init_tlb_regs()
293 for_each_inst(i, xcc_mask) { in gfxhub_v12_1_xcc_init_cache_regs()
362 for_each_inst(i, xcc_mask) { in gfxhub_v12_1_xcc_enable_system_domain()
385 for_each_inst(i, xcc_mask) { in gfxhub_v12_1_xcc_disable_identity_aperture()
421 for_each_inst(j, xcc_mask) { in gfxhub_v12_1_xcc_setup_vmid_config()
479 for_each_inst(j, xcc_mask) { in gfxhub_v12_1_xcc_program_invalidation()
502 for_each_inst(i, xcc_mask) { in gfxhub_v12_1_xcc_gart_enable()
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H A Dsdma_v4_4_2.c496 for_each_inst(i, inst_mask) { in sdma_v4_4_2_inst_gfx_stop()
551 for_each_inst(i, inst_mask) { in sdma_v4_4_2_inst_page_stop()
602 for_each_inst(i, inst_mask) { in sdma_v4_4_2_inst_ctx_switch_enable()
648 for_each_inst(i, inst_mask) { in sdma_v4_4_2_inst_enable()
928 for_each_inst(i, inst_mask) { in sdma_v4_4_2_inst_load_microcode()
990 for_each_inst(i, tmp_mask) { in sdma_v4_4_2_inst_start()
1028 for_each_inst(i, tmp_mask) { in sdma_v4_4_2_inst_start()
1973 for_each_inst(i, inst_mask) { in sdma_v4_4_2_inst_update_medium_grain_light_sleep()
1981 for_each_inst(i, inst_mask) { in sdma_v4_4_2_inst_update_medium_grain_light_sleep()
2002 for_each_inst(i, inst_mask) { in sdma_v4_4_2_inst_update_medium_grain_clock_gating()
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H A Dsdma_v7_1.c372 for_each_inst(i, inst_mask) { in sdma_v7_1_inst_gfx_stop()
410 for_each_inst(i, inst_mask) { in sdma_v7_1_inst_ctx_switch_enable()
439 for_each_inst(i, inst_mask) { in sdma_v7_1_inst_enable()
620 for_each_inst(i, inst_mask) { in sdma_v7_1_inst_gfx_resume()
650 for_each_inst(i, inst_mask) { in sdma_v7_1_inst_free_ucode_buffer()
689 for_each_inst(i, inst_mask) { in sdma_v7_1_inst_load_microcode()
750 for_each_inst(i, inst_mask) { in sdma_v7_1_soft_reset()
H A Dnbio_v7_9.c444 for_each_inst(i, inst_mask) { in nbio_v7_9_init_registers()
452 for_each_inst(i, adev->aid_mask) { in nbio_v7_9_init_registers()
H A Damdgpu_gmc.c1278 for_each_inst(mode, adev->gmc.supported_nps_modes) { in available_memory_partition_show()
1298 for_each_inst(i, adev->gmc.supported_nps_modes) { in current_memory_partition_store()
1641 for_each_inst(xcc_id, xcc_mask) { in amdgpu_gmc_init_acpi_mem_ranges()
H A Dgfx_v9_4_3.c4219 for_each_inst(i, tmp_mask) in gfx_v9_4_3_xcp_resume()
4224 for_each_inst(i, tmp_mask) { in gfx_v9_4_3_xcp_resume()
4232 for_each_inst(i, tmp_mask) { in gfx_v9_4_3_xcp_resume()
4246 for_each_inst(i, inst_mask) in gfx_v9_4_3_xcp_suspend()
H A Dgfx_v12_1.c2812 for_each_inst(xcc_id, xcc_mask) { in gfx_v12_1_xcc_cp_resume()
4436 for_each_inst(i, tmp_mask) in gfx_v12_1_xcp_resume()
4441 for_each_inst(i, tmp_mask) { in gfx_v12_1_xcp_resume()
4458 for_each_inst(i, inst_mask) in gfx_v12_1_xcp_suspend()
H A Damdgpu.h1170 #define for_each_inst(i, inst_mask) \ macro
H A Damdgpu_gfx.c1220 for_each_inst(i, xcc_mask) in amdgpu_gfx_ras_error_func()
1745 for_each_inst(mode, xcp_mgr->avail_xcp_modes) { in amdgpu_gfx_get_available_compute_partition()
H A Dsdma_v5_0.c567 for_each_inst(i, inst_mask) { in sdma_v5_0_gfx_stop()
H A Dsdma_v5_2.c417 for_each_inst(i, inst_mask) { in sdma_v5_2_gfx_stop()
H A Damdgpu_vm.c1740 for_each_inst(xcc, xcc_mask) { in amdgpu_vm_flush_compute_tlb()
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_mqd_manager_v9.c659 for_each_inst(xcc_id, xcc_mask) { in hiq_load_mqd_kiq_v9_4_3()
684 for_each_inst(xcc_id, xcc_mask) { in destroy_hiq_mqd_v9_4_3()
709 for_each_inst(xcc_id, xcc_mask) { in check_preemption_failed_v9_4_3()
918 for_each_inst(xcc_id, xcc_mask) { in destroy_mqd_v9_4_3()
944 for_each_inst(xcc_id, xcc_mask) { in load_mqd_v9_4_3()
H A Dkfd_mqd_manager_v12_1.c544 for_each_inst(xcc_id, xcc_mask) { in destroy_mqd_v12_1()
570 for_each_inst(xcc_id, xcc_mask) { in load_mqd_v12_1()
H A Dkfd_device_queue_manager.c158 for_each_inst(xcc_id, xcc_mask) in program_sh_mem_settings()
640 for_each_inst(xcc_id, xcc_mask) in program_trap_handler_settings()
964 for_each_inst(xcc_id, xcc_mask) in dbgdev_wave_reset_wavefronts()
1712 for_each_inst(xcc_id, xcc_mask) { in set_pasid_vmid_mapping()
1727 for_each_inst(xcc_id, xcc_mask) { in init_interrupts()
2430 for_each_inst(xcc_id, dqm->dev->xcc_mask) { in detect_queue_hang()
3977 for_each_inst(xcc_id, xcc_mask) { in dqm_debugfs_hqds()
H A Dkfd_device.c723 for_each_inst(xcc, xcc_mask) { in kfd_setup_interrupt_bitmap()
732 for_each_inst(xcc, xcc_mask) { in kfd_setup_interrupt_bitmap()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu15/
H A Dsmu_v15_0_8_ppt.c1643 for_each_inst(k, inst_mask) { in smu_v15_0_8_get_xcp_metrics()
1661 for_each_inst(k, inst_mask) { in smu_v15_0_8_get_xcp_metrics()
1735 for_each_inst(i, mid_mask) { in smu_v15_0_8_get_gpu_metrics()
1741 for_each_inst(i, aid_mask) { in smu_v15_0_8_get_gpu_metrics()
1771 for_each_inst(i, mid_mask) { in smu_v15_0_8_get_gpu_metrics()
1792 for_each_inst(i, aid_mask) { in smu_v15_0_8_get_gpu_metrics()