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Searched refs:fence_drv (Results 1 – 25 of 31) sorted by relevance

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/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_fence.c65 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_write()
81 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_read()
124 seq = ++ring->fence_drv.sync_seq; in amdgpu_fence_emit()
126 &ring->fence_drv.lock, in amdgpu_fence_emit()
130 amdgpu_ring_emit_fence(ring, ring->fence_drv.gpu_addr, in amdgpu_fence_emit()
135 ptr = &ring->fence_drv.fences[seq & ring->fence_drv.num_fences_mask]; in amdgpu_fence_emit()
181 seq = ++ring->fence_drv.sync_seq; in amdgpu_fence_emit_polling()
183 seq - ring->fence_drv.num_fences_mask, in amdgpu_fence_emit_polling()
188 amdgpu_ring_emit_fence(ring, ring->fence_drv.gpu_addr, in amdgpu_fence_emit_polling()
205 mod_timer(&ring->fence_drv.fallback_timer, in amdgpu_fence_schedule_fallback()
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H A Damdgpu_userq_fence.c67 static u64 amdgpu_userq_fence_read(struct amdgpu_userq_fence_driver *fence_drv) in amdgpu_userq_fence_read() argument
69 return le64_to_cpu(*fence_drv->cpu_addr); in amdgpu_userq_fence_read()
73 amdgpu_userq_fence_write(struct amdgpu_userq_fence_driver *fence_drv, in amdgpu_userq_fence_write() argument
76 if (fence_drv->cpu_addr) in amdgpu_userq_fence_write()
77 *fence_drv->cpu_addr = cpu_to_le64(seq); in amdgpu_userq_fence_write()
83 struct amdgpu_userq_fence_driver *fence_drv; in amdgpu_userq_fence_driver_alloc() local
87 fence_drv = kzalloc_obj(*fence_drv); in amdgpu_userq_fence_driver_alloc()
88 if (!fence_drv) in amdgpu_userq_fence_driver_alloc()
92 r = amdgpu_seq64_alloc(adev, &fence_drv->va, &fence_drv->gpu_addr, in amdgpu_userq_fence_driver_alloc()
93 &fence_drv->cpu_addr); in amdgpu_userq_fence_driver_alloc()
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H A Dumsch_mm_v4_0.c310 set_hw_resources.api_status.api_completion_fence_addr = umsch->ring.fence_drv.gpu_addr; in umsch_mm_v4_0_set_hw_resources()
311 set_hw_resources.api_status.api_completion_fence_value = ++umsch->ring.fence_drv.sync_seq; in umsch_mm_v4_0_set_hw_resources()
360 add_queue.api_status.api_completion_fence_addr = umsch->ring.fence_drv.gpu_addr; in umsch_mm_v4_0_add_queue()
361 add_queue.api_status.api_completion_fence_value = ++umsch->ring.fence_drv.sync_seq; in umsch_mm_v4_0_add_queue()
392 remove_queue.api_status.api_completion_fence_addr = umsch->ring.fence_drv.gpu_addr; in umsch_mm_v4_0_remove_queue()
393 remove_queue.api_status.api_completion_fence_value = ++umsch->ring.fence_drv.sync_seq; in umsch_mm_v4_0_remove_queue()
H A Damdgpu_ring_mux.c99 last_seq = atomic_read(&e->ring->fence_drv.last_seq); in amdgpu_mux_resubmit_chunks()
109 le32_to_cpu(*(e->ring->fence_drv.cpu_addr + 2))) { in amdgpu_mux_resubmit_chunks()
474 last_seq = atomic_read(&ring->fence_drv.last_seq); in scan_and_remove_signaled_chunk()
537 chunk->sync_seq = READ_ONCE(ring->fence_drv.sync_seq); in amdgpu_ring_mux_end_ib()
570 mux->seqno_to_resubmit = ring->fence_drv.sync_seq; in amdgpu_mcbp_handle_trailing_fence_irq()
H A Damdgpu_userq.h70 struct amdgpu_userq_fence_driver *fence_drv; member
H A Damdgpu_debugfs.c1793 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_ib_preempt_fences_swap()
1796 last_seq = atomic_read(&ring->fence_drv.last_seq); in amdgpu_ib_preempt_fences_swap()
1797 sync_seq = ring->fence_drv.sync_seq; in amdgpu_ib_preempt_fences_swap()
1854 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_ib_preempt_mark_partial_job()
1908 length = ring->fence_drv.num_fences_mask + 1; in amdgpu_debugfs_ib_preempt()
1930 if (atomic_read(&ring->fence_drv.last_seq) != in amdgpu_debugfs_ib_preempt()
1931 ring->fence_drv.sync_seq) { in amdgpu_debugfs_ib_preempt()
H A Dsdma_v6_0.c1169 uint32_t seq = ring->fence_drv.sync_seq; in sdma_v6_0_ring_emit_pipeline_sync()
1170 uint64_t addr = ring->fence_drv.gpu_addr; in sdma_v6_0_ring_emit_pipeline_sync()
1659 struct amdgpu_userq_fence_driver *fence_drv = NULL; in sdma_v6_0_process_fence_irq() local
1666 fence_drv = xa_load(xa, doorbell_offset); in sdma_v6_0_process_fence_irq()
1667 if (fence_drv) in sdma_v6_0_process_fence_irq()
1668 amdgpu_userq_fence_driver_process(fence_drv); in sdma_v6_0_process_fence_irq()
H A Damdgpu_job.c124 job->base.sched->name, atomic_read(&ring->fence_drv.last_seq), in amdgpu_job_timedout()
125 ring->fence_drv.sync_seq); in amdgpu_job_timedout()
H A Dmes_v11_0.c208 seq = ++ring->fence_drv.sync_seq; in mes_v11_0_submit_pkt_and_poll_completion()
210 seq - ring->fence_drv.num_fences_mask, in mes_v11_0_submit_pkt_and_poll_completion()
226 ring->fence_drv.gpu_addr; in mes_v11_0_submit_pkt_and_poll_completion()
H A Dmes_userqueue.c307 userq_props->fence_address = queue->fence_drv->gpu_addr; in mes_userq_mqd_create()
H A Dmes_v12_0.c191 seq = ++ring->fence_drv.sync_seq; in mes_v12_0_submit_pkt_and_poll_completion()
193 seq - ring->fence_drv.num_fences_mask, in mes_v12_0_submit_pkt_and_poll_completion()
209 ring->fence_drv.gpu_addr; in mes_v12_0_submit_pkt_and_poll_completion()
H A Damdgpu_ring.h308 struct amdgpu_fence_driver fence_drv; member
H A Dgfx_v12_0.c4485 uint32_t seq = ring->fence_drv.sync_seq; in gfx_v12_0_ring_emit_pipeline_sync()
4486 uint64_t addr = ring->fence_drv.gpu_addr; in gfx_v12_0_ring_emit_pipeline_sync()
4824 struct amdgpu_userq_fence_driver *fence_drv = NULL; in gfx_v12_0_eop_irq() local
4829 fence_drv = xa_load(xa, doorbell_offset); in gfx_v12_0_eop_irq()
4830 if (fence_drv) in gfx_v12_0_eop_irq()
4831 amdgpu_userq_fence_driver_process(fence_drv); in gfx_v12_0_eop_irq()
H A Dsdma_v5_0.c1264 uint32_t seq = ring->fence_drv.sync_seq; in sdma_v5_0_ring_emit_pipeline_sync()
1265 uint64_t addr = ring->fence_drv.gpu_addr; in sdma_v5_0_ring_emit_pipeline_sync()
/linux/drivers/gpu/drm/radeon/
H A Dradeon_fence.c69 struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; in radeon_fence_write()
90 struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; in radeon_fence_read()
119 &rdev->fence_drv[ring].lockup_work, in radeon_fence_schedule_check()
145 (*fence)->seq = seq = ++rdev->fence_drv[ring].sync_seq[ring]; in radeon_fence_emit()
177 seq = atomic64_read(&fence->rdev->fence_drv[fence->ring].last_seq); in radeon_fence_check_signaled()
224 last_seq = atomic64_read(&rdev->fence_drv[ring].last_seq); in radeon_fence_activity()
226 last_emitted = rdev->fence_drv[ring].sync_seq[ring]; in radeon_fence_activity()
251 } while (atomic64_xchg(&rdev->fence_drv[ring].last_seq, seq) > seq); in radeon_fence_activity()
269 struct radeon_fence_driver *fence_drv; in radeon_fence_check_lockup() local
273 fence_drv = container_of(work, struct radeon_fence_driver, in radeon_fence_check_lockup()
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H A Duvd_v2_2.c43 uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr; in uvd_v2_2_fence_emit()
H A Devergreen_dma.c44 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in evergreen_dma_fence_ring_emit()
H A Dr600_dma.c290 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in r600_dma_fence_ring_emit()
H A Dcik_sdma.c203 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in cik_sdma_fence_ring_emit()
/linux/drivers/gpu/drm/virtio/
H A Dvirtgpu_fence.c63 struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv; in virtio_gpu_fence_alloc()
88 struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv; in virtio_gpu_fence_emit()
113 struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv; in virtio_gpu_fence_event_process()
118 atomic64_set(&vgdev->fence_drv.last_fence_id, fence_id); in virtio_gpu_fence_event_process()
H A Dvirtgpu_kms.c150 vgdev->fence_drv.context = dma_fence_context_alloc(1); in virtio_gpu_init()
151 spin_lock_init(&vgdev->fence_drv.lock); in virtio_gpu_init()
152 INIT_LIST_HEAD(&vgdev->fence_drv.fences); in virtio_gpu_init()
H A Dvirtgpu_ioctl.c172 fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context, 0); in virtio_gpu_resource_create_ioctl()
259 fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context, 0); in virtio_gpu_transfer_from_host_ioctl()
319 fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context, in virtio_gpu_transfer_to_host_ioctl()
H A Dvirtgpu_object.c113 fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context, 0); in virtio_gpu_detach_object_fenced()
H A Dvirtgpu_submit.c478 u64 fence_ctx = vgdev->fence_drv.context; in virtio_gpu_execbuffer_ioctl()
H A Dvirtgpu_plane.c372 vgdev->fence_drv.context, in virtio_gpu_plane_prepare_fb()

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