Home
last modified time | relevance | path

Searched refs:fence_drv (Results 1 – 25 of 29) sorted by relevance

12

/linux/drivers/gpu/drm/radeon/
H A Dradeon_fence.c69 struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; in radeon_fence_write()
90 struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; in radeon_fence_read()
119 &rdev->fence_drv[ring].lockup_work, in radeon_fence_schedule_check()
145 (*fence)->seq = seq = ++rdev->fence_drv[ring].sync_seq[ring]; in radeon_fence_emit()
177 seq = atomic64_read(&fence->rdev->fence_drv[fence->ring].last_seq); in radeon_fence_check_signaled()
224 last_seq = atomic64_read(&rdev->fence_drv[ring].last_seq); in radeon_fence_activity()
226 last_emitted = rdev->fence_drv[ring].sync_seq[ring]; in radeon_fence_activity()
251 } while (atomic64_xchg(&rdev->fence_drv[ring].last_seq, seq) > seq); in radeon_fence_activity()
269 struct radeon_fence_driver *fence_drv; in radeon_fence_check_lockup() local
273 fence_drv = container_of(work, struct radeon_fence_driver, in radeon_fence_check_lockup()
[all …]
H A Duvd_v2_2.c43 uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr; in uvd_v2_2_fence_emit()
H A Devergreen_dma.c44 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in evergreen_dma_fence_ring_emit()
H A Dr600_dma.c290 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in r600_dma_fence_ring_emit()
H A Dcik_sdma.c203 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in cik_sdma_fence_ring_emit()
H A Dr300.c240 radeon_ring_write(ring, PACKET0(rdev->fence_drv[fence->ring].scratch_reg, 0)); in r300_fence_ring_emit()
H A Dni.c1380 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in cayman_fence_ring_emit()
H A Dr600.c2878 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in r600_fence_ring_emit()
2907 …radeon_ring_write(ring, ((rdev->fence_drv[fence->ring].scratch_reg - PACKET3_SET_CONFIG_REG_OFFSET… in r600_fence_ring_emit()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_userq_fence.h41 struct amdgpu_userq_fence_driver *fence_drv; member
61 void amdgpu_userq_fence_driver_get(struct amdgpu_userq_fence_driver *fence_drv);
62 void amdgpu_userq_fence_driver_put(struct amdgpu_userq_fence_driver *fence_drv);
66 int amdgpu_userq_fence_driver_process(struct amdgpu_userq_fence_driver *fence_drv);
H A Dumsch_mm_v4_0.c310 set_hw_resources.api_status.api_completion_fence_addr = umsch->ring.fence_drv.gpu_addr; in umsch_mm_v4_0_set_hw_resources()
311 set_hw_resources.api_status.api_completion_fence_value = ++umsch->ring.fence_drv.sync_seq; in umsch_mm_v4_0_set_hw_resources()
360 add_queue.api_status.api_completion_fence_addr = umsch->ring.fence_drv.gpu_addr; in umsch_mm_v4_0_add_queue()
361 add_queue.api_status.api_completion_fence_value = ++umsch->ring.fence_drv.sync_seq; in umsch_mm_v4_0_add_queue()
392 remove_queue.api_status.api_completion_fence_addr = umsch->ring.fence_drv.gpu_addr; in umsch_mm_v4_0_remove_queue()
393 remove_queue.api_status.api_completion_fence_value = ++umsch->ring.fence_drv.sync_seq; in umsch_mm_v4_0_remove_queue()
H A Damdgpu_ring_mux.c99 last_seq = atomic_read(&e->ring->fence_drv.last_seq); in amdgpu_mux_resubmit_chunks()
109 le32_to_cpu(*(e->ring->fence_drv.cpu_addr + 2))) { in amdgpu_mux_resubmit_chunks()
474 last_seq = atomic_read(&ring->fence_drv.last_seq); in scan_and_remove_signaled_chunk()
537 chunk->sync_seq = READ_ONCE(ring->fence_drv.sync_seq); in amdgpu_ring_mux_end_ib()
570 mux->seqno_to_resubmit = ring->fence_drv.sync_seq; in amdgpu_mcbp_handle_trailing_fence_irq()
H A Damdgpu_dev_coredump.c599 if (atomic_read(&ring->fence_drv.last_seq) == ring->fence_drv.sync_seq && in amdgpu_coredump()
615 if (atomic_read(&ring->fence_drv.last_seq) == ring->fence_drv.sync_seq && in amdgpu_coredump()
H A Dmes_v11_0.c217 seq = ++ring->fence_drv.sync_seq; in mes_v11_0_submit_pkt_and_poll_completion()
219 seq - ring->fence_drv.num_fences_mask, in mes_v11_0_submit_pkt_and_poll_completion()
235 ring->fence_drv.gpu_addr; in mes_v11_0_submit_pkt_and_poll_completion()
880 mes->ring[0].fence_drv.gpu_addr; in mes_v11_0_query_ctx_array_sizes()
882 ++mes->ring[0].fence_drv.sync_seq; in mes_v11_0_query_ctx_array_sizes()
H A Dmes_v12_1.c197 seq = ++ring->fence_drv.sync_seq; in mes_v12_1_submit_pkt_and_poll_completion()
199 seq - ring->fence_drv.num_fences_mask, in mes_v12_1_submit_pkt_and_poll_completion()
215 ring->fence_drv.gpu_addr; in mes_v12_1_submit_pkt_and_poll_completion()
H A Dmes_v12_0.c194 seq = ++ring->fence_drv.sync_seq; in mes_v12_0_submit_pkt_and_poll_completion()
196 seq - ring->fence_drv.num_fences_mask, in mes_v12_0_submit_pkt_and_poll_completion()
212 ring->fence_drv.gpu_addr; in mes_v12_0_submit_pkt_and_poll_completion()
H A Dsdma_v7_0.c1171 uint32_t seq = ring->fence_drv.sync_seq; in sdma_v7_0_ring_emit_pipeline_sync()
1172 uint64_t addr = ring->fence_drv.gpu_addr; in sdma_v7_0_ring_emit_pipeline_sync()
H A Dsdma_v7_1.c1177 uint32_t seq = ring->fence_drv.sync_seq; in sdma_v7_1_ring_emit_pipeline_sync()
1178 uint64_t addr = ring->fence_drv.gpu_addr; in sdma_v7_1_ring_emit_pipeline_sync()
H A Dsdma_v6_0.c1152 uint32_t seq = ring->fence_drv.sync_seq; in sdma_v6_0_ring_emit_pipeline_sync()
1153 uint64_t addr = ring->fence_drv.gpu_addr; in sdma_v6_0_ring_emit_pipeline_sync()
H A Dsdma_v5_0.c1263 uint32_t seq = ring->fence_drv.sync_seq; in sdma_v5_0_ring_emit_pipeline_sync()
1264 uint64_t addr = ring->fence_drv.gpu_addr; in sdma_v5_0_ring_emit_pipeline_sync()
H A Dsdma_v5_2.c1163 uint32_t seq = ring->fence_drv.sync_seq; in sdma_v5_2_ring_emit_pipeline_sync()
1164 uint64_t addr = ring->fence_drv.gpu_addr; in sdma_v5_2_ring_emit_pipeline_sync()
H A Dsdma_v4_4_2.c1288 uint32_t seq = ring->fence_drv.sync_seq; in sdma_v4_4_2_ring_emit_pipeline_sync()
1289 uint64_t addr = ring->fence_drv.gpu_addr; in sdma_v4_4_2_ring_emit_pipeline_sync()
H A Dgfx_v9_4_3.c3022 uint32_t seq = ring->fence_drv.sync_seq; in gfx_v9_4_3_ring_emit_pipeline_sync()
3023 uint64_t addr = ring->fence_drv.gpu_addr; in gfx_v9_4_3_ring_emit_pipeline_sync()
H A Dgfx_v12_1.c3773 uint32_t seq = ring->fence_drv.sync_seq; in gfx_v12_1_ring_emit_pipeline_sync()
3774 uint64_t addr = ring->fence_drv.gpu_addr; in gfx_v12_1_ring_emit_pipeline_sync()
H A Dgfx_v12_0.c4599 uint32_t seq = ring->fence_drv.sync_seq; in gfx_v12_0_ring_emit_pipeline_sync()
4600 uint64_t addr = ring->fence_drv.gpu_addr; in gfx_v12_0_ring_emit_pipeline_sync()
/linux/drivers/gpu/drm/virtio/
H A Dvirtgpu_fence.c63 struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv; in virtio_gpu_fence_alloc()
88 struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv; in virtio_gpu_fence_emit()
113 struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv; in virtio_gpu_fence_event_process()
118 atomic64_set(&vgdev->fence_drv.last_fence_id, fence_id); in virtio_gpu_fence_event_process()

12