| /linux/arch/x86/kernel/cpu/resctrl/ |
| H A D | monitor.c | 137 static int __rmid_read_phys(u32 prmid, enum resctrl_event_id eventid, u64 *val) in __rmid_read_phys() argument
139 struct msr msr_val = { .l = eventid, .h = prmid }; in __rmid_read_phys()
163 enum resctrl_event_id eventid) in get_arch_mbm_state() argument
167 if (!resctrl_is_mbm_event(eventid)) in get_arch_mbm_state()
170 state = hw_dom->arch_mbm_states[MBM_STATE_IDX(eventid)]; in get_arch_mbm_state()
177 enum resctrl_event_id eventid) in resctrl_arch_reset_rmid() argument
184 am = get_arch_mbm_state(hw_dom, rmid, eventid); in resctrl_arch_reset_rmid()
190 __rmid_read_phys(prmid, eventid, &am->prev_msr); in resctrl_arch_reset_rmid()
201 enum resctrl_event_id eventid; in resctrl_arch_reset_rmid_all() local
204 for_each_mbm_event_id(eventid) { in resctrl_arch_reset_rmid_all()
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| /linux/drivers/perf/ |
| H A D | marvell_pem_pmu.c | 90 static int eventid_to_offset(int eventid) in eventid_to_offset() argument
92 return eventid_to_offset_table[eventid]; in eventid_to_offset()
229 struct perf_event *event, int eventid) in pem_perf_read_counter() argument
231 return readq_relaxed(pmu->base + eventid_to_offset(eventid)); in pem_perf_read_counter()
252 int eventid = hwc->idx; in pem_perf_event_start() local
259 pem_perf_read_counter(pmu, event, eventid)); in pem_perf_event_start()
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| H A D | arm-cmn.c | 773 u16 eventid; member
788 .eventid = _eventid, \
809 eattr->type, eattr->eventid); in arm_cmn_event_show()
813 eattr->type, eattr->eventid, filter[0].val, filter[1].val); in arm_cmn_event_show()
817 eattr->type, eattr->eventid, filter[0].val); in arm_cmn_event_show()
820 eattr->eventid); in arm_cmn_event_show()
831 u16 eventid; in arm_cmn_event_attr_is_visible() local
839 eventid = eattr->eventid; in arm_cmn_event_attr_is_visible()
847 unsigned int intf = (eventid >> 2) & 7; in arm_cmn_event_attr_is_visible()
848 unsigned int chan = eventid >> 5; in arm_cmn_event_attr_is_visible()
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| H A D | marvell_cn10k_ddr_pmu.c | 522 static int ddr_perf_get_event_bitmap(int eventid, u64 *event_bitmap, in ddr_perf_get_event_bitmap() argument
527 switch (eventid) { in ddr_perf_get_event_bitmap()
530 *event_bitmap = (1ULL << (eventid - 42)); in ddr_perf_get_event_bitmap()
540 if (eventid >= EVENT_PERF_OP_IS_WR32 && in ddr_perf_get_event_bitmap()
541 eventid <= EVENT_PERF_OP_IS_RD16) { in ddr_perf_get_event_bitmap()
543 *event_bitmap = (1ULL << (eventid - 1)); in ddr_perf_get_event_bitmap()
550 *event_bitmap = (1ULL << (eventid - 1)); in ddr_perf_get_event_bitmap()
560 *event_bitmap = (1ULL << (eventid - 1)); in ddr_perf_get_event_bitmap()
565 *event_bitmap = (0xFULL << (eventid - 1)); in ddr_perf_get_event_bitmap()
572 pr_err("%s Invalid eventid %d\n", __func__, eventid); in ddr_perf_get_event_bitmap()
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| H A D | dwc_pcie_pmu.c | 143 PMU_FORMAT_ATTR(eventid, "config:0-15");
162 u16 eventid; member
175 eattr->eventid, eattr->type); in dwc_pcie_event_show()
178 eattr->eventid, eattr->type); in dwc_pcie_event_show()
187 .eventid = _eventid, \
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| H A D | arm_dmc620_pmu.c | 110 u8 eventid; member
121 return sysfs_emit(page, "event=0x%x,clkdiv2=0x%x\n", eattr->eventid, eattr->clkdiv2); in dmc620_pmu_event_show()
128 .eventid = _eventid, \
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| H A D | arm-ni.c | 228 NI_FORMAT_ATTR(eventid, NI_CONFIG_EVENTID),
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| /linux/fs/resctrl/ |
| H A D | monitor.c | 1046 bool resctrl_enable_mon_event(enum resctrl_event_id eventid, bool any_cpu, in resctrl_enable_mon_event() argument
1049 if (WARN_ON_ONCE(eventid < QOS_FIRST_EVENT || eventid >= QOS_NUM_EVENTS || in resctrl_enable_mon_event()
1052 if (mon_event_all[eventid].enabled) { in resctrl_enable_mon_event()
1053 pr_warn("Duplicate enable for event %d\n", eventid); in resctrl_enable_mon_event()
1056 if (binary_bits && !mon_event_all[eventid].is_floating_point) { in resctrl_enable_mon_event()
1057 pr_warn("Event %d may not be floating point\n", eventid); in resctrl_enable_mon_event()
1061 mon_event_all[eventid].any_cpu = any_cpu; in resctrl_enable_mon_event()
1062 mon_event_all[eventid].binary_bits = binary_bits; in resctrl_enable_mon_event()
1063 mon_event_all[eventid].arch_priv = arch_priv; in resctrl_enable_mon_event()
1064 mon_event_all[eventid].enabled = true; in resctrl_enable_mon_event()
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| H A D | rdtgroup.c | 4626 enum resctrl_event_id eventid; in domain_setup_l3_mon_state() local
4635 for_each_mbm_event_id(eventid) { in domain_setup_l3_mon_state()
4636 if (!resctrl_is_mon_event_enabled(eventid)) in domain_setup_l3_mon_state()
4638 idx = MBM_STATE_IDX(eventid); in domain_setup_l3_mon_state()
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| /linux/Documentation/admin-guide/perf/ |
| H A D | arm-cmn.rst | 26 definitions - "type" selects the respective node type, and "eventid" the
35 node ("type" == 0x3, "eventid" is ignored).
37 * XP events also encode the port and channel in the "eventid" field, to
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| H A D | arm-ni.rst | 13 domain. These require qualifying with the "eventid" and "nodeid" parameters
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| H A D | dwc_pcie_pmu.rst | 63 "rx_pcie_tlp_data_payload" is an equivalent of "eventid=0x21,type=0x0".
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| /linux/drivers/irqchip/ |
| H A D | irq-gic-v5-its.c | 884 unsigned int nr_irqs, u32 *eventid) in gicv5_its_alloc_eventid() argument
917 *eventid = event_id_base; in gicv5_its_alloc_eventid()
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