Searched refs:eqc (Results 1 – 7 of 7) sorted by relevance
| /linux/arch/s390/include/asm/ |
| H A D | eadm.h | 31 u8 eqc; member
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| /linux/drivers/net/ethernet/mellanox/mlx5/core/ |
| H A D | debugfs.c | 408 param = 1 << MLX5_GET(eqc, ctx, log_eq_size); in eq_read_field() 411 param = MLX5_GET(eqc, ctx, intr); in eq_read_field() 414 param = MLX5_GET(eqc, ctx, log_page_size) + 12; in eq_read_field()
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| /linux/drivers/infiniband/hw/hns/ |
| H A D | hns_roce_hw_v2.c | 6650 struct hns_roce_eq_context *eqc; in config_eqc() local 6654 eqc = mb_buf; in config_eqc() 6655 memset(eqc, 0, sizeof(struct hns_roce_eq_context)); in config_eqc() 6669 hr_reg_write(eqc, EQC_EQ_ST, HNS_ROCE_V2_EQ_STATE_VALID); in config_eqc() 6670 hr_reg_write(eqc, EQC_EQE_HOP_NUM, eq->hop_num); in config_eqc() 6671 hr_reg_write(eqc, EQC_OVER_IGNORE, eq->over_ignore); in config_eqc() 6672 hr_reg_write(eqc, EQC_COALESCE, eq->coalesce); in config_eqc() 6673 hr_reg_write(eqc, EQC_ARM_ST, eq->arm_st); in config_eqc() 6674 hr_reg_write(eqc, EQC_EQN, eq->eqn); in config_eqc() 6675 hr_reg_write(eqc, EQC_EQE_CNT, HNS_ROCE_EQ_INIT_EQE_CNT); in config_eqc() [all …]
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| /linux/arch/mips/include/asm/octeon/ |
| H A D | cvmx-pciercx-defs.h | 258 __BITFIELD_FIELD(uint32_t eqc:1,
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| /linux/include/linux/ |
| H A D | hisi_acc_qm.h | 353 struct qm_eqc *eqc; member
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| /linux/drivers/crypto/hisilicon/ |
| H A D | qm.c | 694 tmp_xqc = qm->xqc_buf.eqc; in qm_set_and_get_xqc() 3206 struct qm_eqc eqc = {0}; in qm_eq_ctx_cfg() local 3208 eqc.base_l = cpu_to_le32(lower_32_bits(qm->eqe_dma)); in qm_eq_ctx_cfg() 3209 eqc.base_h = cpu_to_le32(upper_32_bits(qm->eqe_dma)); in qm_eq_ctx_cfg() 3211 eqc.dw3 = cpu_to_le32(QM_EQE_AEQE_SIZE); in qm_eq_ctx_cfg() 3212 eqc.dw6 = cpu_to_le32(((u32)qm->eq_depth - 1) | (1 << QM_EQC_PHASE_SHIFT)); in qm_eq_ctx_cfg() 3214 return qm_set_and_get_xqc(qm, QM_MB_CMD_EQC, &eqc, 0, 0); in qm_eq_ctx_cfg() 5662 QM_XQC_BUF_INIT(xqc_buf, eqc); in hisi_qm_alloc_rsv_buf()
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| /linux/drivers/net/ethernet/mellanox/mlx4/ |
| H A D | resource_tracker.c | 3061 static int eq_get_mtt_addr(struct mlx4_eq_context *eqc) in eq_get_mtt_addr() argument 3063 return be32_to_cpu(eqc->mtt_base_addr_l) & 0xfffffff8; in eq_get_mtt_addr() 3066 static int eq_get_mtt_size(struct mlx4_eq_context *eqc) in eq_get_mtt_size() argument 3068 int log_eq_size = eqc->log_eq_size & 0x1f; in eq_get_mtt_size() 3069 int page_shift = (eqc->log_page_size & 0x3f) + 12; in eq_get_mtt_size() 3102 struct mlx4_eq_context *eqc = inbox->buf; in mlx4_SW2HW_EQ_wrapper() local 3103 int mtt_base = eq_get_mtt_addr(eqc) / dev->caps.mtt_entry_sz; in mlx4_SW2HW_EQ_wrapper() 3104 int mtt_size = eq_get_mtt_size(eqc); in mlx4_SW2HW_EQ_wrapper()
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