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/linux/Documentation/devicetree/bindings/fsi/
H A Dfsi.txt5 engines within those slaves. However, we have a facility to match devicetree
6 nodes to probed engines. This allows for fsi engines to expose non-probeable
16 represent the FSI slaves and their slave engines. As a basic outline:
41 adding subordinate device tree nodes as children of FSI engines.
79 Each slave provides an address-space, under which the engines are accessible.
91 FSI engines (devices)
116 additional engines, but they don't necessarily need to be describe in the
/linux/drivers/gpu/drm/i915/gt/uc/
H A Dselftest_guc_multi_lrc.c13 static void logical_sort(struct intel_engine_cs **engines, int num_engines) in logical_sort() argument
20 if (engines[j]->logical_mask & BIT(i)) { in logical_sort()
21 sorted[i] = engines[j]; in logical_sort()
26 memcpy(*engines, *sorted, in logical_sort()
/linux/Documentation/netlabel/
H A Dintroduction.rst15 is composed of three main components, the protocol engines, the communication
21 The protocol engines are responsible for both applying and retrieving the
25 refrain from calling the protocol engines directly, instead they should use
45 independent interface to the underlying NetLabel protocol engines. In addition
/linux/drivers/crypto/marvell/cesa/
H A Dcesa.c377 struct mv_cesa_engine *engine = &cesa->engines[idx]; in mv_cesa_get_sram()
409 struct mv_cesa_engine *engine = &cesa->engines[idx]; in mv_cesa_put_sram()
425 struct mv_cesa_engine *engines; in mv_cesa_probe() local
454 cesa->engines = devm_kcalloc(dev, caps->nengines, sizeof(*engines), in mv_cesa_probe()
456 if (!cesa->engines) in mv_cesa_probe()
474 struct mv_cesa_engine *engine = &cesa->engines[i]; in mv_cesa_probe()
/linux/Documentation/misc-devices/
H A Dmrvl_cn10k_dpi.rst12 mailbox logic, and a set of DMA engines & DMA command queues.
20 the DMA engines and VF device's DMA command queues. Also, driver creates
38 a pem port to which DMA engines are wired.
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-hsi8 engines (APE) with cellular modem engines (CMT) in cellular
H A Dsysfs-bus-fsi26 that control access to the internally connected engines. In
/linux/drivers/gpu/drm/nouveau/nvif/
H A Dfifo.c64 device->runlist[i].engines = a->v.runlist[i].data; in nvif_fifo_runlists()
82 if (device->runlist[i].engines & engine) in nvif_fifo_runlist()
/linux/include/uapi/drm/
H A Di915_drm.h2328 struct i915_engine_class_instance engines[]; member
2337 struct i915_engine_class_instance engines[N__]; \
2366 struct i915_engine_class_instance engines[]; member
2376 struct i915_engine_class_instance engines[N__]; \
2493 struct i915_engine_class_instance engines[]; member
2505 struct i915_engine_class_instance engines[N__]; \
2568 struct i915_engine_class_instance engines[]; member
2573 struct i915_engine_class_instance engines[N__]; \
3384 struct drm_i915_engine_info engines[]; member
/linux/tools/include/uapi/drm/
H A Di915_drm.h2328 struct i915_engine_class_instance engines[]; member
2337 struct i915_engine_class_instance engines[N__]; \
2366 struct i915_engine_class_instance engines[]; member
2376 struct i915_engine_class_instance engines[N__]; \
2493 struct i915_engine_class_instance engines[]; member
2505 struct i915_engine_class_instance engines[N__]; \
2568 struct i915_engine_class_instance engines[]; member
2573 struct i915_engine_class_instance engines[N__]; \
3384 struct drm_i915_engine_info engines[]; member
/linux/drivers/gpu/drm/i915/
H A DKconfig.profile45 The driver sends a periodic heartbeat down all active engines to
70 certain platforms and certain engines which will be reflected in the
74 int "Preempt timeout for compute engines (ms, jiffy granularity)"
89 certain platforms and certain engines which will be reflected in the
/linux/drivers/dma/idxd/
H A Ddevice.c689 engine = idxd->engines[i]; in idxd_engines_clear_state()
879 iowrite64(group->grpcfg.engines, idxd->reg_base + grpcfg_offset); in idxd_group_config_write()
1057 int i, engines = 0; in idxd_engines_setup() local
1063 group->grpcfg.engines = 0; in idxd_engines_setup()
1067 eng = idxd->engines[i]; in idxd_engines_setup()
1073 group->grpcfg.engines |= BIT(eng->id); in idxd_engines_setup()
1074 engines++; in idxd_engines_setup()
1077 if (!engines) in idxd_engines_setup()
1217 group->grpcfg.engines = ioread64(idxd->reg_base + grpcfg_offset); in idxd_group_load_config()
1219 grpcfg_offset, group->grpcfg.engines); in idxd_group_load_config()
[all …]
H A Dinit.c277 engine = idxd->engines[i]; in idxd_clean_engines()
282 kfree(idxd->engines); in idxd_clean_engines()
292 idxd->engines = kcalloc_node(idxd->max_engines, sizeof(struct idxd_engine *), in idxd_setup_engines()
294 if (!idxd->engines) in idxd_setup_engines()
319 idxd->engines[i] = engine; in idxd_setup_engines()
326 engine = idxd->engines[i]; in idxd_setup_engines()
331 kfree(idxd->engines); in idxd_setup_engines()
894 memcpy(saved_engine, idxd->engines[i], sizeof(*saved_engine)); in idxd_device_config_save()
987 engine = idxd->engines[i]; in idxd_device_config_restore()
H A Ddefaults.c44 engine = idxd->engines[0]; in idxd_load_iaa_device_defaults()
H A Dsysfs.c314 struct idxd_engine *engine = idxd->engines[i]; in group_engines_show()
332 __ATTR(engines, 0444, group_engines_show, NULL);
1818 kfree(idxd->engines); in idxd_conf_device_release()
1844 engine = idxd->engines[i]; in idxd_register_engine_devices()
1855 engine = idxd->engines[i]; in idxd_register_engine_devices()
1860 engine = idxd->engines[j]; in idxd_register_engine_devices()
1953 device_unregister(engine_confdev(idxd->engines[i])); in idxd_register_devices()
1973 struct idxd_engine *engine = idxd->engines[i]; in idxd_unregister_devices()
/linux/Documentation/devicetree/bindings/powerpc/4xx/
H A Dppc440spe-adma.txt5 for DMA engines and Memory Queue Module node. The latter is used
40 for both DMA engines>.
/linux/drivers/gpu/drm/nouveau/include/nvif/
H A Ddevice.h14 u64 engines; member
/linux/Documentation/arch/powerpc/
H A Dvas-api.rst14 unit comprises of one or more hardware engines or co-processor types
62 access to all GZIP engines in the system. The only valid operations on
79 engines (typically, one per P9 chip) there is just one
130 "Discovery of available VAS engines" section below.
168 that the application can use to copy/paste its CRB to the hardware engines.
190 Discovery of available VAS engines
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_gt_engines_debugfs.c27 DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(engines);
/linux/Documentation/gpu/rfc/
H A Di915_scheduler.rst43 * Features like timeslicing / preemption / virtual engines would
104 * Export engines logical mapping
109 Export engines logical mapping
116 engines in logical order which is a new requirement compared to execlists.
/linux/drivers/hsi/
H A DKconfig10 application engines and cellular modems.
/linux/drivers/pmdomain/sunxi/
H A DKconfig33 video engines.
/linux/drivers/gpu/drm/omapdrm/
H A Domap_dmm_priv.h167 struct refill_engine *engines; member
/linux/drivers/gpu/drm/xe/
H A Dxe_gt_idle.c203 u64 engines; in xe_gt_idle_pg_print() member
256 if (gt->info.engine_mask & media_slices[n].engines) in xe_gt_idle_pg_print()
/linux/Documentation/driver-api/
H A Ddma-buf.rst251 that userspace uses for synchronization across engines or with the CPU, which
330 compute side, like compute units or command submission engines. If both a 3D
348 achieved through e.g. through dedicated engines and minimal compute unit
372 Note that workloads that run on independent hardware like copy engines or other
375 engines to clear or copy memory needed to resolve the page fault.

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