Home
last modified time | relevance | path

Searched refs:encode_pcie_lane_width (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dpppcielanes.h27 extern uint8_t encode_pcie_lane_width(uint32_t num_lanes);
H A Dpppcielanes.c56 uint8_t encode_pcie_lane_width(uint32_t num_lanes) in encode_pcie_lane_width() function
H A Dvega10_hwmgr.c1281 pcie_table->pcie_lane[i] = (uint8_t)encode_pcie_lane_width( in vega10_setup_default_pcie_table()
1284 pcie_table->pcie_lane[i] = (uint8_t)encode_pcie_lane_width( in vega10_setup_default_pcie_table()
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dvegam_smumgr.c582 table->LinkLevel[i].PcieLaneCount = (uint8_t)encode_pcie_lane_width( in vegam_populate_smc_link_level()
H A Dfiji_smumgr.c839 table->LinkLevel[i].PcieLaneCount = (uint8_t)encode_pcie_lane_width( in fiji_populate_smc_link_level()
H A Diceland_smumgr.c776 (uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in iceland_populate_smc_link_level()
H A Dpolaris10_smumgr.c828 table->LinkLevel[i].PcieLaneCount = (uint8_t)encode_pcie_lane_width( in polaris10_populate_smc_link_level()
H A Dci_smumgr.c1009 (uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in ci_populate_smc_link_level()
H A Dtonga_smumgr.c519 (uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in tonga_populate_smc_link_level()