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Searched refs:enable_val (Results 1 – 25 of 28) sorted by relevance

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/linux/drivers/phy/samsung/
H A Dphy-exynos-mipi-video.c45 u32 enable_val; member
62 .enable_val = EXYNOS4_PHY_ENABLE,
71 .enable_val = EXYNOS4_PHY_ENABLE,
80 .enable_val = EXYNOS4_PHY_ENABLE,
89 .enable_val = EXYNOS4_PHY_ENABLE,
107 .enable_val = EXYNOS4_PHY_ENABLE,
116 .enable_val = EXYNOS4_PHY_ENABLE,
125 .enable_val = EXYNOS4_PHY_ENABLE,
134 .enable_val = EXYNOS4_PHY_ENABLE,
143 .enable_val = EXYNOS4_PHY_ENABLE,
[all …]
/linux/drivers/clocksource/
H A Djcore-pit.c36 u32 enable_val; member
72 writel(pit->enable_val, pit->base + REG_PITEN); in jcore_pit_set()
138 u32 irqprio, enable_val; in jcore_pit_init() local
210 enable_val = (1U << PIT_ENABLE_SHIFT) in jcore_pit_init()
235 pit->enable_val = enable_val; in jcore_pit_init()
/linux/drivers/clk/
H A Dclk-gate_test.c165 u32 enable_val = BIT(5); in clk_gate_test_enable() local
169 KUNIT_EXPECT_EQ(test, enable_val, le32_to_cpu(ctx->fake_reg)); in clk_gate_test_enable()
182 u32 enable_val = BIT(5); in clk_gate_test_disable() local
186 KUNIT_ASSERT_EQ(test, enable_val, le32_to_cpu(ctx->fake_reg)); in clk_gate_test_disable()
245 u32 enable_val = 0; in clk_gate_test_invert_enable() local
249 KUNIT_EXPECT_EQ(test, enable_val, le32_to_cpu(ctx->fake_reg)); in clk_gate_test_invert_enable()
262 u32 enable_val = 0; in clk_gate_test_invert_disable() local
266 KUNIT_ASSERT_EQ(test, enable_val, le32_to_cpu(ctx->fake_reg)); in clk_gate_test_invert_disable()
318 u32 enable_val = BIT(9) | BIT(9 + 16); in clk_gate_test_hiword_enable() local
322 KUNIT_EXPECT_EQ(test, enable_val, le32_to_cpu(ctx->fake_reg)); in clk_gate_test_hiword_enable()
[all …]
/linux/drivers/leds/
H A Dleds-lm36274.c54 int enable_val = 0; in lm36274_init() local
58 enable_val |= (1 << chip->led_sources[i]); in lm36274_init()
60 if (!enable_val) { in lm36274_init()
65 enable_val |= LM36274_BL_EN; in lm36274_init()
67 return regmap_write(chip->regmap, LM36274_REG_BL_EN, enable_val); in lm36274_init()
/linux/drivers/regulator/
H A Dstpmic1_regulator.c211 .enable_val = 1, \
231 .enable_val = 1, \
253 .enable_val = 1, \
273 .enable_val = 1, \
294 .enable_val = 1, \
311 .enable_val = BOOST_ENABLED, \
328 .enable_val = USBSW_OTG_SWITCH_ENABLED, \
348 .enable_val = SWIN_SWOUT_ENABLED, \
H A Dhelpers.c40 if (rdev->desc->enable_val) in regulator_is_enabled_regmap()
41 return val != rdev->desc->enable_val; in regulator_is_enabled_regmap()
44 if (rdev->desc->enable_val) in regulator_is_enabled_regmap()
45 return val == rdev->desc->enable_val; in regulator_is_enabled_regmap()
67 val = rdev->desc->enable_val; in regulator_enable_regmap()
91 val = rdev->desc->enable_val; in regulator_disable_regmap()
H A Dcpcap-regulator.c114 .enable_val = (mode_val), \
170 if (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC) { in cpcap_regulator_enable()
190 if (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC) { in cpcap_regulator_disable()
198 if (error && (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC)) { in cpcap_regulator_disable()
H A Dbd9576-regulator.c610 .enable_val = BD957X_REGULATOR_DIS_VAL,
633 .enable_val = BD957X_REGULATOR_DIS_VAL,
655 .enable_val = BD957X_REGULATOR_DIS_VAL,
678 .enable_val = BD957X_REGULATOR_DIS_VAL,
701 .enable_val = BD957X_REGULATOR_DIS_VAL,
722 .enable_val = BD957X_REGULATOR_DIS_VAL,
H A Dmax77693-regulator.c177 .enable_val = CHG_CNFG_00_CHG_MASK | CHG_CNFG_00_BUCK_MASK,
217 .enable_val = MAX77843_CHG_MASK,
H A Dpca9450-regulator.c689 .enable_val = BUCK_ENMODE_ONREQ,
718 .enable_val = BUCK_ENMODE_ONREQ_STBYREQ,
747 .enable_val = BUCK_ENMODE_ONREQ,
766 .enable_val = BUCK_ENMODE_ONREQ,
785 .enable_val = BUCK_ENMODE_ONREQ,
H A Dpf8x00-regulator.c396 .enable_val = 0x2, \
429 .enable_val = 0x3, \
461 .enable_val = 0x3, \
H A Dstw481x-vmmc.c50 .enable_val = STW_CONF1_PDN_VMMC,
H A Dtps6105x-regulator.c51 .enable_val = TPS6105X_REG0_MODE_VOLTAGE <<
H A Ds5m8767.c917 int enable_reg, enable_val; in s5m8767_pmic_probe() local
938 &enable_val); in s5m8767_pmic_probe()
945 regulators[id].enable_val = enable_val; in s5m8767_pmic_probe()
H A Dqcom-refgen-regulator.c80 .enable_val = REFGEN_PWRDWN_CTRL5_ENABLE,
H A Dlp87565-regulator.c43 .enable_val = _ev, \
H A Dpbias-regulator.c209 desc->enable_val = info->enable; in pbias_regulator_probe()
H A Dsc2731-regulator.c142 .enable_val = 0, \
H A Dmax20086-regulator.c85 .enable_val = 1 << ((n) - 1), \
H A Dqcom-labibb-regulator.c694 .enable_val = LABIBB_CONTROL_ENABLE,
721 .enable_val = LABIBB_CONTROL_ENABLE,
H A Dmp8859.c315 .enable_val = MP8859_ENABLE_MASK,
H A Dpfuze100-regulator.c344 .enable_val = 0x8, \
816 desc->enable_val = 0x8; in pfuze100_regulator_probe()
H A Dpalmas-regulator.c475 pmic->desc[id].enable_val = pmic->current_reg_mode[id]; in palmas_set_mode_smps()
1258 desc->enable_val = SMPS_CTRL_MODE_ON; in palmas_smps_registration()
1363 desc->enable_val = SMPS_CTRL_MODE_ON; in tps65917_smps_registration()
H A Dtps65090-regulator.c194 .enable_val = _en_bits, \
/linux/drivers/video/backlight/
H A Dmt6370-backlight.c77 unsigned int enable_val; in mt6370_bl_update_status() local
93 enable_val = brightness ? MT6370_BL_EN_MASK : 0; in mt6370_bl_update_status()
95 MT6370_BL_EN_MASK, enable_val); in mt6370_bl_update_status()

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