1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * HWMON driver for ASUS motherboards that publish some sensor values
4 * via the embedded controller registers.
5 *
6 * Copyright (C) 2021 Eugene Shalygin <eugene.shalygin@gmail.com>
7
8 * EC provides:
9 * - Chipset temperature
10 * - CPU temperature
11 * - Motherboard temperature
12 * - T_Sensor temperature
13 * - VRM temperature
14 * - Water In temperature
15 * - Water Out temperature
16 * - CPU Optional fan RPM
17 * - Chipset fan RPM
18 * - VRM Heat Sink fan RPM
19 * - Water Flow fan RPM
20 * - CPU current
21 * - CPU core voltage
22 */
23
24 #include <linux/acpi.h>
25 #include <linux/bitops.h>
26 #include <linux/dev_printk.h>
27 #include <linux/dmi.h>
28 #include <linux/hwmon.h>
29 #include <linux/init.h>
30 #include <linux/jiffies.h>
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/platform_device.h>
34 #include <linux/sort.h>
35 #include <linux/units.h>
36
37 #include <linux/unaligned.h>
38
39 static char *mutex_path_override;
40
41 /* Writing to this EC register switches EC bank */
42 #define ASUS_EC_BANK_REGISTER 0xff
43 #define SENSOR_LABEL_LEN 16
44
45 /*
46 * Arbitrary set max. allowed bank number. Required for sorting banks and
47 * currently is overkill with just 2 banks used at max, but for the sake
48 * of alignment let's set it to a higher value.
49 */
50 #define ASUS_EC_MAX_BANK 3
51
52 #define ACPI_LOCK_DELAY_MS 800
53
54 /* ACPI mutex for locking access to the EC for the firmware */
55 #define ASUS_HW_ACCESS_MUTEX_ASMX "\\AMW0.ASMX"
56
57 #define ASUS_HW_ACCESS_MUTEX_RMTW_ASMX "\\RMTW.ASMX"
58
59 #define ASUS_HW_ACCESS_MUTEX_SB_PC00_LPCB_SIO1_MUT0 "\\_SB.PC00.LPCB.SIO1.MUT0"
60
61 #define ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0 "\\_SB_.PCI0.SBRG.SIO1.MUT0"
62
63 #define ASUS_HW_ACCESS_MUTEX_SB_PCI0_LPCB_SIO1_MUT0 "\\_SB_.PCI0.LPCB.SIO1.MUT0"
64
65 #define MAX_IDENTICAL_BOARD_VARIATIONS 3
66
67 /* Moniker for the ACPI global lock (':' is not allowed in ASL identifiers) */
68 #define ACPI_GLOBAL_LOCK_PSEUDO_PATH ":GLOBAL_LOCK"
69
70 typedef union {
71 u32 value;
72 struct {
73 u8 index;
74 u8 bank;
75 u8 size;
76 u8 dummy;
77 } components;
78 } sensor_address;
79
80 #define MAKE_SENSOR_ADDRESS(size, bank, index) { \
81 .value = (size << 16) + (bank << 8) + index \
82 }
83
84 static u32 hwmon_attributes[hwmon_max] = {
85 [hwmon_chip] = HWMON_C_REGISTER_TZ,
86 [hwmon_temp] = HWMON_T_INPUT | HWMON_T_LABEL,
87 [hwmon_in] = HWMON_I_INPUT | HWMON_I_LABEL,
88 [hwmon_curr] = HWMON_C_INPUT | HWMON_C_LABEL,
89 [hwmon_fan] = HWMON_F_INPUT | HWMON_F_LABEL,
90 };
91
92 struct ec_sensor_info {
93 char label[SENSOR_LABEL_LEN];
94 enum hwmon_sensor_types type;
95 sensor_address addr;
96 };
97
98 #define EC_SENSOR(sensor_label, sensor_type, size, bank, index) { \
99 .label = sensor_label, .type = sensor_type, \
100 .addr = MAKE_SENSOR_ADDRESS(size, bank, index), \
101 }
102
103 enum ec_sensors {
104 /* chipset temperature [℃] */
105 ec_sensor_temp_chipset,
106 /* CPU temperature [℃] */
107 ec_sensor_temp_cpu,
108 /* CPU package temperature [℃] */
109 ec_sensor_temp_cpu_package,
110 /* motherboard temperature [℃] */
111 ec_sensor_temp_mb,
112 /* "T_Sensor" temperature sensor reading [℃] */
113 ec_sensor_temp_t_sensor,
114 /* like ec_sensor_temp_t_sensor, but at an alternate address [℃] */
115 ec_sensor_temp_t_sensor_alt1,
116 /* VRM temperature [℃] */
117 ec_sensor_temp_vrm,
118 /* VRM east (right) temperature [℃] */
119 ec_sensor_temp_vrme,
120 /* VRM west (left) temperature [℃] */
121 ec_sensor_temp_vrmw,
122 /* CPU Core voltage [mV] */
123 ec_sensor_in_cpu_core,
124 /* CPU_Opt fan [RPM] */
125 ec_sensor_fan_cpu_opt,
126 /* VRM heat sink fan [RPM] */
127 ec_sensor_fan_vrm_hs,
128 /* VRM east (right) heat sink fan [RPM] */
129 ec_sensor_fan_vrme_hs,
130 /* VRM west (left) heat sink fan [RPM] */
131 ec_sensor_fan_vrmw_hs,
132 /* Chipset fan [RPM] */
133 ec_sensor_fan_chipset,
134 /* Water flow sensor reading [RPM] */
135 ec_sensor_fan_water_flow,
136 /* USB4 fan [RPM] */
137 ec_sensor_fan_usb4,
138 /* M.2 fan [RPM] */
139 ec_sensor_fan_m2,
140 /* CPU current [A] */
141 ec_sensor_curr_cpu,
142 /* "Water_In" temperature sensor reading [℃] */
143 ec_sensor_temp_water_in,
144 /* "Water_Out" temperature sensor reading [℃] */
145 ec_sensor_temp_water_out,
146 /* "Water_Block_In" temperature sensor reading [℃] */
147 ec_sensor_temp_water_block_in,
148 /* "Water_Block_Out" temperature sensor reading [℃] */
149 ec_sensor_temp_water_block_out,
150 /* "T_sensor_2" temperature sensor reading [℃] */
151 ec_sensor_temp_t_sensor_2,
152 /* "Extra_1" temperature sensor reading [℃] */
153 ec_sensor_temp_sensor_extra_1,
154 /* "Extra_2" temperature sensor reading [℃] */
155 ec_sensor_temp_sensor_extra_2,
156 /* "Extra_3" temperature sensor reading [℃] */
157 ec_sensor_temp_sensor_extra_3,
158 };
159
160 #define SENSOR_TEMP_CHIPSET BIT(ec_sensor_temp_chipset)
161 #define SENSOR_TEMP_CPU BIT(ec_sensor_temp_cpu)
162 #define SENSOR_TEMP_CPU_PACKAGE BIT(ec_sensor_temp_cpu_package)
163 #define SENSOR_TEMP_MB BIT(ec_sensor_temp_mb)
164 #define SENSOR_TEMP_T_SENSOR BIT(ec_sensor_temp_t_sensor)
165 #define SENSOR_TEMP_T_SENSOR_ALT1 BIT(ec_sensor_temp_t_sensor_alt1)
166 #define SENSOR_TEMP_VRM BIT(ec_sensor_temp_vrm)
167 #define SENSOR_TEMP_VRME BIT(ec_sensor_temp_vrme)
168 #define SENSOR_TEMP_VRMW BIT(ec_sensor_temp_vrmw)
169 #define SENSOR_IN_CPU_CORE BIT(ec_sensor_in_cpu_core)
170 #define SENSOR_FAN_CPU_OPT BIT(ec_sensor_fan_cpu_opt)
171 #define SENSOR_FAN_VRM_HS BIT(ec_sensor_fan_vrm_hs)
172 #define SENSOR_FAN_VRME_HS BIT(ec_sensor_fan_vrme_hs)
173 #define SENSOR_FAN_VRMW_HS BIT(ec_sensor_fan_vrmw_hs)
174 #define SENSOR_FAN_CHIPSET BIT(ec_sensor_fan_chipset)
175 #define SENSOR_FAN_WATER_FLOW BIT(ec_sensor_fan_water_flow)
176 #define SENSOR_FAN_USB4 BIT(ec_sensor_fan_usb4)
177 #define SENSOR_FAN_M2 BIT(ec_sensor_fan_m2)
178 #define SENSOR_CURR_CPU BIT(ec_sensor_curr_cpu)
179 #define SENSOR_TEMP_WATER_IN BIT(ec_sensor_temp_water_in)
180 #define SENSOR_TEMP_WATER_OUT BIT(ec_sensor_temp_water_out)
181 #define SENSOR_TEMP_WATER_BLOCK_IN BIT(ec_sensor_temp_water_block_in)
182 #define SENSOR_TEMP_WATER_BLOCK_OUT BIT(ec_sensor_temp_water_block_out)
183 #define SENSOR_TEMP_T_SENSOR_2 BIT(ec_sensor_temp_t_sensor_2)
184 #define SENSOR_TEMP_SENSOR_EXTRA_1 BIT(ec_sensor_temp_sensor_extra_1)
185 #define SENSOR_TEMP_SENSOR_EXTRA_2 BIT(ec_sensor_temp_sensor_extra_2)
186 #define SENSOR_TEMP_SENSOR_EXTRA_3 BIT(ec_sensor_temp_sensor_extra_3)
187
188 enum board_family {
189 family_unknown,
190 family_amd_400_series,
191 family_amd_500_series,
192 family_amd_600_series,
193 family_amd_800_series,
194 family_amd_trx_50,
195 family_amd_wrx_90,
196 family_intel_200_series,
197 family_intel_300_series,
198 family_intel_400_series,
199 family_intel_600_series,
200 family_intel_700_series
201 };
202
203 /*
204 * All the known sensors for ASUS EC controllers. These arrays have to be sorted
205 * by the full ((bank << 8) + index) register index (see asus_ec_block_read() as
206 * to why).
207 */
208 static const struct ec_sensor_info sensors_family_amd_400[] = {
209 [ec_sensor_temp_chipset] =
210 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a),
211 [ec_sensor_temp_cpu] =
212 EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b),
213 [ec_sensor_temp_mb] =
214 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c),
215 [ec_sensor_temp_t_sensor] =
216 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
217 [ec_sensor_temp_vrm] =
218 EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
219 [ec_sensor_in_cpu_core] =
220 EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2),
221 [ec_sensor_fan_vrm_hs] =
222 EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2),
223 [ec_sensor_fan_cpu_opt] =
224 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xbc),
225 [ec_sensor_fan_chipset] =
226 /* no chipset fans in this generation */
227 EC_SENSOR("Chipset", hwmon_fan, 0, 0x00, 0x00),
228 [ec_sensor_fan_water_flow] =
229 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xb4),
230 [ec_sensor_curr_cpu] =
231 EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4),
232 [ec_sensor_temp_water_out] =
233 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x0b),
234 [ec_sensor_temp_water_in] =
235 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x0d),
236 };
237
238 static const struct ec_sensor_info sensors_family_amd_500[] = {
239 [ec_sensor_temp_chipset] =
240 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a),
241 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b),
242 [ec_sensor_temp_mb] =
243 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c),
244 [ec_sensor_temp_t_sensor] =
245 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
246 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
247 [ec_sensor_in_cpu_core] =
248 EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2),
249 [ec_sensor_fan_cpu_opt] =
250 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
251 [ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2),
252 [ec_sensor_fan_chipset] =
253 EC_SENSOR("Chipset", hwmon_fan, 2, 0x00, 0xb4),
254 [ec_sensor_fan_water_flow] =
255 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc),
256 [ec_sensor_curr_cpu] = EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4),
257 [ec_sensor_temp_water_in] =
258 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00),
259 [ec_sensor_temp_water_out] =
260 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01),
261 [ec_sensor_temp_water_block_in] =
262 EC_SENSOR("Water_Block_In", hwmon_temp, 1, 0x01, 0x02),
263 [ec_sensor_temp_water_block_out] =
264 EC_SENSOR("Water_Block_Out", hwmon_temp, 1, 0x01, 0x03),
265 [ec_sensor_temp_sensor_extra_1] =
266 EC_SENSOR("Extra_1", hwmon_temp, 1, 0x01, 0x09),
267 [ec_sensor_temp_t_sensor_2] =
268 EC_SENSOR("T_sensor_2", hwmon_temp, 1, 0x01, 0x0a),
269 [ec_sensor_temp_sensor_extra_2] =
270 EC_SENSOR("Extra_2", hwmon_temp, 1, 0x01, 0x0b),
271 [ec_sensor_temp_sensor_extra_3] =
272 EC_SENSOR("Extra_3", hwmon_temp, 1, 0x01, 0x0c),
273 };
274
275 static const struct ec_sensor_info sensors_family_amd_600[] = {
276 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x30),
277 [ec_sensor_temp_cpu_package] =
278 EC_SENSOR("CPU Package", hwmon_temp, 1, 0x00, 0x31),
279 [ec_sensor_temp_mb] =
280 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x32),
281 [ec_sensor_temp_vrm] =
282 EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x33),
283 [ec_sensor_temp_t_sensor] =
284 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x36),
285 [ec_sensor_temp_t_sensor_alt1] =
286 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x37),
287 [ec_sensor_fan_cpu_opt] =
288 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
289 [ec_sensor_temp_water_in] =
290 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00),
291 [ec_sensor_temp_water_out] =
292 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01),
293 };
294
295 static const struct ec_sensor_info sensors_family_amd_800[] = {
296 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x30),
297 [ec_sensor_temp_cpu_package] =
298 EC_SENSOR("CPU Package", hwmon_temp, 1, 0x00, 0x31),
299 [ec_sensor_temp_mb] =
300 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x32),
301 [ec_sensor_temp_vrm] =
302 EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x33),
303 [ec_sensor_temp_t_sensor] =
304 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x36),
305 [ec_sensor_fan_cpu_opt] =
306 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
307 };
308
309 static const struct ec_sensor_info sensors_family_amd_trx_50[] = {
310 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x30),
311 [ec_sensor_temp_cpu_package] =
312 EC_SENSOR("CPU Package", hwmon_temp, 1, 0x00, 0x31),
313 [ec_sensor_temp_vrme] = EC_SENSOR("VRM_E", hwmon_temp, 1, 0x00, 0x33),
314 [ec_sensor_temp_vrmw] = EC_SENSOR("VRM_W", hwmon_temp, 1, 0x00, 0x34),
315 [ec_sensor_fan_cpu_opt] = EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
316 [ec_sensor_fan_vrmw_hs] = EC_SENSOR("VRM_E HS", hwmon_fan, 2, 0x00, 0xb4),
317 [ec_sensor_fan_vrme_hs] = EC_SENSOR("VRM_W HS", hwmon_fan, 2, 0x00, 0xbc),
318 [ec_sensor_temp_t_sensor] =
319 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x01, 0x04),
320 };
321
322 static const struct ec_sensor_info sensors_family_amd_wrx_90[] = {
323 [ec_sensor_temp_cpu_package] =
324 EC_SENSOR("CPU Package", hwmon_temp, 1, 0x00, 0x31),
325 [ec_sensor_temp_vrme] = EC_SENSOR("VRM_E", hwmon_temp, 1, 0x00, 0x33),
326 [ec_sensor_temp_vrmw] = EC_SENSOR("VRM_W", hwmon_temp, 1, 0x00, 0x34),
327 [ec_sensor_fan_cpu_opt] =
328 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
329 [ec_sensor_fan_vrmw_hs] =
330 EC_SENSOR("VRMW HS", hwmon_fan, 2, 0x00, 0xb4),
331 [ec_sensor_fan_usb4] = EC_SENSOR("USB4", hwmon_fan, 2, 0x00, 0xb6),
332 [ec_sensor_fan_vrme_hs] =
333 EC_SENSOR("VRME HS", hwmon_fan, 2, 0x00, 0xbc),
334 [ec_sensor_fan_m2] = EC_SENSOR("M.2", hwmon_fan, 2, 0x00, 0xbe),
335 [ec_sensor_temp_t_sensor] =
336 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x01, 0x04),
337 };
338
339 static const struct ec_sensor_info sensors_family_intel_200[] = {
340 [ec_sensor_temp_chipset] =
341 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a),
342 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b),
343 [ec_sensor_temp_mb] =
344 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c),
345 [ec_sensor_temp_t_sensor] =
346 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
347 [ec_sensor_fan_cpu_opt] =
348 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xbc),
349 };
350
351 static const struct ec_sensor_info sensors_family_intel_300[] = {
352 [ec_sensor_temp_chipset] =
353 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a),
354 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b),
355 [ec_sensor_temp_mb] =
356 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c),
357 [ec_sensor_temp_t_sensor] =
358 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
359 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
360 [ec_sensor_fan_cpu_opt] =
361 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
362 [ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2),
363 [ec_sensor_fan_water_flow] =
364 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc),
365 [ec_sensor_temp_water_in] =
366 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00),
367 [ec_sensor_temp_water_out] =
368 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01),
369 };
370
371 static const struct ec_sensor_info sensors_family_intel_400[] = {
372 [ec_sensor_temp_chipset] =
373 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a),
374 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b),
375 [ec_sensor_temp_mb] =
376 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c),
377 [ec_sensor_temp_t_sensor] =
378 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
379 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
380 [ec_sensor_fan_cpu_opt] =
381 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
382 [ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2),
383 };
384
385 static const struct ec_sensor_info sensors_family_intel_600[] = {
386 [ec_sensor_temp_t_sensor] =
387 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
388 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
389 [ec_sensor_fan_water_flow] =
390 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbe),
391 [ec_sensor_temp_water_in] =
392 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00),
393 [ec_sensor_temp_water_out] =
394 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01),
395 [ec_sensor_temp_water_block_in] =
396 EC_SENSOR("Water_Block_In", hwmon_temp, 1, 0x01, 0x02),
397 };
398
399 static const struct ec_sensor_info sensors_family_intel_700[] = {
400 [ec_sensor_temp_t_sensor] =
401 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x01, 0x09),
402 [ec_sensor_temp_t_sensor_2] =
403 EC_SENSOR("T_Sensor 2", hwmon_temp, 1, 0x01, 0x05),
404 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x33),
405 [ec_sensor_fan_cpu_opt] =
406 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
407 };
408
409 /* Shortcuts for common combinations */
410 #define SENSOR_SET_TEMP_CHIPSET_CPU_MB \
411 (SENSOR_TEMP_CHIPSET | SENSOR_TEMP_CPU | SENSOR_TEMP_MB)
412 #define SENSOR_SET_TEMP_WATER (SENSOR_TEMP_WATER_IN | SENSOR_TEMP_WATER_OUT)
413 #define SENSOR_SET_WATER_BLOCK \
414 (SENSOR_TEMP_WATER_BLOCK_IN | SENSOR_TEMP_WATER_BLOCK_OUT)
415
416 struct ec_board_info {
417 unsigned long sensors;
418 /*
419 * Defines which mutex to use for guarding access to the state and the
420 * hardware. Can be either a full path to an AML mutex or the
421 * pseudo-path ACPI_GLOBAL_LOCK_PSEUDO_PATH to use the global ACPI lock,
422 * or left empty to use a regular mutex object, in which case access to
423 * the hardware is not guarded.
424 */
425 const char *mutex_path;
426 enum board_family family;
427 };
428
429 static const struct ec_board_info board_info_crosshair_viii_dark_hero = {
430 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
431 SENSOR_TEMP_T_SENSOR |
432 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
433 SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW |
434 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
435 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
436 .family = family_amd_500_series,
437 };
438
439 static const struct ec_board_info board_info_crosshair_viii_hero = {
440 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
441 SENSOR_TEMP_T_SENSOR |
442 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
443 SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET |
444 SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU |
445 SENSOR_IN_CPU_CORE,
446 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
447 .family = family_amd_500_series,
448 };
449
450 static const struct ec_board_info board_info_crosshair_viii_impact = {
451 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
452 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
453 SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU |
454 SENSOR_IN_CPU_CORE,
455 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
456 .family = family_amd_500_series,
457 };
458
459 static const struct ec_board_info board_info_crosshair_x670e_gene = {
460 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
461 SENSOR_TEMP_T_SENSOR |
462 SENSOR_TEMP_MB | SENSOR_TEMP_VRM,
463 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
464 .family = family_amd_600_series,
465 };
466
467 static const struct ec_board_info board_info_crosshair_x670e_hero = {
468 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
469 SENSOR_TEMP_MB | SENSOR_TEMP_VRM |
470 SENSOR_SET_TEMP_WATER,
471 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
472 .family = family_amd_600_series,
473 };
474
475 static const struct ec_board_info board_info_maximus_vi_hero = {
476 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
477 SENSOR_TEMP_T_SENSOR |
478 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
479 SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW,
480 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
481 .family = family_intel_300_series,
482 };
483
484 static const struct ec_board_info board_info_maximus_x_hero = {
485 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
486 SENSOR_TEMP_T_SENSOR |
487 SENSOR_TEMP_VRM | SENSOR_FAN_CPU_OPT,
488 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_LPCB_SIO1_MUT0,
489 .family = family_intel_300_series,
490 };
491
492 static const struct ec_board_info board_info_maximus_xi_hero = {
493 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
494 SENSOR_TEMP_T_SENSOR |
495 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
496 SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW,
497 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
498 .family = family_intel_300_series,
499 };
500
501 static const struct ec_board_info board_info_maximus_z690_formula = {
502 .sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
503 SENSOR_SET_TEMP_WATER | SENSOR_FAN_WATER_FLOW,
504 .mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX,
505 .family = family_intel_600_series,
506 };
507
508 static const struct ec_board_info board_info_prime_x470_pro = {
509 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
510 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
511 SENSOR_FAN_CPU_OPT |
512 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
513 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
514 .family = family_amd_400_series,
515 };
516
517 static const struct ec_board_info board_info_prime_x570_pro = {
518 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
519 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET,
520 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
521 .family = family_amd_500_series,
522 };
523
524 static const struct ec_board_info board_info_prime_x670e_pro_wifi = {
525 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
526 SENSOR_TEMP_MB | SENSOR_TEMP_VRM |
527 SENSOR_TEMP_T_SENSOR_ALT1 | SENSOR_FAN_CPU_OPT,
528 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
529 .family = family_amd_600_series,
530 };
531
532 static const struct ec_board_info board_info_prime_z270_a = {
533 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
534 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CPU_OPT,
535 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_LPCB_SIO1_MUT0,
536 .family = family_intel_200_series,
537 };
538
539 static const struct ec_board_info board_info_pro_art_b550_creator = {
540 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
541 SENSOR_TEMP_T_SENSOR |
542 SENSOR_FAN_CPU_OPT,
543 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
544 .family = family_amd_500_series,
545 };
546
547 static const struct ec_board_info board_info_pro_art_x570_creator_wifi = {
548 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
549 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CPU_OPT |
550 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
551 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
552 .family = family_amd_500_series,
553 };
554
555 static const struct ec_board_info board_info_pro_art_x670E_creator_wifi = {
556 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
557 SENSOR_TEMP_MB | SENSOR_TEMP_VRM |
558 SENSOR_TEMP_T_SENSOR,
559 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
560 .family = family_amd_600_series,
561 };
562
563 static const struct ec_board_info board_info_pro_art_x870E_creator_wifi = {
564 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
565 SENSOR_TEMP_MB | SENSOR_TEMP_VRM |
566 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CPU_OPT,
567 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
568 .family = family_amd_800_series,
569 };
570
571 static const struct ec_board_info board_info_pro_ws_trx50_sage_wifi = {
572 /* Board also has a nct6798 */
573 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE | SENSOR_TEMP_VRME |
574 SENSOR_TEMP_VRMW | SENSOR_FAN_CPU_OPT | SENSOR_FAN_VRME_HS |
575 SENSOR_FAN_VRMW_HS | SENSOR_TEMP_T_SENSOR,
576 .mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX,
577 .family = family_amd_trx_50,
578 };
579
580 static const struct ec_board_info board_info_pro_ws_wrx90e_sage_se = {
581 /* Board also has a nct6798 with 7 more fans and temperatures */
582 .sensors = SENSOR_TEMP_CPU_PACKAGE | SENSOR_TEMP_T_SENSOR |
583 SENSOR_FAN_CPU_OPT | SENSOR_FAN_USB4 | SENSOR_FAN_M2 |
584 SENSOR_FAN_VRME_HS | SENSOR_FAN_VRMW_HS |
585 SENSOR_TEMP_VRME | SENSOR_TEMP_VRMW,
586 .mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX,
587 .family = family_amd_wrx_90,
588 };
589
590 static const struct ec_board_info board_info_pro_ws_x570_ace = {
591 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
592 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET |
593 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
594 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
595 .family = family_amd_500_series,
596 };
597
598 static const struct ec_board_info board_info_strix_b550_e_gaming = {
599 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
600 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
601 SENSOR_FAN_CPU_OPT,
602 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
603 .family = family_amd_500_series,
604 };
605
606 static const struct ec_board_info board_info_strix_b550_i_gaming = {
607 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
608 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
609 SENSOR_FAN_VRM_HS | SENSOR_CURR_CPU |
610 SENSOR_IN_CPU_CORE,
611 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
612 .family = family_amd_500_series,
613 };
614
615 static const struct ec_board_info board_info_strix_b650e_i_gaming = {
616 .sensors = SENSOR_TEMP_VRM | SENSOR_TEMP_T_SENSOR |
617 SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_IN_CPU_CORE,
618 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
619 .family = family_amd_600_series,
620 };
621
622 static const struct ec_board_info board_info_strix_b850_i_gaming_wifi = {
623 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
624 SENSOR_TEMP_MB | SENSOR_TEMP_VRM,
625 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
626 .family = family_amd_800_series,
627 };
628
629 static const struct ec_board_info board_info_strix_x470_i_gaming = {
630 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
631 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
632 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
633 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
634 .family = family_amd_400_series,
635 };
636
637 static const struct ec_board_info board_info_strix_x570_e_gaming = {
638 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
639 SENSOR_TEMP_T_SENSOR |
640 SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU |
641 SENSOR_IN_CPU_CORE,
642 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
643 .family = family_amd_500_series,
644 };
645
646 static const struct ec_board_info board_info_strix_x570_e_gaming_wifi_ii = {
647 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
648 SENSOR_TEMP_T_SENSOR | SENSOR_CURR_CPU |
649 SENSOR_IN_CPU_CORE,
650 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
651 .family = family_amd_500_series,
652 };
653
654 static const struct ec_board_info board_info_strix_x570_f_gaming = {
655 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
656 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET,
657 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
658 .family = family_amd_500_series,
659 };
660
661 static const struct ec_board_info board_info_strix_x570_i_gaming = {
662 .sensors = SENSOR_TEMP_CHIPSET | SENSOR_TEMP_VRM |
663 SENSOR_TEMP_T_SENSOR |
664 SENSOR_FAN_VRM_HS | SENSOR_FAN_CHIPSET |
665 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
666 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
667 .family = family_amd_500_series,
668 };
669
670 static const struct ec_board_info board_info_strix_x670e_e_gaming_wifi = {
671 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
672 SENSOR_TEMP_MB | SENSOR_TEMP_VRM,
673 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
674 .family = family_amd_600_series,
675 };
676
677 static const struct ec_board_info board_info_strix_x670e_i_gaming_wifi = {
678 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
679 SENSOR_TEMP_MB | SENSOR_TEMP_VRM,
680 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
681 .family = family_amd_600_series,
682 };
683
684 static const struct ec_board_info board_info_strix_x870_f_gaming_wifi = {
685 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
686 SENSOR_TEMP_MB | SENSOR_TEMP_VRM | SENSOR_TEMP_T_SENSOR,
687 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
688 .family = family_amd_800_series,
689 };
690
691 static const struct ec_board_info board_info_strix_x870_i_gaming_wifi = {
692 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
693 SENSOR_TEMP_MB | SENSOR_TEMP_VRM,
694 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
695 .family = family_amd_800_series,
696 };
697
698 static const struct ec_board_info board_info_strix_x870e_e_gaming_wifi = {
699 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
700 SENSOR_TEMP_MB | SENSOR_TEMP_VRM |
701 SENSOR_FAN_CPU_OPT,
702 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
703 .family = family_amd_800_series,
704 };
705
706 static const struct ec_board_info board_info_strix_x870e_h_gaming_wifi7 = {
707 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
708 SENSOR_TEMP_MB | SENSOR_TEMP_VRM | SENSOR_TEMP_T_SENSOR |
709 SENSOR_FAN_CPU_OPT,
710 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
711 .family = family_amd_800_series,
712 };
713
714 static const struct ec_board_info board_info_strix_z390_f_gaming = {
715 .sensors = SENSOR_TEMP_CHIPSET | SENSOR_TEMP_VRM |
716 SENSOR_TEMP_T_SENSOR |
717 SENSOR_FAN_CPU_OPT,
718 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
719 .family = family_intel_300_series,
720 };
721
722 static const struct ec_board_info board_info_strix_z490_f_gaming = {
723 .sensors = SENSOR_TEMP_CHIPSET |
724 SENSOR_TEMP_CPU |
725 SENSOR_TEMP_MB |
726 SENSOR_TEMP_T_SENSOR |
727 SENSOR_TEMP_VRM |
728 SENSOR_FAN_CPU_OPT |
729 SENSOR_FAN_VRM_HS,
730 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
731 .family = family_intel_400_series,
732 };
733
734 static const struct ec_board_info board_info_strix_z690_a_gaming_wifi_d4 = {
735 .sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM,
736 .mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX,
737 .family = family_intel_600_series,
738 };
739
740 static const struct ec_board_info board_info_strix_z690_e_gaming_wifi = {
741 .sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM,
742 .mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX,
743 .family = family_intel_600_series,
744 };
745
746 static const struct ec_board_info board_info_strix_z790_e_gaming_wifi_ii = {
747 .sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
748 SENSOR_FAN_CPU_OPT,
749 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PC00_LPCB_SIO1_MUT0,
750 .family = family_intel_700_series,
751 };
752
753 static const struct ec_board_info board_info_strix_z790_i_gaming_wifi = {
754 .sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_T_SENSOR_2 |
755 SENSOR_TEMP_VRM,
756 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PC00_LPCB_SIO1_MUT0,
757 .family = family_intel_700_series,
758 };
759
760 static const struct ec_board_info board_info_tuf_gaming_x670e_plus = {
761 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE |
762 SENSOR_TEMP_MB | SENSOR_TEMP_VRM |
763 SENSOR_TEMP_WATER_IN | SENSOR_TEMP_WATER_OUT |
764 SENSOR_FAN_CPU_OPT,
765 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
766 .family = family_amd_600_series,
767 };
768
769 static const struct ec_board_info board_info_zenith_ii_extreme = {
770 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR |
771 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
772 SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET | SENSOR_FAN_VRM_HS |
773 SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE |
774 SENSOR_SET_WATER_BLOCK |
775 SENSOR_TEMP_T_SENSOR_2 | SENSOR_TEMP_SENSOR_EXTRA_1 |
776 SENSOR_TEMP_SENSOR_EXTRA_2 | SENSOR_TEMP_SENSOR_EXTRA_3,
777 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
778 .family = family_amd_500_series,
779 };
780
781 #define DMI_EXACT_MATCH_ASUS_BOARD_NAME(name, board_info) \
782 { \
783 .matches = { \
784 DMI_EXACT_MATCH(DMI_BOARD_VENDOR, \
785 "ASUSTeK COMPUTER INC."), \
786 DMI_EXACT_MATCH(DMI_BOARD_NAME, name), \
787 }, \
788 .driver_data = (void *)board_info, \
789 }
790
791 static const struct dmi_system_id dmi_table[] = {
792 DMI_EXACT_MATCH_ASUS_BOARD_NAME("MAXIMUS VI HERO",
793 &board_info_maximus_vi_hero),
794 DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X470-PRO",
795 &board_info_prime_x470_pro),
796 DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X570-PRO",
797 &board_info_prime_x570_pro),
798 DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X670E-PRO WIFI",
799 &board_info_prime_x670e_pro_wifi),
800 DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME Z270-A",
801 &board_info_prime_z270_a),
802 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt B550-CREATOR",
803 &board_info_pro_art_b550_creator),
804 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt X570-CREATOR WIFI",
805 &board_info_pro_art_x570_creator_wifi),
806 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt X670E-CREATOR WIFI",
807 &board_info_pro_art_x670E_creator_wifi),
808 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt X870E-CREATOR WIFI",
809 &board_info_pro_art_x870E_creator_wifi),
810 DMI_EXACT_MATCH_ASUS_BOARD_NAME("Pro WS TRX50-SAGE WIFI",
811 &board_info_pro_ws_trx50_sage_wifi),
812 DMI_EXACT_MATCH_ASUS_BOARD_NAME("Pro WS TRX50-SAGE WIFI A",
813 &board_info_pro_ws_trx50_sage_wifi),
814 DMI_EXACT_MATCH_ASUS_BOARD_NAME("Pro WS WRX90E-SAGE SE",
815 &board_info_pro_ws_wrx90e_sage_se),
816 DMI_EXACT_MATCH_ASUS_BOARD_NAME("Pro WS X570-ACE",
817 &board_info_pro_ws_x570_ace),
818 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII DARK HERO",
819 &board_info_crosshair_viii_dark_hero),
820 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII FORMULA",
821 &board_info_crosshair_viii_hero),
822 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII HERO",
823 &board_info_crosshair_viii_hero),
824 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII HERO (WI-FI)",
825 &board_info_crosshair_viii_hero),
826 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII IMPACT",
827 &board_info_crosshair_viii_impact),
828 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR X670E GENE",
829 &board_info_crosshair_x670e_gene),
830 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR X670E HERO",
831 &board_info_crosshair_x670e_hero),
832 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS XI HERO",
833 &board_info_maximus_xi_hero),
834 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS XI HERO (WI-FI)",
835 &board_info_maximus_xi_hero),
836 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS X HERO",
837 &board_info_maximus_x_hero),
838 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS Z690 FORMULA",
839 &board_info_maximus_z690_formula),
840 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B550-E GAMING",
841 &board_info_strix_b550_e_gaming),
842 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B550-I GAMING",
843 &board_info_strix_b550_i_gaming),
844 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B650E-I GAMING WIFI",
845 &board_info_strix_b650e_i_gaming),
846 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B850-I GAMING WIFI",
847 &board_info_strix_b850_i_gaming_wifi),
848 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X470-I GAMING",
849 &board_info_strix_x470_i_gaming),
850 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-E GAMING",
851 &board_info_strix_x570_e_gaming),
852 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-E GAMING WIFI II",
853 &board_info_strix_x570_e_gaming_wifi_ii),
854 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-F GAMING",
855 &board_info_strix_x570_f_gaming),
856 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-I GAMING",
857 &board_info_strix_x570_i_gaming),
858 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X670E-E GAMING WIFI",
859 &board_info_strix_x670e_e_gaming_wifi),
860 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X670E-I GAMING WIFI",
861 &board_info_strix_x670e_i_gaming_wifi),
862 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X870-F GAMING WIFI",
863 &board_info_strix_x870_f_gaming_wifi),
864 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X870-I GAMING WIFI",
865 &board_info_strix_x870_i_gaming_wifi),
866 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X870E-E GAMING WIFI",
867 &board_info_strix_x870e_e_gaming_wifi),
868 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X870E-H GAMING WIFI7",
869 &board_info_strix_x870e_h_gaming_wifi7),
870 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z390-F GAMING",
871 &board_info_strix_z390_f_gaming),
872 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z490-F GAMING",
873 &board_info_strix_z490_f_gaming),
874 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z690-A GAMING WIFI D4",
875 &board_info_strix_z690_a_gaming_wifi_d4),
876 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z690-E GAMING WIFI",
877 &board_info_strix_z690_e_gaming_wifi),
878 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z790-E GAMING WIFI II",
879 &board_info_strix_z790_e_gaming_wifi_ii),
880 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z790-I GAMING WIFI",
881 &board_info_strix_z790_i_gaming_wifi),
882 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG ZENITH II EXTREME",
883 &board_info_zenith_ii_extreme),
884 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG ZENITH II EXTREME ALPHA",
885 &board_info_zenith_ii_extreme),
886 DMI_EXACT_MATCH_ASUS_BOARD_NAME("TUF GAMING X670E-PLUS",
887 &board_info_tuf_gaming_x670e_plus),
888 DMI_EXACT_MATCH_ASUS_BOARD_NAME("TUF GAMING X670E-PLUS WIFI",
889 &board_info_tuf_gaming_x670e_plus),
890 {},
891 };
892
893 struct ec_sensor {
894 unsigned int info_index;
895 s32 cached_value;
896 };
897
898 struct lock_data {
899 union {
900 acpi_handle aml;
901 /* global lock handle */
902 u32 glk;
903 } mutex;
904 bool (*lock)(struct lock_data *data);
905 bool (*unlock)(struct lock_data *data);
906 };
907
908 /*
909 * The next function pairs implement options for locking access to the
910 * state and the EC
911 */
lock_via_acpi_mutex(struct lock_data * data)912 static bool lock_via_acpi_mutex(struct lock_data *data)
913 {
914 /*
915 * ASUS DSDT does not specify that access to the EC has to be guarded,
916 * but firmware does access it via ACPI
917 */
918 return ACPI_SUCCESS(acpi_acquire_mutex(data->mutex.aml,
919 NULL, ACPI_LOCK_DELAY_MS));
920 }
921
unlock_acpi_mutex(struct lock_data * data)922 static bool unlock_acpi_mutex(struct lock_data *data)
923 {
924 return ACPI_SUCCESS(acpi_release_mutex(data->mutex.aml, NULL));
925 }
926
lock_via_global_acpi_lock(struct lock_data * data)927 static bool lock_via_global_acpi_lock(struct lock_data *data)
928 {
929 return ACPI_SUCCESS(acpi_acquire_global_lock(ACPI_LOCK_DELAY_MS,
930 &data->mutex.glk));
931 }
932
unlock_global_acpi_lock(struct lock_data * data)933 static bool unlock_global_acpi_lock(struct lock_data *data)
934 {
935 return ACPI_SUCCESS(acpi_release_global_lock(data->mutex.glk));
936 }
937
938 struct ec_sensors_data {
939 const struct ec_board_info *board_info;
940 const struct ec_sensor_info *sensors_info;
941 struct ec_sensor *sensors;
942 /* EC registers to read from */
943 u16 *registers;
944 u8 *read_buffer;
945 /* sorted list of unique register banks */
946 u8 banks[ASUS_EC_MAX_BANK + 1];
947 /* in jiffies */
948 unsigned long last_updated;
949 struct lock_data lock_data;
950 /* number of board EC sensors */
951 u8 nr_sensors;
952 /*
953 * number of EC registers to read
954 * (sensor might span more than 1 register)
955 */
956 u8 nr_registers;
957 /* number of unique register banks */
958 u8 nr_banks;
959 };
960
register_bank(u16 reg)961 static u8 register_bank(u16 reg)
962 {
963 return reg >> 8;
964 }
965
register_index(u16 reg)966 static u8 register_index(u16 reg)
967 {
968 return reg & 0x00ff;
969 }
970
is_sensor_data_signed(const struct ec_sensor_info * si)971 static bool is_sensor_data_signed(const struct ec_sensor_info *si)
972 {
973 /*
974 * guessed from WMI functions in DSDT code for boards
975 * of the X470 generation
976 */
977 return si->type == hwmon_temp;
978 }
979
980 static const struct ec_sensor_info *
get_sensor_info(const struct ec_sensors_data * state,int index)981 get_sensor_info(const struct ec_sensors_data *state, int index)
982 {
983 return state->sensors_info + state->sensors[index].info_index;
984 }
985
find_ec_sensor_index(const struct ec_sensors_data * ec,enum hwmon_sensor_types type,int channel)986 static int find_ec_sensor_index(const struct ec_sensors_data *ec,
987 enum hwmon_sensor_types type, int channel)
988 {
989 unsigned int i;
990
991 for (i = 0; i < ec->nr_sensors; i++) {
992 if (get_sensor_info(ec, i)->type == type) {
993 if (channel == 0)
994 return i;
995 channel--;
996 }
997 }
998 return -ENOENT;
999 }
1000
bank_compare(const void * a,const void * b)1001 static int bank_compare(const void *a, const void *b)
1002 {
1003 return *((const s8 *)a) - *((const s8 *)b);
1004 }
1005
setup_sensor_data(struct ec_sensors_data * ec)1006 static void setup_sensor_data(struct ec_sensors_data *ec)
1007 {
1008 struct ec_sensor *s = ec->sensors;
1009 bool bank_found;
1010 int i, j;
1011 u8 bank;
1012
1013 ec->nr_banks = 0;
1014 ec->nr_registers = 0;
1015
1016 for_each_set_bit(i, &ec->board_info->sensors,
1017 BITS_PER_TYPE(ec->board_info->sensors)) {
1018 s->info_index = i;
1019 s->cached_value = 0;
1020 ec->nr_registers +=
1021 ec->sensors_info[s->info_index].addr.components.size;
1022 bank_found = false;
1023 bank = ec->sensors_info[s->info_index].addr.components.bank;
1024 for (j = 0; j < ec->nr_banks; j++) {
1025 if (ec->banks[j] == bank) {
1026 bank_found = true;
1027 break;
1028 }
1029 }
1030 if (!bank_found) {
1031 ec->banks[ec->nr_banks++] = bank;
1032 }
1033 s++;
1034 }
1035 sort(ec->banks, ec->nr_banks, 1, bank_compare, NULL);
1036 }
1037
fill_ec_registers(struct ec_sensors_data * ec)1038 static void fill_ec_registers(struct ec_sensors_data *ec)
1039 {
1040 const struct ec_sensor_info *si;
1041 unsigned int i, j, register_idx = 0;
1042
1043 for (i = 0; i < ec->nr_sensors; ++i) {
1044 si = get_sensor_info(ec, i);
1045 for (j = 0; j < si->addr.components.size; ++j, ++register_idx) {
1046 ec->registers[register_idx] =
1047 (si->addr.components.bank << 8) +
1048 si->addr.components.index + j;
1049 }
1050 }
1051 }
1052
setup_lock_data(struct device * dev)1053 static int setup_lock_data(struct device *dev)
1054 {
1055 const char *mutex_path;
1056 int status;
1057 struct ec_sensors_data *state = dev_get_drvdata(dev);
1058
1059 mutex_path = mutex_path_override ?
1060 mutex_path_override : state->board_info->mutex_path;
1061
1062 if (!mutex_path || !strlen(mutex_path)) {
1063 dev_err(dev, "Hardware access guard mutex name is empty");
1064 return -EINVAL;
1065 }
1066 if (!strcmp(mutex_path, ACPI_GLOBAL_LOCK_PSEUDO_PATH)) {
1067 state->lock_data.mutex.glk = 0;
1068 state->lock_data.lock = lock_via_global_acpi_lock;
1069 state->lock_data.unlock = unlock_global_acpi_lock;
1070 } else {
1071 status = acpi_get_handle(NULL, (acpi_string)mutex_path,
1072 &state->lock_data.mutex.aml);
1073 if (ACPI_FAILURE(status)) {
1074 dev_err(dev,
1075 "Failed to get hardware access guard AML mutex '%s': error %d",
1076 mutex_path, status);
1077 return -ENOENT;
1078 }
1079 state->lock_data.lock = lock_via_acpi_mutex;
1080 state->lock_data.unlock = unlock_acpi_mutex;
1081 }
1082 return 0;
1083 }
1084
asus_ec_bank_switch(u8 bank,u8 * old)1085 static int asus_ec_bank_switch(u8 bank, u8 *old)
1086 {
1087 int status = 0;
1088
1089 if (old) {
1090 status = ec_read(ASUS_EC_BANK_REGISTER, old);
1091 }
1092 if (status || (old && (*old == bank)))
1093 return status;
1094 return ec_write(ASUS_EC_BANK_REGISTER, bank);
1095 }
1096
asus_ec_block_read(const struct device * dev,struct ec_sensors_data * ec)1097 static int asus_ec_block_read(const struct device *dev,
1098 struct ec_sensors_data *ec)
1099 {
1100 int ireg, ibank, status;
1101 u8 bank, reg_bank, prev_bank;
1102
1103 bank = 0;
1104 status = asus_ec_bank_switch(bank, &prev_bank);
1105 if (status) {
1106 dev_warn(dev, "EC bank switch failed");
1107 return status;
1108 }
1109
1110 if (prev_bank) {
1111 /* oops... somebody else is working with the EC too */
1112 dev_warn(dev,
1113 "Concurrent access to the ACPI EC detected.\nRace condition possible.");
1114 }
1115
1116 /* read registers minimizing bank switches. */
1117 for (ibank = 0; ibank < ec->nr_banks; ibank++) {
1118 if (bank != ec->banks[ibank]) {
1119 bank = ec->banks[ibank];
1120 if (asus_ec_bank_switch(bank, NULL)) {
1121 dev_warn(dev, "EC bank switch to %d failed",
1122 bank);
1123 break;
1124 }
1125 }
1126 for (ireg = 0; ireg < ec->nr_registers; ireg++) {
1127 reg_bank = register_bank(ec->registers[ireg]);
1128 if (reg_bank < bank) {
1129 continue;
1130 }
1131 ec_read(register_index(ec->registers[ireg]),
1132 ec->read_buffer + ireg);
1133 }
1134 }
1135
1136 status = asus_ec_bank_switch(prev_bank, NULL);
1137 return status;
1138 }
1139
get_sensor_value(const struct ec_sensor_info * si,u8 * data)1140 static inline s32 get_sensor_value(const struct ec_sensor_info *si, u8 *data)
1141 {
1142 if (is_sensor_data_signed(si)) {
1143 switch (si->addr.components.size) {
1144 case 1:
1145 return (s8)*data;
1146 case 2:
1147 return (s16)get_unaligned_be16(data);
1148 case 4:
1149 return (s32)get_unaligned_be32(data);
1150 default:
1151 return 0;
1152 }
1153 } else {
1154 switch (si->addr.components.size) {
1155 case 1:
1156 return *data;
1157 case 2:
1158 return get_unaligned_be16(data);
1159 case 4:
1160 return get_unaligned_be32(data);
1161 default:
1162 return 0;
1163 }
1164 }
1165 }
1166
update_sensor_values(struct ec_sensors_data * ec,u8 * data)1167 static void update_sensor_values(struct ec_sensors_data *ec, u8 *data)
1168 {
1169 const struct ec_sensor_info *si;
1170 struct ec_sensor *s, *sensor_end;
1171
1172 sensor_end = ec->sensors + ec->nr_sensors;
1173 for (s = ec->sensors; s != sensor_end; s++) {
1174 si = ec->sensors_info + s->info_index;
1175 s->cached_value = get_sensor_value(si, data);
1176 data += si->addr.components.size;
1177 }
1178 }
1179
update_ec_sensors(const struct device * dev,struct ec_sensors_data * ec)1180 static int update_ec_sensors(const struct device *dev,
1181 struct ec_sensors_data *ec)
1182 {
1183 int status;
1184
1185 if (!ec->lock_data.lock(&ec->lock_data)) {
1186 dev_warn(dev, "Failed to acquire mutex");
1187 return -EBUSY;
1188 }
1189
1190 status = asus_ec_block_read(dev, ec);
1191
1192 if (!status) {
1193 update_sensor_values(ec, ec->read_buffer);
1194 }
1195
1196 if (!ec->lock_data.unlock(&ec->lock_data))
1197 dev_err(dev, "Failed to release mutex");
1198
1199 return status;
1200 }
1201
scale_sensor_value(s32 value,int data_type)1202 static long scale_sensor_value(s32 value, int data_type)
1203 {
1204 switch (data_type) {
1205 case hwmon_curr:
1206 case hwmon_temp:
1207 return value * MILLI;
1208 default:
1209 return value;
1210 }
1211 }
1212
get_cached_value_or_update(const struct device * dev,int sensor_index,struct ec_sensors_data * state,s32 * value)1213 static int get_cached_value_or_update(const struct device *dev,
1214 int sensor_index,
1215 struct ec_sensors_data *state, s32 *value)
1216 {
1217 if (time_after(jiffies, state->last_updated + HZ)) {
1218 if (update_ec_sensors(dev, state)) {
1219 dev_err(dev, "update_ec_sensors() failure\n");
1220 return -EIO;
1221 }
1222
1223 state->last_updated = jiffies;
1224 }
1225
1226 *value = state->sensors[sensor_index].cached_value;
1227 return 0;
1228 }
1229
1230 /*
1231 * Now follow the functions that implement the hwmon interface
1232 */
1233
asus_ec_hwmon_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * val)1234 static int asus_ec_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
1235 u32 attr, int channel, long *val)
1236 {
1237 int ret;
1238 s32 value = 0;
1239
1240 struct ec_sensors_data *state = dev_get_drvdata(dev);
1241 int sidx = find_ec_sensor_index(state, type, channel);
1242
1243 if (sidx < 0) {
1244 return sidx;
1245 }
1246
1247 ret = get_cached_value_or_update(dev, sidx, state, &value);
1248 if (!ret) {
1249 *val = scale_sensor_value(value,
1250 get_sensor_info(state, sidx)->type);
1251 }
1252
1253 return ret;
1254 }
1255
asus_ec_hwmon_read_string(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,const char ** str)1256 static int asus_ec_hwmon_read_string(struct device *dev,
1257 enum hwmon_sensor_types type, u32 attr,
1258 int channel, const char **str)
1259 {
1260 struct ec_sensors_data *state = dev_get_drvdata(dev);
1261 int sensor_index = find_ec_sensor_index(state, type, channel);
1262
1263 if (sensor_index < 0)
1264 return sensor_index;
1265
1266 *str = get_sensor_info(state, sensor_index)->label;
1267
1268 return 0;
1269 }
1270
asus_ec_hwmon_is_visible(const void * drvdata,enum hwmon_sensor_types type,u32 attr,int channel)1271 static umode_t asus_ec_hwmon_is_visible(const void *drvdata,
1272 enum hwmon_sensor_types type, u32 attr,
1273 int channel)
1274 {
1275 const struct ec_sensors_data *state = drvdata;
1276
1277 return find_ec_sensor_index(state, type, channel) >= 0 ? S_IRUGO : 0;
1278 }
1279
1280 static int
asus_ec_hwmon_add_chan_info(struct hwmon_channel_info * asus_ec_hwmon_chan,struct device * dev,int num,enum hwmon_sensor_types type,u32 config)1281 asus_ec_hwmon_add_chan_info(struct hwmon_channel_info *asus_ec_hwmon_chan,
1282 struct device *dev, int num,
1283 enum hwmon_sensor_types type, u32 config)
1284 {
1285 int i;
1286 u32 *cfg = devm_kcalloc(dev, num + 1, sizeof(*cfg), GFP_KERNEL);
1287
1288 if (!cfg)
1289 return -ENOMEM;
1290
1291 asus_ec_hwmon_chan->type = type;
1292 asus_ec_hwmon_chan->config = cfg;
1293 for (i = 0; i < num; i++, cfg++)
1294 *cfg = config;
1295
1296 return 0;
1297 }
1298
1299 static const struct hwmon_ops asus_ec_hwmon_ops = {
1300 .is_visible = asus_ec_hwmon_is_visible,
1301 .read = asus_ec_hwmon_read,
1302 .read_string = asus_ec_hwmon_read_string,
1303 };
1304
1305 static struct hwmon_chip_info asus_ec_chip_info = {
1306 .ops = &asus_ec_hwmon_ops,
1307 };
1308
get_board_info(void)1309 static const struct ec_board_info *get_board_info(void)
1310 {
1311 const struct dmi_system_id *dmi_entry;
1312
1313 dmi_entry = dmi_first_match(dmi_table);
1314 return dmi_entry ? dmi_entry->driver_data : NULL;
1315 }
1316
asus_ec_probe(struct platform_device * pdev)1317 static int asus_ec_probe(struct platform_device *pdev)
1318 {
1319 const struct hwmon_channel_info **ptr_asus_ec_ci;
1320 int nr_count[hwmon_max] = { 0 }, nr_types = 0;
1321 struct hwmon_channel_info *asus_ec_hwmon_chan;
1322 const struct ec_board_info *pboard_info;
1323 const struct hwmon_chip_info *chip_info;
1324 struct device *dev = &pdev->dev;
1325 struct ec_sensors_data *ec_data;
1326 const struct ec_sensor_info *si;
1327 enum hwmon_sensor_types type;
1328 struct device *hwdev;
1329 unsigned int i;
1330 int status;
1331
1332 pboard_info = get_board_info();
1333 if (!pboard_info)
1334 return -ENODEV;
1335
1336 ec_data = devm_kzalloc(dev, sizeof(struct ec_sensors_data),
1337 GFP_KERNEL);
1338 if (!ec_data)
1339 return -ENOMEM;
1340
1341 dev_set_drvdata(dev, ec_data);
1342 ec_data->board_info = pboard_info;
1343
1344 switch (ec_data->board_info->family) {
1345 case family_amd_400_series:
1346 ec_data->sensors_info = sensors_family_amd_400;
1347 break;
1348 case family_amd_500_series:
1349 ec_data->sensors_info = sensors_family_amd_500;
1350 break;
1351 case family_amd_600_series:
1352 ec_data->sensors_info = sensors_family_amd_600;
1353 break;
1354 case family_amd_800_series:
1355 ec_data->sensors_info = sensors_family_amd_800;
1356 break;
1357 case family_amd_trx_50:
1358 ec_data->sensors_info = sensors_family_amd_trx_50;
1359 break;
1360 case family_amd_wrx_90:
1361 ec_data->sensors_info = sensors_family_amd_wrx_90;
1362 break;
1363 case family_intel_200_series:
1364 ec_data->sensors_info = sensors_family_intel_200;
1365 break;
1366 case family_intel_300_series:
1367 ec_data->sensors_info = sensors_family_intel_300;
1368 break;
1369 case family_intel_400_series:
1370 ec_data->sensors_info = sensors_family_intel_400;
1371 break;
1372 case family_intel_600_series:
1373 ec_data->sensors_info = sensors_family_intel_600;
1374 break;
1375 case family_intel_700_series:
1376 ec_data->sensors_info = sensors_family_intel_700;
1377 break;
1378 default:
1379 dev_err(dev, "Unknown board family: %d",
1380 ec_data->board_info->family);
1381 return -EINVAL;
1382 }
1383
1384 ec_data->nr_sensors = hweight_long(ec_data->board_info->sensors);
1385 ec_data->sensors = devm_kcalloc(dev, ec_data->nr_sensors,
1386 sizeof(struct ec_sensor), GFP_KERNEL);
1387 if (!ec_data->sensors)
1388 return -ENOMEM;
1389
1390 status = setup_lock_data(dev);
1391 if (status) {
1392 dev_err(dev, "Failed to setup state/EC locking: %d", status);
1393 return status;
1394 }
1395
1396 setup_sensor_data(ec_data);
1397 ec_data->registers = devm_kcalloc(dev, ec_data->nr_registers,
1398 sizeof(u16), GFP_KERNEL);
1399 ec_data->read_buffer = devm_kcalloc(dev, ec_data->nr_registers,
1400 sizeof(u8), GFP_KERNEL);
1401
1402 if (!ec_data->registers || !ec_data->read_buffer)
1403 return -ENOMEM;
1404
1405 fill_ec_registers(ec_data);
1406
1407 for (i = 0; i < ec_data->nr_sensors; ++i) {
1408 si = get_sensor_info(ec_data, i);
1409 if (!nr_count[si->type])
1410 ++nr_types;
1411 ++nr_count[si->type];
1412 }
1413
1414 if (nr_count[hwmon_temp])
1415 nr_count[hwmon_chip]++, nr_types++;
1416
1417 asus_ec_hwmon_chan = devm_kcalloc(
1418 dev, nr_types, sizeof(*asus_ec_hwmon_chan), GFP_KERNEL);
1419 if (!asus_ec_hwmon_chan)
1420 return -ENOMEM;
1421
1422 ptr_asus_ec_ci = devm_kcalloc(dev, nr_types + 1,
1423 sizeof(*ptr_asus_ec_ci), GFP_KERNEL);
1424 if (!ptr_asus_ec_ci)
1425 return -ENOMEM;
1426
1427 asus_ec_chip_info.info = ptr_asus_ec_ci;
1428 chip_info = &asus_ec_chip_info;
1429
1430 for (type = 0; type < hwmon_max; ++type) {
1431 if (!nr_count[type])
1432 continue;
1433
1434 asus_ec_hwmon_add_chan_info(asus_ec_hwmon_chan, dev,
1435 nr_count[type], type,
1436 hwmon_attributes[type]);
1437 *ptr_asus_ec_ci++ = asus_ec_hwmon_chan++;
1438 }
1439
1440 dev_info(dev, "board has %d EC sensors that span %d registers",
1441 ec_data->nr_sensors, ec_data->nr_registers);
1442
1443 hwdev = devm_hwmon_device_register_with_info(dev, "asusec",
1444 ec_data, chip_info, NULL);
1445
1446 return PTR_ERR_OR_ZERO(hwdev);
1447 }
1448
1449 MODULE_DEVICE_TABLE(dmi, dmi_table);
1450
1451 static struct platform_driver asus_ec_sensors_platform_driver = {
1452 .driver = {
1453 .name = "asus-ec-sensors",
1454 },
1455 .probe = asus_ec_probe,
1456 };
1457
1458 static struct platform_device *asus_ec_sensors_platform_device;
1459
asus_ec_init(void)1460 static int __init asus_ec_init(void)
1461 {
1462 asus_ec_sensors_platform_device =
1463 platform_create_bundle(&asus_ec_sensors_platform_driver,
1464 asus_ec_probe, NULL, 0, NULL, 0);
1465
1466 if (IS_ERR(asus_ec_sensors_platform_device))
1467 return PTR_ERR(asus_ec_sensors_platform_device);
1468
1469 return 0;
1470 }
1471
asus_ec_exit(void)1472 static void __exit asus_ec_exit(void)
1473 {
1474 platform_device_unregister(asus_ec_sensors_platform_device);
1475 platform_driver_unregister(&asus_ec_sensors_platform_driver);
1476 }
1477
1478 module_init(asus_ec_init);
1479 module_exit(asus_ec_exit);
1480
1481 module_param_named(mutex_path, mutex_path_override, charp, 0);
1482 MODULE_PARM_DESC(mutex_path,
1483 "Override ACPI mutex path used to guard access to hardware");
1484
1485 MODULE_AUTHOR("Eugene Shalygin <eugene.shalygin@gmail.com>");
1486 MODULE_DESCRIPTION(
1487 "HWMON driver for sensors accessible via ACPI EC in ASUS motherboards");
1488 MODULE_LICENSE("GPL");
1489