Home
last modified time | relevance | path

Searched refs:dst_y_per_row_flip (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddml_display_rq_dlg_calc.c229 dml_float_t dst_y_per_row_flip; in dml_rq_dlg_get_dlg_reg() local
344 dst_y_per_row_flip = dml_get_dst_y_per_row_flip(mode_lib, pipe_idx); in dml_rq_dlg_get_dlg_reg()
354 dml_print("DML_DLG: %s: dst_y_per_row_flip = %3.2f\n", __func__, dst_y_per_row_flip); in dml_rq_dlg_get_dlg_reg()
420 disp_dlg_regs->dst_y_per_row_flip = (dml_uint_t)(dst_y_per_row_flip * dml_pow(2, 2)); in dml_rq_dlg_get_dlg_reg()
428 …DLG: %s: disp_dlg_regs->dst_y_per_row_flip = 0x%x\n", __func__, disp_dlg_regs->dst_y_per_row_flip); in dml_rq_dlg_get_dlg_reg()
H A Ddml2_translation_helper.c1481 out->dlg_regs.dst_y_per_row_flip = disp_dlg_regs->dst_y_per_row_flip; in dml2_update_pipe_ctx_dchub_regs()
H A Ddisplay_mode_core_structs.h1941 dml_uint_t dst_y_per_row_flip; member
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn6_calcs_dchub.c541 double *dst_y_per_row_flip, in dcn6_calculate_flip_schedule()
640 *dst_y_per_row_flip = math_ceil2(4.0 * (l->Tr0_flip / LineTime), 1.0) / 4.0; in dcn6_calculate_flip_schedule()
643 l->dpte_row_bytes * HostVMInefficiencyFactor / (*dst_y_per_row_flip * LineTime)); in dcn6_calculate_flip_schedule()
645 …if (*dst_y_per_vm_flip >= 32 || *dst_y_per_row_flip >= 16 || l->Tvm_flip + 2 * l->Tr0_flip > l->mi… in dcn6_calculate_flip_schedule()
654 *dst_y_per_row_flip = 0; in dcn6_calculate_flip_schedule()
662 *dst_y_per_row_flip = 0; in dcn6_calculate_flip_schedule()
668 …_LOG_VERBOSE("DML::%s: dst_y_per_row_flip = %f (should be < 16)\n", __func__, *dst_y_per_row_flip); in dcn6_calculate_flip_schedule()
798 l->dst_y_per_row_flip = mode_lib->mp.dst_y_per_row_flip[mode_lib->mp.pipe_plane[pipe_idx]]; in dcn6_rq_dlg_get_dlg_reg()
802 DML_LOG_VERBOSE("DML_DLG: %s: dst_y_per_row_flip = %3.2f\n", __func__, l->dst_y_per_row_flip); in dcn6_rq_dlg_get_dlg_reg()
866 disp_dlg_regs->dst_y_per_row_flip = (unsigned int)(l->dst_y_per_row_flip * math_pow(2, 2)); in dcn6_rq_dlg_get_dlg_reg()
[all …]
H A Ddml2_core_shared_types.h481 double dst_y_per_row_flip[DML2_MAX_PLANES]; member
983 double dst_y_per_row_flip[DML2_MAX_PLANES]; member
1697 double dst_y_per_row_flip; member
1743 double *dst_y_per_row_flip; member
H A Ddml2_core_dcn5_calcs_dchub.c4013 double *dst_y_per_row_flip, in dcn5_calculate_flip_schedule()
4115 *dst_y_per_row_flip = 1; // not used in dcn5_calculate_flip_schedule()
4141 *dst_y_per_row_flip = math_ceil2(4.0 * (l->Tr0_flip / LineTime), 1.0) / 4.0; in dcn5_calculate_flip_schedule()
4144 …(l->dpte_row_bytes * HostVMInefficiencyFactor + meta_row_bytes) / (*dst_y_per_row_flip * LineTime)… in dcn5_calculate_flip_schedule()
4146 …if (*dst_y_per_vm_flip >= 32 || *dst_y_per_row_flip >= 16 || l->Tvm_flip + 2 * l->Tr0_flip > l->mi… in dcn5_calculate_flip_schedule()
4155 *dst_y_per_row_flip = 0; in dcn5_calculate_flip_schedule()
4164 *dst_y_per_row_flip = 0; in dcn5_calculate_flip_schedule()
4171 …_LOG_VERBOSE("DML::%s: dst_y_per_row_flip = %f (should be < 16)\n", __func__, *dst_y_per_row_flip); in dcn5_calculate_flip_schedule()
4690 …p->TimePerMetaChunkFlip[k] = p->dst_y_per_row_flip[k] * p->display_cfg->stream_descriptors[p->disp… in dcn5_calculate_meta_and_pte_times()
4713 …p->TimePerChromaMetaChunkFlip[k] = p->dst_y_per_row_flip[k] * p->display_cfg->stream_descriptors[p… in dcn5_calculate_meta_and_pte_times()
[all …]
H A Ddml2_core_dcn5_funcs_mode_programming.c954 &mode_lib->mp.dst_y_per_row_flip[k], in dcn5_mode_programming()
1186 CalculateMetaAndPTETimes_params->dst_y_per_row_flip = mode_lib->mp.dst_y_per_row_flip; in dcn5_mode_programming()
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_structs.h632 unsigned int dst_y_per_row_flip; member
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc.c7693 state->hubp[i].dst_y_per_row_flip = pipe_ctx->dlg_regs.dst_y_per_row_flip; in dc_capture_register_software_state()