Searched refs:dscclk_mhz (Results 1 – 11 of 11) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | dcn31_fpu.c | 129 .dscclk_mhz = 186.0, 138 .dscclk_mhz = 209.0, 147 .dscclk_mhz = 209.0, 156 .dscclk_mhz = 371.0, 165 .dscclk_mhz = 417.0, 373 .dscclk_mhz = 186.0, 382 .dscclk_mhz = 209.0, 391 .dscclk_mhz = 209.0, 400 .dscclk_mhz = 371.0, 409 .dscclk_mhz = 417.0, [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 231 .dscclk_mhz = 171.0, 242 .dscclk_mhz = 214.0, 253 .dscclk_mhz = 245.0, 264 .dscclk_mhz = 367.0, 275 .dscclk_mhz = 428.0, 287 .dscclk_mhz = 428.0, 342 .dscclk_mhz = 171.0, 353 .dscclk_mhz = 214.0, 364 .dscclk_mhz = 245.0, 375 .dscclk_mhz = 367.0, [all …]
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_socbb.h | 28 uint32_t dscclk_mhz; member
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn201/ |
| H A D | dcn201_resource.c | 143 .dscclk_mhz = 400.0, 154 .dscclk_mhz = 400.0, 165 .dscclk_mhz = 400.0, 176 .dscclk_mhz = 400.0, 188 .dscclk_mhz = 400.0,
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | dml2_translation_helper.c | 364 p->in_states->state_array[0].dscclk_mhz = 716.667; in dml2_init_soc_states() 400 p->in_states->state_array[0].dscclk_mhz = 573.333; in dml2_init_soc_states() 437 p->in_states->state_array[0].dscclk_mhz = 666.667; //716.667; in dml2_init_soc_states() 599 p->out_states->state_array[i].dscclk_mhz = max_dispclk_mhz / 3.0; in dml2_init_soc_states() 732 out->state_array[i].dscclk_mhz = dc->dml.soc.clock_limits[i].dscclk_mhz; in dml2_translate_soc_states()
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| H A D | display_mode_util.c | 636 dml_print("DML: state_bbox: dscclk_mhz = %f\n", state->dscclk_mhz); in dml_print_soc_state_bounding_box()
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| H A D | display_mode_core_structs.h | 279 dml_float_t dscclk_mhz; member
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| H A D | display_mode_core.c | 7503 …Factor > (1.0 - mode_lib->ms.soc.dcn_downspread_percent / 100.0) * mode_lib->ms.state.dscclk_mhz) { in dml_core_mode_support() 7506 …_print("DML::%s: k=%u, DSCCLKPerState = %f\n", __func__, k, mode_lib->ms.state.dscclk_mhz); in dml_core_mode_support() 7512 …Factor > (1.0 - mode_lib->ms.soc.dcn_downspread_percent / 100.0) * mode_lib->ms.state.dscclk_mhz) { in dml_core_mode_support() 7516 …Factor > (1.0 - mode_lib->ms.soc.dcn_downspread_percent / 100.0) * mode_lib->ms.state.dscclk_mhz) { in dml_core_mode_support()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_structs.h | 158 double dscclk_mhz; member
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| H A D | display_mode_vba.c | 402 mode_lib->vba.MaxDSCCLK[i] = soc->clock_limits[i].dscclk_mhz; in fetch_socbb_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 138 .dscclk_mhz = 716.667, 2847 entry.dscclk_mhz = max_clk_data.dispclk_mhz / 3; in build_synthetic_soc_states() 3239 dcn3_2_soc.clock_limits[i].dscclk_mhz = max_dispclk_mhz / 3; in dcn32_update_bw_bounding_box_fpu()
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