| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_dmub_srv.c | 47 struct dmub_srv *dmub) in dc_dmub_srv_construct()
60 struct dc_dmub_srv *dc_dmub_srv_create(struct dc *dc, struct dmub_srv *dmub) in dc_dmub_srv_create()
75 void dc_dmub_srv_destroy(struct dc_dmub_srv **dmub_srv) in dc_dmub_srv_destroy() argument
77 if (*dmub_srv) { in dc_dmub_srv_destroy()
78 kfree(*dmub_srv); in dc_dmub_srv_destroy()
79 *dmub_srv = NULL; in dc_dmub_srv_destroy()
85 struct dmub_srv *dmub; in dc_dmub_srv_wait_for_pending()
109 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_clear_inbox0_ack()
122 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_wait_for_inbox0_ack()
136 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_send_inbox0_cmd()
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| H A D | dc_types.h | 825 struct dc_dmub_srv *dmub_srv; member
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| /linux/drivers/gpu/drm/amd/display/dmub/src/ |
| H A D | dmub_reg.h | 31 struct dmub_srv;
114 void dmub_reg_set(struct dmub_srv *srv, uint32_t addr, uint32_t reg_val, int n,
117 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1,
120 void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift,
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| H A D | dmub_dcn351.h | 9 struct dmub_srv;
11 void dmub_srv_dcn351_regs_init(struct dmub_srv *dmub, struct dc_context *ctx);
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| H A D | dmub_dcn30.h | 37 void dmub_dcn30_backdoor_load(struct dmub_srv *dmub,
41 void dmub_dcn30_setup_windows(struct dmub_srv *dmub,
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| H A D | dmub_reg.c | 72 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1, in dmub_reg_update()
89 void dmub_reg_set(struct dmub_srv *srv, uint32_t addr, uint32_t reg_val, int n, in dmub_reg_set()
104 void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift, in dmub_reg_get()
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| H A D | dmub_dcn314.h | 33 bool dmub_dcn314_is_psrsu_supported(struct dmub_srv *dmub);
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| H A D | dmub_dcn314.c | 64 bool dmub_dcn314_is_psrsu_supported(struct dmub_srv *dmub) in dmub_dcn314_is_psrsu_supported()
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| H A D | dmub_dcn351.c | 16 void dmub_srv_dcn351_regs_init(struct dmub_srv *dmub, struct dc_context *ctx) in dmub_srv_dcn351_regs_init()
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dmub_outbox.c | 39 void dmub_enable_outbox_notification(struct dc_dmub_srv *dmub_srv) in dmub_enable_outbox_notification() argument
51 dc_wake_and_execute_dmub_cmd(dmub_srv->ctx, &cmd, DM_DMUB_WAIT_TYPE_WAIT); in dmub_enable_outbox_notification()
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| H A D | dmub_outbox.h | 31 void dmub_enable_outbox_notification(struct dc_dmub_srv *dmub_srv);
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| H A D | dmub_psr.c | 199 dc_wake_and_execute_dmub_cmd(dc->dmub_srv->ctx, &cmd, DM_DMUB_WAIT_TYPE_WAIT); in dmub_psr_enable()
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| /linux/drivers/gpu/drm/amd/display/dmub/ |
| H A D | dmub_srv_stat.h | 38 enum dmub_status dmub_srv_stat_get_notification(struct dmub_srv *dmub,
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| H A D | dcn32_hwseq.c | 268 if (!dc->ctx->dmub_srv) in dcn32_apply_idle_power_optimizations()
357 if (!dc->ctx || !dc->ctx->dmub_srv) in dcn32_commit_subvp_config()
424 dmub_hw_lock_mgr_inbox0_cmd(dc->ctx->dmub_srv, hw_lock_cmd); in dcn32_subvp_pipe_control_lock()
442 dmub_hw_lock_mgr_inbox0_cmd(dc->ctx->dmub_srv, hw_lock_cmd); in dcn32_subvp_pipe_control_lock_fast()
993 if (dc->ctx->dmub_srv) { in dcn32_init_hw()
994 dc_dmub_srv_query_caps_cmd(dc->ctx->dmub_srv); in dcn32_init_hw()
995 dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr; in dcn32_init_hw()
996 dc->caps.dmub_caps.subvp_psr = dc->ctx->dmub_srv->dmub->feature_caps.subvp_psr_support; in dcn32_init_hw()
997 dc->caps.dmub_caps.gecc_enable = dc->ctx->dmub_srv->dmub->feature_caps.gecc_enable; in dcn32_init_hw()
998 dc->caps.dmub_caps.mclk_sw = dc->ctx->dmub_srv->dmub->feature_caps.fw_assisted_mclk_switch_ver; in dcn32_init_hw()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_panel_cntl.c | 44 struct dc_dmub_srv *dc_dmub_srv = panel_cntl->ctx->dmub_srv; in dcn31_query_backlight_info()
71 struct dc_dmub_srv *dc_dmub_srv = panel_cntl->ctx->dmub_srv; in dcn31_panel_cntl_hw_init()
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm.h | 95 struct dmub_srv;
362 struct dmub_srv *dmub_srv; member
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| H A D | amdgpu_dm.c | 1247 struct dmub_srv *dmub_srv = adev->dm.dmub_srv; in dm_dmub_hw_init() local
1260 if (!dmub_srv) in dm_dmub_hw_init()
1276 if (dmub_srv->hw_funcs.init_reg_offsets) in dm_dmub_hw_init()
1277 dmub_srv->hw_funcs.init_reg_offsets(dmub_srv, ctx); in dm_dmub_hw_init()
1279 status = dmub_srv_has_hw_support(dmub_srv, &has_hw_support); in dm_dmub_hw_init()
1291 status = dmub_srv_hw_reset(dmub_srv); in dm_dmub_hw_init()
1378 status = dmub_srv_hw_init(dmub_srv, &hw_params); in dm_dmub_hw_init()
1385 status = dmub_srv_wait_for_auto_load(dmub_srv, 100000); in dm_dmub_hw_init()
1395 if (!adev->dm.dc->ctx->dmub_srv) in dm_dmub_hw_init()
1396 adev->dm.dc->ctx->dmub_srv = dc_dmub_srv_create(adev->dm.dc, dmub_srv); in dm_dmub_hw_init()
[all …]
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| H A D | amdgpu_dm_debugfs.c | 924 if (adev->dm.dmub_srv) in dmub_tracebuffer_show()
925 fw_meta_info = &adev->dm.dmub_srv->meta_info; in dmub_tracebuffer_show()
1034 if (dc->ctx->dmub_srv && dc->ctx->dmub_srv->dmub) in replay_capability_show()
1036 (bool)dc->ctx->dmub_srv->dmub->feature_caps.replay_supported; in replay_capability_show()
2692 dc_dmub_srv = dc->ctx->dmub_srv; in ips_status_show()
3311 struct dmub_srv *srv = adev->dm.dc->ctx->dmub_srv->dmub; in dmub_trace_mask_set()
3355 struct dmub_srv *srv = adev->dm.dc->ctx->dmub_srv->dmub; in dmub_trace_mask_show()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| H A D | dcn35_hwseq.c | 269 if (dc->ctx->dmub_srv) { in dcn35_init_hw()
313 if (dc->ctx->dmub_srv) { in dcn35_init_hw()
314 dc_dmub_srv_query_caps_cmd(dc->ctx->dmub_srv); in dcn35_init_hw()
315 dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr; in dcn35_init_hw()
316 dc->caps.dmub_caps.mclk_sw = dc->ctx->dmub_srv->dmub->feature_caps.fw_assisted_mclk_switch_ver; in dcn35_init_hw()
317 …dc->caps.dmub_caps.aux_backlight_support = dc->ctx->dmub_srv->dmub->feature_caps.abm_aux_backlight… in dcn35_init_hw()
1622 volatile struct dmub_cursor_offload_v1 *cs = dc->ctx->dmub_srv->dmub->cursor_offload_v1; in dcn35_begin_cursor_offload_update()
1645 volatile struct dmub_cursor_offload_v1 *cs = dc->ctx->dmub_srv->dmub->cursor_offload_v1; in dcn35_commit_cursor_offload_update()
1663 …shared_stream = &dc->ctx->dmub_srv->dmub->shared_state[DMUB_SHARED_STATE_FEATURE__CURSOR_OFFLOAD_V… in dcn35_commit_cursor_offload_update()
1674 volatile struct dmub_cursor_offload_v1 *cs = dc->ctx->dmub_srv->dmub->cursor_offload_v1; in dcn35_update_cursor_offload_pipe()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn31/ |
| H A D | dcn31_hwseq.c | 274 dc_dmub_srv_query_caps_cmd(dc->ctx->dmub_srv); in dcn31_init_hw()
275 dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr; in dcn31_init_hw()
276 dc->caps.dmub_caps.mclk_sw = dc->ctx->dmub_srv->dmub->feature_caps.fw_assisted_mclk_switch_ver; in dcn31_init_hw()
436 if (!dc_dmub_srv_is_restore_required(dc->ctx->dmub_srv)) in dcn31_z10_restore()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc.c | 559 dc_stream_forward_dmub_crc_window(struct dc_dmub_srv *dmub_srv, in dc_stream_forward_dmub_crc_window() argument
579 dc_wake_and_execute_dmub_cmd(dmub_srv->ctx, &cmd, DM_DMUB_WAIT_TYPE_NO_WAIT); in dc_stream_forward_dmub_crc_window()
597 struct dc_dmub_srv *dmub_srv; in dc_stream_forward_crc_window() local
617 dmub_srv = dc->ctx->dmub_srv; in dc_stream_forward_crc_window()
620 if (dmub_srv) in dc_stream_forward_crc_window()
621 dc_stream_forward_dmub_crc_window(dmub_srv, rect, &mux_mapping, is_stop); in dc_stream_forward_crc_window()
632 dc_stream_forward_dmub_multiple_crc_window(struct dc_dmub_srv *dmub_srv, in dc_stream_forward_dmub_multiple_crc_window() argument
656 dc_wake_and_execute_dmub_cmd(dmub_srv->ctx, &cmd, DM_DMUB_WAIT_TYPE_NO_WAIT); in dc_stream_forward_dmub_multiple_crc_window()
663 struct dc_dmub_srv *dmub_srv; in dc_stream_forward_multiple_crc_window() local
682 dmub_srv = dc->ctx->dmub_srv; in dc_stream_forward_multiple_crc_window()
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| H A D | dc_stream.c | 285 if (dc->ctx->dmub_srv) in program_cursor_attributes()
436 if (dc->ctx->dmub_srv) in program_cursor_position()
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| H A D | dc_hw_sequencer.c | 645 if (!dc->ctx || !dc->ctx->dmub_srv || !pipe_ctx || !vba) in set_p_state_switch_method()
718 if (!dc->ctx || !dc->ctx->dmub_srv || !pipe_ctx || !context || !dc->debug.fams2_config.bits.enable) in get_fams2_visual_confirm_color()
813 block_sequence[*num_steps].params.subvp_save_surf_addr.dc_dmub_srv = dc->ctx->dmub_srv; in hwss_build_fast_sequence()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 358 if (dc->ctx->dmub_srv) { in dcn401_init_hw()
359 dc_dmub_srv_query_caps_cmd(dc->ctx->dmub_srv); in dcn401_init_hw()
360 dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr; in dcn401_init_hw()
361 …dc->caps.dmub_caps.mclk_sw = dc->ctx->dmub_srv->dmub->feature_caps.fw_assisted_mclk_switch_ver > 0; in dcn401_init_hw()
362 dc->caps.dmub_caps.fams_ver = dc->ctx->dmub_srv->dmub->feature_caps.fw_assisted_mclk_switch_ver; in dcn401_init_hw()
1285 if (!dc->ctx->dmub_srv || !dc->current_state) in dcn401_apply_idle_power_optimizations()
1491 if (!dc->ctx || !dc->ctx->dmub_srv) in dcn401_dmub_hw_control_lock()
1501 dmub_hw_lock_mgr_inbox0_cmd(dc->ctx->dmub_srv, hw_lock_cmd); in dcn401_dmub_hw_control_lock()
1516 dmub_hw_lock_mgr_inbox0_cmd(dc->ctx->dmub_srv, hw_lock_cmd); in dcn401_dmub_hw_control_lock_fast()
1524 if (!dc->ctx || !dc->ctx->dmub_srv || !dc->debug.fams2_config.bits.enable) in dcn401_fams2_update_config()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/ |
| H A D | dcn30_hwseq.c | 828 dc_dmub_srv_query_caps_cmd(dc->ctx->dmub_srv); in dcn30_init_hw()
829 dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr; in dcn30_init_hw()
830 dc->caps.dmub_caps.mclk_sw = dc->ctx->dmub_srv->dmub->feature_caps.fw_assisted_mclk_switch_ver; in dcn30_init_hw()
921 if (!dc->ctx->dmub_srv) in dcn30_apply_idle_power_optimizations()
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