| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn351/ |
| H A D | dcn351_fpu.c | 390 dc->dml2_options.bbox_overrides.clks_table.num_states = in dcn351_update_bw_bounding_box_fpu()
392 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dcfclk_mhz = in dcn351_update_bw_bounding_box_fpu()
394 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].fclk_mhz = in dcn351_update_bw_bounding_box_fpu()
396 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dispclk_mhz = in dcn351_update_bw_bounding_box_fpu()
398 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dppclk_mhz = in dcn351_update_bw_bounding_box_fpu()
400 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].socclk_mhz = in dcn351_update_bw_bounding_box_fpu()
402 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].memclk_mhz = in dcn351_update_bw_bounding_box_fpu()
404 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dram_speed_mts = clock_limits[i].dram_speed_mts; in dcn351_update_bw_bounding_box_fpu()
405 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dtbclk_mhz = in dcn351_update_bw_bounding_box_fpu()
407 dc->dml2_options in dcn351_update_bw_bounding_box_fpu()
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn35/ |
| H A D | dcn35_fpu.c | 357 dc->dml2_options.bbox_overrides.clks_table.num_states = in dcn35_update_bw_bounding_box_fpu()
359 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dcfclk_mhz = in dcn35_update_bw_bounding_box_fpu()
361 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].fclk_mhz = in dcn35_update_bw_bounding_box_fpu()
363 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dispclk_mhz = in dcn35_update_bw_bounding_box_fpu()
365 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dppclk_mhz = in dcn35_update_bw_bounding_box_fpu()
367 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].socclk_mhz = in dcn35_update_bw_bounding_box_fpu()
369 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].memclk_mhz = in dcn35_update_bw_bounding_box_fpu()
372 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dram_speed_mts = clock_limits[i].dram_speed_mts; in dcn35_update_bw_bounding_box_fpu()
373 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dtbclk_mhz = in dcn35_update_bw_bounding_box_fpu()
375 dc->dml2_options in dcn35_update_bw_bounding_box_fpu()
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| H A D | dcn321_resource.c | 1622 dml2_reinit(dc, &dc->dml2_options, &dc->current_state->bw_ctx.dml2); in dcn321_update_bw_bounding_box()
2061 dc->dml2_options.dcn_pipe_count = pool->base.pipe_count; in dcn321_resource_construct()
2062 dc->dml2_options.use_native_soc_bb_construction = true; in dcn321_resource_construct()
2063 dc->dml2_options.minimize_dispclk_using_odm = true; in dcn321_resource_construct()
2065 resource_init_common_dml2_callbacks(dc, &dc->dml2_options); in dcn321_resource_construct()
2066 dc->dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch = &dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch; in dcn321_resource_construct()
2067 dc->dml2_options.svp_pstate.callbacks.release_dsc = &dcn20_release_dsc; in dcn321_resource_construct()
2068 dc->dml2_options.svp_pstate.callbacks.calculate_mall_ways_from_bytes = pool->base.funcs->calculate_mall_ways_from_bytes; in dcn321_resource_construct()
2070 dc->dml2_options.svp_pstate.subvp_fw_processing_delay_us = dc->caps.subvp_fw_processing_delay_us; in dcn321_resource_construct()
2071 dc->dml2_options in dcn321_resource_construct()
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| H A D | dcn401_resource.c | 1659 dml2_reinit(dc, &dc->dml2_options, &dc->current_state->bw_ctx.dml2); in dcn401_update_bw_bounding_box()
2283 dc->dml2_options.dcn_pipe_count = pool->base.pipe_count; in dcn401_resource_construct()
2284 dc->dml2_options.use_native_soc_bb_construction = true; in dcn401_resource_construct()
2285 dc->dml2_options.minimize_dispclk_using_odm = true; in dcn401_resource_construct()
2286 dc->dml2_options.map_dc_pipes_with_callbacks = true; in dcn401_resource_construct()
2287 dc->dml2_options.force_tdlut_enable = true; in dcn401_resource_construct()
2289 resource_init_common_dml2_callbacks(dc, &dc->dml2_options); in dcn401_resource_construct()
2290 dc->dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch = &dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch; in dcn401_resource_construct()
2291 dc->dml2_options.svp_pstate.callbacks.release_dsc = &dcn20_release_dsc; in dcn401_resource_construct()
2292 dc->dml2_options in dcn401_resource_construct()
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.c | 2107 dml2_reinit(dc, &dc->dml2_options, &dc->current_state->bw_ctx.dml2); in dcn32_update_bw_bounding_box()
2567 dc->dml2_options.dcn_pipe_count = pool->base.pipe_count; in dcn32_resource_construct()
2568 dc->dml2_options.use_native_soc_bb_construction = true; in dcn32_resource_construct()
2569 dc->dml2_options.minimize_dispclk_using_odm = true; in dcn32_resource_construct()
2571 resource_init_common_dml2_callbacks(dc, &dc->dml2_options); in dcn32_resource_construct()
2572 dc->dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch = &dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch; in dcn32_resource_construct()
2573 dc->dml2_options.svp_pstate.callbacks.release_dsc = &dcn20_release_dsc; in dcn32_resource_construct()
2574 dc->dml2_options.svp_pstate.callbacks.calculate_mall_ways_from_bytes = pool->base.funcs->calculate_mall_ways_from_bytes; in dcn32_resource_construct()
2576 dc->dml2_options.svp_pstate.subvp_fw_processing_delay_us = dc->caps.subvp_fw_processing_delay_us; in dcn32_resource_construct()
2577 dc->dml2_options in dcn32_resource_construct()
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_resource.c | 5651 void resource_init_common_dml2_callbacks(struct dc *dc, struct dml2_configuration_options *dml2_options) in resource_init_common_dml2_callbacks()
5653 dml2_options->callbacks.dc = dc; in resource_init_common_dml2_callbacks()
5654 dml2_options->callbacks.build_scaling_params = &resource_build_scaling_params; in resource_init_common_dml2_callbacks()
5655 dml2_options->callbacks.build_test_pattern_params = &resource_build_test_pattern_params; in resource_init_common_dml2_callbacks()
5656 dml2_options->callbacks.acquire_secondary_pipe_for_mpc_odm = &dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy; in resource_init_common_dml2_callbacks()
5657 dml2_options->callbacks.update_pipes_for_stream_with_slice_count = &resource_update_pipes_for_stream_with_slice_count; in resource_init_common_dml2_callbacks()
5658 dml2_options->callbacks.update_pipes_for_plane_with_slice_count = &resource_update_pipes_for_plane_with_slice_count; in resource_init_common_dml2_callbacks()
5659 dml2_options->callbacks.get_mpc_slice_index = &resource_get_mpc_slice_index; in resource_init_common_dml2_callbacks()
5660 dml2_options->callbacks.get_mpc_slice_count = &resource_get_mpc_slice_count; in resource_init_common_dml2_callbacks()
5661 dml2_options in resource_init_common_dml2_callbacks()
5638 resource_init_common_dml2_callbacks(struct dc * dc,struct dml2_configuration_options * dml2_options) resource_init_common_dml2_callbacks() argument
[all...] |
| H A D | dc_vm_helper.c | 50 dc->dml2_options.gpuvm_enable = true; in dc_setup_system_context()
|
| H A D | dc_state.c | 212 status = dml2_create(dc, &dc->dml2_options, &state->bw_ctx.dml2); in dc_state_create()
|
| H A D | dc.c | 1037 dc->dml2_options.bb_from_dmub = init_params->bb_from_dmub; in dc_construct_ctx()
1039 dc->dml2_options.bb_from_dmub = NULL; in dc_construct_ctx()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| H A D | dcn35_resource.c | 2233 dc->dml2_options.dcn_pipe_count = pool->base.pipe_count; in dcn35_resource_construct()
2234 dc->dml2_options.use_native_soc_bb_construction = true; in dcn35_resource_construct()
2235 dc->dml2_options.minimize_dispclk_using_odm = false; in dcn35_resource_construct()
2237 dc->dml2_options.minimize_dispclk_using_odm = true; in dcn35_resource_construct()
2238 dc->dml2_options.enable_windowed_mpo_odm = dc->config.enable_windowed_mpo_odm; in dcn35_resource_construct()
2240 resource_init_common_dml2_callbacks(dc, &dc->dml2_options); in dcn35_resource_construct()
2241 dc->dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch = &dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch; in dcn35_resource_construct()
2243 dc->dml2_options.max_segments_per_hubp = 24; in dcn35_resource_construct()
2244 dc->dml2_options.det_segment_size = DCN3_2_DET_SEG_SIZE;/*todo*/ in dcn35_resource_construct()
2245 dc->dml2_options in dcn35_resource_construct()
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| H A D | dcn351_resource.c | 2206 dc->dml2_options.dcn_pipe_count = pool->base.pipe_count; in dcn351_resource_construct()
2207 dc->dml2_options.use_native_soc_bb_construction = true; in dcn351_resource_construct()
2208 dc->dml2_options.minimize_dispclk_using_odm = false; in dcn351_resource_construct()
2210 dc->dml2_options.minimize_dispclk_using_odm = true; in dcn351_resource_construct()
2211 dc->dml2_options.enable_windowed_mpo_odm = dc->config.enable_windowed_mpo_odm; in dcn351_resource_construct()
2213 resource_init_common_dml2_callbacks(dc, &dc->dml2_options); in dcn351_resource_construct()
2214 dc->dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch = &dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch; in dcn351_resource_construct()
2216 dc->dml2_options.max_segments_per_hubp = 24; in dcn351_resource_construct()
2217 dc->dml2_options.det_segment_size = DCN3_2_DET_SEG_SIZE;/*todo*/ in dcn351_resource_construct()
2218 dc->dml2_options in dcn351_resource_construct()
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn36/ |
| H A D | dcn36_resource.c | 2203 dc->dml2_options.dcn_pipe_count = pool->base.pipe_count; in dcn36_resource_construct()
2204 dc->dml2_options.use_native_soc_bb_construction = true; in dcn36_resource_construct()
2205 dc->dml2_options.minimize_dispclk_using_odm = false; in dcn36_resource_construct()
2207 dc->dml2_options.minimize_dispclk_using_odm = true; in dcn36_resource_construct()
2208 dc->dml2_options.enable_windowed_mpo_odm = dc->config.enable_windowed_mpo_odm; in dcn36_resource_construct()
2210 resource_init_common_dml2_callbacks(dc, &dc->dml2_options); in dcn36_resource_construct()
2211 dc->dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch = &dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch; in dcn36_resource_construct()
2213 dc->dml2_options.max_segments_per_hubp = 24; in dcn36_resource_construct()
2214 dc->dml2_options.det_segment_size = DCN3_2_DET_SEG_SIZE;/*todo*/ in dcn36_resource_construct()
2215 dc->dml2_options in dcn36_resource_construct()
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc.h | 1870 struct dml2_configuration_options dml2_options;
1824 struct dml2_configuration_options dml2_options; global() member
|