1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ASM_S390_PCI_H
3 #define __ASM_S390_PCI_H
4
5 #include <linux/pci.h>
6 #include <linux/mutex.h>
7 #include <linux/iommu.h>
8 #include <linux/irqdomain.h>
9 #include <linux/pci_hotplug.h>
10 #include <asm/pci_clp.h>
11 #include <asm/pci_debug.h>
12 #include <asm/pci_insn.h>
13 #include <asm/sclp.h>
14
15 #define ARCH_GENERIC_PCI_MMAP_RESOURCE 1
16 #define arch_can_pci_mmap_wc() 1
17
18 #define PCIBIOS_MIN_IO 0x1000
19 #define PCIBIOS_MIN_MEM 0x10000000
20
21 #define pcibios_assign_all_busses() (0)
22
23 void __iomem *pci_iomap(struct pci_dev *, int, unsigned long);
24 void pci_iounmap(struct pci_dev *, void __iomem *);
25 int pci_domain_nr(struct pci_bus *);
26 int pci_proc_domain(struct pci_bus *);
27
28 #define ZPCI_BUS_NR 0 /* default bus number */
29
30 #define ZPCI_NR_DMA_SPACES 1
31 #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS
32 #define ZPCI_DOMAIN_BITMAP_SIZE (1 << 16)
33
34 #ifdef PCI
35 #if (ZPCI_NR_DEVICES > ZPCI_DOMAIN_BITMAP_SIZE)
36 # error ZPCI_NR_DEVICES can not be bigger than ZPCI_DOMAIN_BITMAP_SIZE
37 #endif
38 #endif /* PCI */
39
40 /* PCI Function Controls */
41 #define ZPCI_FC_FN_ENABLED 0x80
42 #define ZPCI_FC_ERROR 0x40
43 #define ZPCI_FC_BLOCKED 0x20
44 #define ZPCI_FC_DMA_ENABLED 0x10
45
46 #define ZPCI_FMB_DMA_COUNTER_VALID (1 << 23)
47
48 struct zpci_fmb_fmt0 {
49 u64 dma_rbytes;
50 u64 dma_wbytes;
51 };
52
53 struct zpci_fmb_fmt1 {
54 u64 rx_bytes;
55 u64 rx_packets;
56 u64 tx_bytes;
57 u64 tx_packets;
58 };
59
60 struct zpci_fmb_fmt2 {
61 u64 consumed_work_units;
62 u64 max_work_units;
63 };
64
65 struct zpci_fmb_fmt3 {
66 u64 tx_bytes;
67 };
68
69 struct zpci_fmb {
70 u32 format : 8;
71 u32 fmt_ind : 24;
72 u32 samples;
73 u64 last_update;
74 /* common counters */
75 u64 ld_ops;
76 u64 st_ops;
77 u64 stb_ops;
78 u64 rpcit_ops;
79 /* format specific counters */
80 union {
81 struct zpci_fmb_fmt0 fmt0;
82 struct zpci_fmb_fmt1 fmt1;
83 struct zpci_fmb_fmt2 fmt2;
84 struct zpci_fmb_fmt3 fmt3;
85 };
86 } __packed __aligned(128);
87
88 enum zpci_state {
89 ZPCI_FN_STATE_STANDBY = 0,
90 ZPCI_FN_STATE_CONFIGURED = 1,
91 ZPCI_FN_STATE_RESERVED = 2,
92 };
93
94 struct zpci_bar_struct {
95 struct resource *res; /* bus resource */
96 void __iomem *mio_wb;
97 void __iomem *mio_wt;
98 u32 val; /* bar start & 3 flag bits */
99 u16 map_idx; /* index into bar mapping array */
100 u8 size; /* order 2 exponent */
101 };
102
103 struct kvm_zdev;
104
105 #define ZPCI_FUNCTIONS_PER_BUS 256
106 struct zpci_bus {
107 struct kref kref;
108 struct pci_bus *bus;
109 struct zpci_dev *function[ZPCI_FUNCTIONS_PER_BUS];
110 struct list_head resources;
111 struct list_head bus_next;
112 struct resource bus_resource;
113 struct irq_domain *msi_parent_domain;
114 int topo; /* TID if topo_is_tid, PCHID otherwise */
115 int domain_nr;
116 u8 multifunction : 1;
117 u8 topo_is_tid : 1;
118 enum pci_bus_speed max_bus_speed;
119 };
120
121 /* Content Code Description for PCI Function Error */
122 struct zpci_ccdf_err {
123 u32 reserved1;
124 u32 fh; /* function handle */
125 u32 fid; /* function id */
126 u32 ett : 4; /* expected table type */
127 u32 mvn : 12; /* MSI vector number */
128 u32 dmaas : 8; /* DMA address space */
129 u32 reserved2 : 6;
130 u32 q : 1; /* event qualifier */
131 u32 rw : 1; /* read/write */
132 u64 faddr; /* failing address */
133 u32 reserved3;
134 u16 reserved4;
135 u16 pec; /* PCI event code */
136 } __packed;
137
138 #define ZPCI_ERR_PENDING_MAX 4
139 struct zpci_ccdf_pending {
140 bool mediated_recovery;
141 u8 count;
142 u8 head;
143 u8 tail;
144 struct zpci_ccdf_err err[ZPCI_ERR_PENDING_MAX];
145 };
146
147 /* Private data per function */
148 struct zpci_dev {
149 struct zpci_bus *zbus;
150 struct list_head entry; /* list of all zpci_devices, needed for hotplug, etc. */
151 struct list_head iommu_list;
152 struct kref kref;
153 struct rcu_head rcu;
154 struct hotplug_slot hotplug_slot;
155
156 struct mutex state_lock; /* protect state changes */
157 enum zpci_state state;
158 u32 fid; /* function ID, used by sclp */
159 u32 fh; /* function handle, used by insn's */
160 u32 gisa; /* GISA designation for passthrough */
161 u16 vfn; /* virtual function number */
162 u16 pchid; /* physical channel ID */
163 u16 maxstbl; /* Maximum store block size */
164 u16 rid; /* RID as supplied by firmware */
165 u16 tid; /* Topology for which RID is valid */
166 u8 pfgid; /* function group ID */
167 u8 pft; /* pci function type */
168 u8 port;
169 u8 fidparm;
170 u8 dtsm; /* Supported DT mask */
171 u8 rid_available : 1;
172 u8 has_hp_slot : 1;
173 u8 has_resources : 1;
174 u8 is_physfn : 1;
175 u8 util_str_avail : 1;
176 u8 tid_avail : 1;
177 u8 rtr_avail : 1; /* Relaxed translation allowed */
178 unsigned int devfn; /* DEVFN part of the RID*/
179
180 u8 pfip[CLP_PFIP_NR_SEGMENTS]; /* pci function internal path */
181 u32 uid; /* user defined id */
182 u8 util_str[CLP_UTIL_STR_LEN]; /* utility string */
183
184 /* IRQ stuff */
185 u64 msi_addr; /* MSI address */
186 unsigned int max_msi; /* maximum number of MSI's */
187 unsigned int msi_first_bit;
188 unsigned int msi_nr_irqs;
189 struct airq_iv *aibv; /* adapter interrupt bit vector */
190 unsigned long aisb; /* number of the summary bit */
191
192 /* DMA stuff */
193 unsigned long *dma_table;
194 int tlb_refresh;
195
196 struct iommu_device iommu_dev; /* IOMMU core handle */
197
198 char res_name[16];
199 bool mio_capable;
200 struct zpci_bar_struct bars[PCI_STD_NUM_BARS];
201
202 u64 start_dma; /* Start of available DMA addresses */
203 u64 end_dma; /* End of available DMA addresses */
204 u64 dma_mask; /* DMA address space mask */
205
206 /* Function measurement block */
207 struct mutex fmb_lock;
208 struct zpci_fmb *fmb;
209 u16 fmb_update; /* update interval */
210 u16 fmb_length;
211
212 u8 version;
213 enum pci_bus_speed max_bus_speed;
214
215 struct dentry *debugfs_dev;
216
217 /* IOMMU and passthrough */
218 struct iommu_domain *s390_domain; /* attached IOMMU domain */
219 struct kvm_zdev *kzdev;
220 struct mutex kzdev_lock;
221 struct zpci_ccdf_pending pending_errs;
222 struct mutex pending_errs_lock;
223 spinlock_t dom_lock; /* protect s390_domain change */
224 };
225
zdev_enabled(struct zpci_dev * zdev)226 static inline bool zdev_enabled(struct zpci_dev *zdev)
227 {
228 return (zdev->fh & (1UL << 31)) ? true : false;
229 }
230
231 extern const struct attribute_group zpci_attr_group;
232 extern const struct attribute_group pfip_attr_group;
233 extern const struct attribute_group zpci_ident_attr_group;
234
235 #define ARCH_PCI_DEV_GROUPS &zpci_attr_group, \
236 &pfip_attr_group, \
237 &zpci_ident_attr_group,
238
239 extern const struct attribute_group zpci_slot_attr_group;
240
241 #define ARCH_PCI_SLOT_GROUPS (&zpci_slot_attr_group)
242
243 extern unsigned int s390_pci_force_floating __initdata;
244 extern unsigned int s390_pci_no_rid;
245
246 extern union zpci_sic_iib *zpci_aipb;
247 extern struct airq_iv *zpci_aif_sbv;
248
249 /* -----------------------------------------------------------------------------
250 Prototypes
251 ----------------------------------------------------------------------------- */
252 /* Base stuff */
253 struct zpci_dev *zpci_create_device(u32 fid, u32 fh, enum zpci_state state);
254 int zpci_add_device(struct zpci_dev *zdev);
255 int zpci_enable_device(struct zpci_dev *);
256 int zpci_reenable_device(struct zpci_dev *zdev);
257 int zpci_disable_device(struct zpci_dev *);
258 int zpci_scan_configured_device(struct zpci_dev *zdev, u32 fh);
259 int zpci_deconfigure_device(struct zpci_dev *zdev);
260 void zpci_device_reserved(struct zpci_dev *zdev);
261 bool zpci_is_device_configured(struct zpci_dev *zdev);
262 int zpci_scan_devices(void);
263
264 int zpci_hot_reset_device(struct zpci_dev *zdev);
265 int zpci_register_ioat(struct zpci_dev *, u8, u64, u64, u64, u8 *);
266 int zpci_unregister_ioat(struct zpci_dev *, u8);
267 void zpci_remove_reserved_devices(void);
268 void zpci_update_fh(struct zpci_dev *zdev, u32 fh);
269
270 /* CLP */
271 int clp_setup_writeback_mio(void);
272 int clp_scan_pci_devices(struct list_head *scan_list);
273 int clp_query_pci_fn(struct zpci_dev *zdev);
274 int clp_enable_fh(struct zpci_dev *zdev, u32 *fh, u8 nr_dma_as);
275 int clp_disable_fh(struct zpci_dev *zdev, u32 *fh);
276 int clp_get_state(u32 fid, enum zpci_state *state);
277 int clp_refresh_fh(u32 fid, u32 *fh);
278
279 /* UID */
280 void update_uid_checking(bool new);
281
282 /* Firmware Sysfs */
283 int __init __zpci_fw_sysfs_init(void);
284
zpci_fw_sysfs_init(void)285 static inline int __init zpci_fw_sysfs_init(void)
286 {
287 if (IS_ENABLED(CONFIG_SYSFS))
288 return __zpci_fw_sysfs_init();
289 return 0;
290 }
291
292 /* IOMMU Interface */
293 int zpci_init_iommu(struct zpci_dev *zdev);
294 void zpci_destroy_iommu(struct zpci_dev *zdev);
295 int zpci_iommu_register_ioat(struct zpci_dev *zdev, u8 *status);
296
297 #ifdef CONFIG_PCI
zpci_use_mio(struct zpci_dev * zdev)298 static inline bool zpci_use_mio(struct zpci_dev *zdev)
299 {
300 return static_branch_likely(&have_mio) && zdev->mio_capable;
301 }
302
303 /* Error handling and recovery */
304 void zpci_event_error(void *);
305 void zpci_event_availability(void *);
306 bool zpci_is_enabled(void);
307 #else /* CONFIG_PCI */
zpci_event_error(void * e)308 static inline void zpci_event_error(void *e) {}
zpci_event_availability(void * e)309 static inline void zpci_event_availability(void *e) {}
310 #endif /* CONFIG_PCI */
311
312 #ifdef CONFIG_HOTPLUG_PCI_S390
313 int zpci_init_slot(struct zpci_dev *);
314 void zpci_exit_slot(struct zpci_dev *);
315 #else /* CONFIG_HOTPLUG_PCI_S390 */
zpci_init_slot(struct zpci_dev * zdev)316 static inline int zpci_init_slot(struct zpci_dev *zdev)
317 {
318 return 0;
319 }
zpci_exit_slot(struct zpci_dev * zdev)320 static inline void zpci_exit_slot(struct zpci_dev *zdev) {}
321 #endif /* CONFIG_HOTPLUG_PCI_S390 */
322
323 /* Helpers */
to_zpci(struct pci_dev * pdev)324 static inline struct zpci_dev *to_zpci(struct pci_dev *pdev)
325 {
326 struct zpci_bus *zbus = pdev->sysdata;
327
328 return zbus->function[pdev->devfn];
329 }
330
to_zpci_dev(struct device * dev)331 static inline struct zpci_dev *to_zpci_dev(struct device *dev)
332 {
333 return to_zpci(to_pci_dev(dev));
334 }
335
336 struct zpci_dev *get_zdev_by_fid(u32);
337
338 /* DMA */
339 int zpci_dma_init(void);
340 void zpci_dma_exit(void);
341 int zpci_dma_init_device(struct zpci_dev *zdev);
342 int zpci_dma_exit_device(struct zpci_dev *zdev);
343
344 /* IRQ */
345 int __init zpci_irq_init(void);
346 void __init zpci_irq_exit(void);
347 int zpci_set_irq(struct zpci_dev *zdev);
348 int zpci_create_parent_msi_domain(struct zpci_bus *zbus);
349 void zpci_remove_parent_msi_domain(struct zpci_bus *zbus);
350
351 /* FMB */
352 int zpci_fmb_enable_device(struct zpci_dev *);
353 int zpci_fmb_disable_device(struct zpci_dev *);
354
355 /* Debug */
356 int zpci_debug_init(void);
357 void zpci_debug_exit(void);
358 void zpci_debug_init_device(struct zpci_dev *, const char *);
359 void zpci_debug_exit_device(struct zpci_dev *);
360
361 /* Error handling */
362 int zpci_report_error(struct pci_dev *, struct zpci_report_error_header *);
363 int zpci_clear_error_state(struct zpci_dev *zdev);
364 int zpci_reset_load_store_blocked(struct zpci_dev *zdev);
365 void zpci_start_mediated_recovery(struct zpci_dev *zdev);
366 void zpci_stop_mediated_recovery(struct zpci_dev *zdev);
367 int zpci_get_pending_error(struct zpci_dev *zdev,
368 struct zpci_ccdf_err *ccdf);
369
370 #ifdef CONFIG_NUMA
371
372 /* Returns the node based on PCI bus */
__pcibus_to_node(const struct pci_bus * bus)373 static inline int __pcibus_to_node(const struct pci_bus *bus)
374 {
375 return NUMA_NO_NODE;
376 }
377
378 static inline const struct cpumask *
cpumask_of_pcibus(const struct pci_bus * bus)379 cpumask_of_pcibus(const struct pci_bus *bus)
380 {
381 return cpu_online_mask;
382 }
383
384 #endif /* CONFIG_NUMA */
385
386 #endif
387